drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017-2021 Marvell International Ltd.
   3  * Copyright(c) 2017-2021 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x0F
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries
  44  * + 1 for primary mac address
  45  */
  46 #define MRVL_MAC_ADDRS_MAX (1 + 25)
  47 #define MRVL_MATCH_LEN 16
  48 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  49 /* Maximum allowable packet size */
  50 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  51
  52 #define MRVL_IFACE_NAME_ARG "iface"
  53 #define MRVL_CFG_ARG "cfg"
  54
  55 #define MRVL_BURST_SIZE 64
  56
  57 #define MRVL_ARP_LENGTH 28
  58
  59 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  60 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  61
  62 /** Port Rx offload capabilities */
  63 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  64                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  65                           DEV_RX_OFFLOAD_CHECKSUM)
  66
  67 /** Port Tx offloads capabilities */
  68 #define MRVL_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  69                                   DEV_TX_OFFLOAD_UDP_CKSUM  | \
  70                                   DEV_TX_OFFLOAD_TCP_CKSUM)
  71 #define MRVL_TX_OFFLOADS (MRVL_TX_OFFLOAD_CHECKSUM | \
  72                           DEV_TX_OFFLOAD_MULTI_SEGS)
  73
  74 #define MRVL_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \
  75                               PKT_TX_TCP_CKSUM | \
  76                               PKT_TX_UDP_CKSUM)
  77
  78 static const char * const valid_args[] = {
  79         MRVL_IFACE_NAME_ARG,
  80         MRVL_CFG_ARG,
  81         NULL
  82 };
  83
  84 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  85 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  86 static int used_bpools[PP2_NUM_PKT_PROC] = {
  87         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  88 };
  89
  90 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  91 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  92 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  93 static int dummy_pool_id[PP2_NUM_PKT_PROC];
  94 struct pp2_bpool *dummy_pool[PP2_NUM_PKT_PROC] = {0};
  95
  96 struct mrvl_ifnames {
  97         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  98         int idx;
  99 };
 100
 101 /*
 102  * To use buffer harvesting based on loopback port shadow queue structure
 103  * was introduced for buffers information bookkeeping.
 104  *
 105  * Before sending the packet, related buffer information (pp2_buff_inf) is
 106  * stored in shadow queue. After packet is transmitted no longer used
 107  * packet buffer is released back to it's original hardware pool,
 108  * on condition it originated from interface.
 109  * In case it  was generated by application itself i.e: mbuf->port field is
 110  * 0xff then its released to software mempool.
 111  */
 112 struct mrvl_shadow_txq {
 113         int head;           /* write index - used when sending buffers */
 114         int tail;           /* read index - used when releasing buffers */
 115         u16 size;           /* queue occupied size */
 116         u16 num_to_release; /* number of descriptors sent, that can be
 117                              * released
 118                              */
 119         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 120 };
 121
 122 struct mrvl_rxq {
 123         struct mrvl_priv *priv;
 124         struct rte_mempool *mp;
 125         int queue_id;
 126         int port_id;
 127         int cksum_enabled;
 128         uint64_t bytes_recv;
 129         uint64_t drop_mac;
 130 };
 131
 132 struct mrvl_txq {
 133         struct mrvl_priv *priv;
 134         int queue_id;
 135         int port_id;
 136         uint64_t bytes_sent;
 137         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 138         int tx_deferred_start;
 139 };
 140
 141 static int mrvl_lcore_first;
 142 static int mrvl_lcore_last;
 143 static int mrvl_dev_num;
 144
 145 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 146 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 147                         struct pp2_hif *hif, unsigned int core_id,
 148                         struct mrvl_shadow_txq *sq, int qid, int force);
 149
 150 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 151                                   uint16_t nb_pkts);
 152 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 153                                      uint16_t nb_pkts);
 154 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 155 static void mrvl_deinit_pp2(void);
 156 static void mrvl_deinit_hifs(void);
 157
 158 static int
 159 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
 160                   uint32_t index, uint32_t vmdq __rte_unused);
 161 static int
 162 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr);
 163 static int
 164 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 165 static int mrvl_promiscuous_enable(struct rte_eth_dev *dev);
 166 static int mrvl_allmulticast_enable(struct rte_eth_dev *dev);
 167
 168 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 169         #name, offsetof(struct pp2_ppio_statistics, name),      \
 170         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 171 }
 172
 173 /* Table with xstats data */
 174 static struct {
 175         const char *name;
 176         unsigned int offset;
 177         unsigned int size;
 178 } mrvl_xstats_tbl[] = {
 179         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 180         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 181         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 182         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 183         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 184         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 185         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 186         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 187         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 188         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 189         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 190         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 191         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 192 };
 193
 194 static inline int
 195 mrvl_reserve_bit(int *bitmap, int max)
 196 {
 197         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 198
 199         if (n >= max)
 200                 return -1;
 201
 202         *bitmap |= 1 << n;
 203
 204         return n;
 205 }
 206
 207 static int
 208 mrvl_pp2_fixup_init(void)
 209 {
 210         struct pp2_bpool_params bpool_params;
 211         char                    name[15];
 212         int                     err, i;
 213
 214         memset(dummy_pool, 0, sizeof(dummy_pool));
 215         for (i = 0; i < pp2_get_num_inst(); i++) {
 216                 dummy_pool_id[i] = mrvl_reserve_bit(&used_bpools[i],
 217                                              PP2_BPOOL_NUM_POOLS);
 218                 if (dummy_pool_id[i] < 0) {
 219                         MRVL_LOG(ERR, "Can't find free pool\n");
 220                         return -1;
 221                 }
 222
 223                 memset(name, 0, sizeof(name));
 224                 snprintf(name, sizeof(name), "pool-%d:%d", i, dummy_pool_id[i]);
 225                 memset(&bpool_params, 0, sizeof(bpool_params));
 226                 bpool_params.match = name;
 227                 bpool_params.buff_len = MRVL_PKT_OFFS;
 228                 bpool_params.dummy_short_pool = 1;
 229                 err = pp2_bpool_init(&bpool_params, &dummy_pool[i]);
 230                 if (err != 0 || !dummy_pool[i]) {
 231                         MRVL_LOG(ERR, "BPool init failed!\n");
 232                         used_bpools[i] &= ~(1 << dummy_pool_id[i]);
 233                         return -1;
 234                 }
 235         }
 236
 237         return 0;
 238 }
 239
 240 /**
 241  * Initialize packet processor.
 242  *
 243  * @return
 244  *   0 on success, negative error value otherwise.
 245  */
 246 static int
 247 mrvl_init_pp2(void)
 248 {
 249         struct pp2_init_params  init_params;
 250         int                     err;
 251
 252         memset(&init_params, 0, sizeof(init_params));
 253         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
 254         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
 255         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
 256         if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
 257                 memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
 258                        sizeof(struct pp2_parse_udfs));
 259         err = pp2_init(&init_params);
 260         if (err != 0) {
 261                 MRVL_LOG(ERR, "PP2 init failed");
 262                 return -1;
 263         }
 264
 265         err = mrvl_pp2_fixup_init();
 266         if (err != 0) {
 267                 MRVL_LOG(ERR, "PP2 fixup init failed");
 268                 return -1;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static void
 275 mrvl_pp2_fixup_deinit(void)
 276 {
 277         int i;
 278
 279         for (i = 0; i < PP2_NUM_PKT_PROC; i++) {
 280                 if (!dummy_pool[i])
 281                         continue;
 282                 pp2_bpool_deinit(dummy_pool[i]);
 283                 used_bpools[i] &= ~(1 << dummy_pool_id[i]);
 284         }
 285 }
 286
 287 /**
 288  * Deinitialize packet processor.
 289  *
 290  * @return
 291  *   0 on success, negative error value otherwise.
 292  */
 293 static void
 294 mrvl_deinit_pp2(void)
 295 {
 296         mrvl_pp2_fixup_deinit();
 297         pp2_deinit();
 298 }
 299
 300 static inline void
 301 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 302 {
 303         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 304         sq->ent[sq->head].buff.addr = buf ?
 305                 rte_mbuf_data_iova_default(buf) : 0;
 306
 307         sq->ent[sq->head].bpool =
 308                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 309                  buf->refcnt > 1)) ? NULL :
 310                  mrvl_port_to_bpool_lookup[buf->port];
 311
 312         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 313         sq->size++;
 314 }
 315
 316 /**
 317  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
 318  */
 319 static void
 320 mrvl_deinit_hifs(void)
 321 {
 322         int i;
 323
 324         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
 325                 if (hifs[i])
 326                         pp2_hif_deinit(hifs[i]);
 327         }
 328         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
 329         memset(hifs, 0, sizeof(hifs));
 330 }
 331
 332 static inline void
 333 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 334 {
 335         pp2_ppio_outq_desc_reset(desc);
 336         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 337         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 338         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 339 }
 340
 341 static inline int
 342 mrvl_get_bpool_size(int pp2_id, int pool_id)
 343 {
 344         int i;
 345         int size = 0;
 346
 347         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 348                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 349
 350         return size;
 351 }
 352
 353 static int
 354 mrvl_init_hif(int core_id)
 355 {
 356         struct pp2_hif_params params;
 357         char match[MRVL_MATCH_LEN];
 358         int ret;
 359
 360         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 361         if (ret < 0) {
 362                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 363                 return ret;
 364         }
 365
 366         snprintf(match, sizeof(match), "hif-%d", ret);
 367         memset(&params, 0, sizeof(params));
 368         params.match = match;
 369         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 370         ret = pp2_hif_init(&params, &hifs[core_id]);
 371         if (ret) {
 372                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 373                 return ret;
 374         }
 375
 376         return 0;
 377 }
 378
 379 static inline struct pp2_hif*
 380 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 381 {
 382         int ret;
 383
 384         if (likely(hifs[core_id] != NULL))
 385                 return hifs[core_id];
 386
 387         rte_spinlock_lock(&priv->lock);
 388
 389         ret = mrvl_init_hif(core_id);
 390         if (ret < 0) {
 391                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 392                 goto out;
 393         }
 394
 395         if (core_id < mrvl_lcore_first)
 396                 mrvl_lcore_first = core_id;
 397
 398         if (core_id > mrvl_lcore_last)
 399                 mrvl_lcore_last = core_id;
 400 out:
 401         rte_spinlock_unlock(&priv->lock);
 402
 403         return hifs[core_id];
 404 }
 405
 406 /**
 407  * Set tx burst function according to offload flag
 408  *
 409  * @param dev
 410  *   Pointer to Ethernet device structure.
 411  */
 412 static void
 413 mrvl_set_tx_function(struct rte_eth_dev *dev)
 414 {
 415         struct mrvl_priv *priv = dev->data->dev_private;
 416
 417         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 418         if (priv->multiseg) {
 419                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 420                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 421         } else {
 422                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 423                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 424         }
 425 }
 426
 427 /**
 428  * Configure rss based on dpdk rss configuration.
 429  *
 430  * @param priv
 431  *   Pointer to private structure.
 432  * @param rss_conf
 433  *   Pointer to RSS configuration.
 434  *
 435  * @return
 436  *   0 on success, negative error value otherwise.
 437  */
 438 static int
 439 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 440 {
 441         if (rss_conf->rss_key)
 442                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 443
 444         if (rss_conf->rss_hf == 0) {
 445                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 446         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 447                 priv->ppio_params.inqs_params.hash_type =
 448                         PP2_PPIO_HASH_T_2_TUPLE;
 449         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 450                 priv->ppio_params.inqs_params.hash_type =
 451                         PP2_PPIO_HASH_T_5_TUPLE;
 452                 priv->rss_hf_tcp = 1;
 453         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 454                 priv->ppio_params.inqs_params.hash_type =
 455                         PP2_PPIO_HASH_T_5_TUPLE;
 456                 priv->rss_hf_tcp = 0;
 457         } else {
 458                 return -EINVAL;
 459         }
 460
 461         return 0;
 462 }
 463
 464 /**
 465  * Ethernet device configuration.
 466  *
 467  * Prepare the driver for a given number of TX and RX queues and
 468  * configure RSS.
 469  *
 470  * @param dev
 471  *   Pointer to Ethernet device structure.
 472  *
 473  * @return
 474  *   0 on success, negative error value otherwise.
 475  */
 476 static int
 477 mrvl_dev_configure(struct rte_eth_dev *dev)
 478 {
 479         struct mrvl_priv *priv = dev->data->dev_private;
 480         int ret;
 481
 482         if (priv->ppio) {
 483                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 484                 return -EINVAL;
 485         }
 486
 487         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 488             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 489                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 490                         dev->data->dev_conf.rxmode.mq_mode);
 491                 return -EINVAL;
 492         }
 493
 494         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 495                 MRVL_LOG(INFO, "Split headers not supported");
 496                 return -EINVAL;
 497         }
 498
 499         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 500                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 501                                  MRVL_PP2_ETH_HDRS_LEN;
 502
 503         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 504                 priv->multiseg = 1;
 505
 506         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 507                                   dev->data->nb_rx_queues);
 508         if (ret < 0)
 509                 return ret;
 510
 511         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 512                                   dev->data->nb_tx_queues);
 513         if (ret < 0)
 514                 return ret;
 515
 516         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 517         priv->ppio_params.maintain_stats = 1;
 518         priv->nb_rx_queues = dev->data->nb_rx_queues;
 519
 520         ret = mrvl_tm_init(dev);
 521         if (ret < 0)
 522                 return ret;
 523
 524         if (dev->data->nb_rx_queues == 1 &&
 525             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 526                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 527                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 528
 529                 return 0;
 530         }
 531
 532         return mrvl_configure_rss(priv,
 533                         &dev->data->dev_conf.rx_adv_conf.rss_conf);
 534 }
 535
 536 /**
 537  * DPDK callback to change the MTU.
 538  *
 539  * Setting the MTU affects hardware MRU (packets larger than the MRU
 540  * will be dropped).
 541  *
 542  * @param dev
 543  *   Pointer to Ethernet device structure.
 544  * @param mtu
 545  *   New MTU.
 546  *
 547  * @return
 548  *   0 on success, negative error value otherwise.
 549  */
 550 static int
 551 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 552 {
 553         struct mrvl_priv *priv = dev->data->dev_private;
 554         uint16_t mru;
 555         uint16_t mbuf_data_size = 0; /* SW buffer size */
 556         int ret;
 557
 558         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 559         /*
 560          * min_rx_buf_size is equal to mbuf data size
 561          * if pmd didn't set it differently
 562          */
 563         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 564         /* Prevent PMD from:
 565          * - setting mru greater than the mbuf size resulting in
 566          * hw and sw buffer size mismatch
 567          * - setting mtu that requires the support of scattered packets
 568          * when this feature has not been enabled/supported so far
 569          * (TODO check scattered_rx flag here once scattered RX is supported).
 570          */
 571         if (mru - RTE_ETHER_CRC_LEN + MRVL_PKT_OFFS > mbuf_data_size) {
 572                 mru = mbuf_data_size + RTE_ETHER_CRC_LEN - MRVL_PKT_OFFS;
 573                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 574                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 575                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 576                         mbuf_data_size, mtu, mru);
 577         }
 578
 579         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 580                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 581                 return -EINVAL;
 582         }
 583
 584         dev->data->mtu = mtu;
 585         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 586
 587         if (!priv->ppio)
 588                 return 0;
 589
 590         ret = pp2_ppio_set_mru(priv->ppio, mru);
 591         if (ret) {
 592                 MRVL_LOG(ERR, "Failed to change MRU");
 593                 return ret;
 594         }
 595
 596         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 597         if (ret) {
 598                 MRVL_LOG(ERR, "Failed to change MTU");
 599                 return ret;
 600         }
 601
 602         return 0;
 603 }
 604
 605 /**
 606  * DPDK callback to bring the link up.
 607  *
 608  * @param dev
 609  *   Pointer to Ethernet device structure.
 610  *
 611  * @return
 612  *   0 on success, negative error value otherwise.
 613  */
 614 static int
 615 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 616 {
 617         struct mrvl_priv *priv = dev->data->dev_private;
 618         int ret;
 619
 620         if (!priv->ppio) {
 621                 dev->data->dev_link.link_status = ETH_LINK_UP;
 622                 return 0;
 623         }
 624
 625         ret = pp2_ppio_enable(priv->ppio);
 626         if (ret)
 627                 return ret;
 628
 629         /*
 630          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 631          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 632          * PP2_TRAFFIC_INGRESS_EGRESS.
 633          *
 634          * Set mtu to default DPDK value here.
 635          */
 636         ret = mrvl_mtu_set(dev, dev->data->mtu);
 637         if (ret) {
 638                 pp2_ppio_disable(priv->ppio);
 639                 return ret;
 640         }
 641
 642         dev->data->dev_link.link_status = ETH_LINK_UP;
 643         return 0;
 644 }
 645
 646 /**
 647  * DPDK callback to bring the link down.
 648  *
 649  * @param dev
 650  *   Pointer to Ethernet device structure.
 651  *
 652  * @return
 653  *   0 on success, negative error value otherwise.
 654  */
 655 static int
 656 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 657 {
 658         struct mrvl_priv *priv = dev->data->dev_private;
 659         int ret;
 660
 661         if (!priv->ppio) {
 662                 dev->data->dev_link.link_status = ETH_LINK_DOWN;
 663                 return 0;
 664         }
 665         ret = pp2_ppio_disable(priv->ppio);
 666         if (ret)
 667                 return ret;
 668
 669         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 670         return 0;
 671 }
 672
 673 /**
 674  * DPDK callback to start tx queue.
 675  *
 676  * @param dev
 677  *   Pointer to Ethernet device structure.
 678  * @param queue_id
 679  *   Transmit queue index.
 680  *
 681  * @return
 682  *   0 on success, negative error value otherwise.
 683  */
 684 static int
 685 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 686 {
 687         struct mrvl_priv *priv = dev->data->dev_private;
 688         int ret;
 689
 690         if (!priv)
 691                 return -EPERM;
 692
 693         /* passing 1 enables given tx queue */
 694         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 695         if (ret) {
 696                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 697                 return ret;
 698         }
 699
 700         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 701
 702         return 0;
 703 }
 704
 705 /**
 706  * DPDK callback to stop tx queue.
 707  *
 708  * @param dev
 709  *   Pointer to Ethernet device structure.
 710  * @param queue_id
 711  *   Transmit queue index.
 712  *
 713  * @return
 714  *   0 on success, negative error value otherwise.
 715  */
 716 static int
 717 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 718 {
 719         struct mrvl_priv *priv = dev->data->dev_private;
 720         int ret;
 721
 722         if (!priv->ppio)
 723                 return -EPERM;
 724
 725         /* passing 0 disables given tx queue */
 726         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 727         if (ret) {
 728                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 729                 return ret;
 730         }
 731
 732         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 733
 734         return 0;
 735 }
 736
 737 /**
 738  * Populate VLAN Filter configuration.
 739  *
 740  * @param dev
 741  *   Pointer to Ethernet device structure.
 742  * @param on
 743  *   Toggle filter.
 744  *
 745  * @return
 746  *   0 on success, negative error value otherwise.
 747  */
 748 static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on)
 749 {
 750         uint32_t j;
 751         int ret;
 752         struct rte_vlan_filter_conf *vfc;
 753
 754         vfc = &dev->data->vlan_filter_conf;
 755         for (j = 0; j < RTE_DIM(vfc->ids); j++) {
 756                 uint64_t vlan;
 757                 uint64_t vbit;
 758                 uint64_t ids = vfc->ids[j];
 759
 760                 if (ids == 0)
 761                         continue;
 762
 763                 while (ids) {
 764                         vlan = 64 * j;
 765                         /* count trailing zeroes */
 766                         vbit = ~ids & (ids - 1);
 767                         /* clear least significant bit set */
 768                         ids ^= (ids ^ (ids - 1)) ^ vbit;
 769                         for (; vbit; vlan++)
 770                                 vbit >>= 1;
 771                         ret = mrvl_vlan_filter_set(dev, vlan, on);
 772                         if (ret) {
 773                                 MRVL_LOG(ERR, "Failed to setup VLAN filter\n");
 774                                 return ret;
 775                         }
 776                 }
 777         }
 778
 779         return 0;
 780 }
 781
 782 /**
 783  * DPDK callback to start the device.
 784  *
 785  * @param dev
 786  *   Pointer to Ethernet device structure.
 787  *
 788  * @return
 789  *   0 on success, negative errno value on failure.
 790  */
 791 static int
 792 mrvl_dev_start(struct rte_eth_dev *dev)
 793 {
 794         struct mrvl_priv *priv = dev->data->dev_private;
 795         char match[MRVL_MATCH_LEN];
 796         int ret = 0, i, def_init_size;
 797         struct rte_ether_addr *mac_addr;
 798
 799         if (priv->ppio)
 800                 return mrvl_dev_set_link_up(dev);
 801
 802         snprintf(match, sizeof(match), "ppio-%d:%d",
 803                  priv->pp_id, priv->ppio_id);
 804         priv->ppio_params.match = match;
 805         priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
 806         if (mrvl_cfg)
 807                 priv->ppio_params.eth_start_hdr =
 808                         mrvl_cfg->port[dev->data->port_id].eth_start_hdr;
 809
 810         /*
 811          * Calculate the minimum bpool size for refill feature as follows:
 812          * 2 default burst sizes multiply by number of rx queues.
 813          * If the bpool size will be below this value, new buffers will
 814          * be added to the pool.
 815          */
 816         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 817
 818         /* In case initial bpool size configured in queues setup is
 819          * smaller than minimum size add more buffers
 820          */
 821         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 822         if (priv->bpool_init_size < def_init_size) {
 823                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 824
 825                 priv->bpool_init_size += buffs_to_add;
 826                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 827                 if (ret)
 828                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 829         }
 830
 831         /*
 832          * Calculate the maximum bpool size for refill feature as follows:
 833          * maximum number of descriptors in rx queue multiply by number
 834          * of rx queues plus minimum bpool size.
 835          * In case the bpool size will exceed this value, superfluous buffers
 836          * will be removed
 837          */
 838         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 839                                 priv->bpool_min_size;
 840
 841         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 842         if (ret) {
 843                 MRVL_LOG(ERR, "Failed to init ppio");
 844                 return ret;
 845         }
 846
 847         /*
 848          * In case there are some some stale uc/mc mac addresses flush them
 849          * here. It cannot be done during mrvl_dev_close() as port information
 850          * is already gone at that point (due to pp2_ppio_deinit() in
 851          * mrvl_dev_stop()).
 852          */
 853         if (!priv->uc_mc_flushed) {
 854                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 855                 if (ret) {
 856                         MRVL_LOG(ERR,
 857                                 "Failed to flush uc/mc filter list");
 858                         goto out;
 859                 }
 860                 priv->uc_mc_flushed = 1;
 861         }
 862
 863         ret = mrvl_mtu_set(dev, dev->data->mtu);
 864         if (ret)
 865                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 866
 867         if (!rte_is_zero_ether_addr(&dev->data->mac_addrs[0]))
 868                 mrvl_mac_addr_set(dev, &dev->data->mac_addrs[0]);
 869
 870         for (i = 1; i < MRVL_MAC_ADDRS_MAX; i++) {
 871                 mac_addr = &dev->data->mac_addrs[i];
 872
 873                 /* skip zero address */
 874                 if (rte_is_zero_ether_addr(mac_addr))
 875                         continue;
 876
 877                 mrvl_mac_addr_add(dev, mac_addr, i, 0);
 878         }
 879
 880         if (dev->data->all_multicast == 1)
 881                 mrvl_allmulticast_enable(dev);
 882
 883         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
 884                 ret = mrvl_populate_vlan_table(dev, 1);
 885                 if (ret) {
 886                         MRVL_LOG(ERR, "Failed to populate VLAN table");
 887                         goto out;
 888                 }
 889         }
 890
 891         /* For default QoS config, don't start classifier. */
 892         if (mrvl_cfg  &&
 893             mrvl_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 894                 ret = mrvl_start_qos_mapping(priv);
 895                 if (ret) {
 896                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 897                         goto out;
 898                 }
 899         }
 900
 901         ret = pp2_ppio_set_loopback(priv->ppio, dev->data->dev_conf.lpbk_mode);
 902         if (ret) {
 903                 MRVL_LOG(ERR, "Failed to set loopback");
 904                 goto out;
 905         }
 906
 907         if (dev->data->promiscuous == 1)
 908                 mrvl_promiscuous_enable(dev);
 909
 910         if (dev->data->dev_link.link_status == ETH_LINK_UP) {
 911                 ret = mrvl_dev_set_link_up(dev);
 912                 if (ret) {
 913                         MRVL_LOG(ERR, "Failed to set link up");
 914                         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 915                         goto out;
 916                 }
 917         }
 918
 919         /* start tx queues */
 920         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 921                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 922
 923                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 924
 925                 if (!txq->tx_deferred_start)
 926                         continue;
 927
 928                 /*
 929                  * All txqs are started by default. Stop them
 930                  * so that tx_deferred_start works as expected.
 931                  */
 932                 ret = mrvl_tx_queue_stop(dev, i);
 933                 if (ret)
 934                         goto out;
 935         }
 936
 937         mrvl_flow_init(dev);
 938         mrvl_mtr_init(dev);
 939         mrvl_set_tx_function(dev);
 940
 941         return 0;
 942 out:
 943         MRVL_LOG(ERR, "Failed to start device");
 944         pp2_ppio_deinit(priv->ppio);
 945         return ret;
 946 }
 947
 948 /**
 949  * Flush receive queues.
 950  *
 951  * @param dev
 952  *   Pointer to Ethernet device structure.
 953  */
 954 static void
 955 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 956 {
 957         int i;
 958
 959         MRVL_LOG(INFO, "Flushing rx queues");
 960         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 961                 int ret, num;
 962
 963                 do {
 964                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 965                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 966
 967                         num = MRVL_PP2_RXD_MAX;
 968                         ret = pp2_ppio_recv(q->priv->ppio,
 969                                             q->priv->rxq_map[q->queue_id].tc,
 970                                             q->priv->rxq_map[q->queue_id].inq,
 971                                             descs, (uint16_t *)&num);
 972                 } while (ret == 0 && num);
 973         }
 974 }
 975
 976 /**
 977  * Flush transmit shadow queues.
 978  *
 979  * @param dev
 980  *   Pointer to Ethernet device structure.
 981  */
 982 static void
 983 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 984 {
 985         int i, j;
 986         struct mrvl_txq *txq;
 987
 988         MRVL_LOG(INFO, "Flushing tx shadow queues");
 989         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 990                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 991
 992                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 993                         struct mrvl_shadow_txq *sq;
 994
 995                         if (!hifs[j])
 996                                 continue;
 997
 998                         sq = &txq->shadow_txqs[j];
 999                         mrvl_free_sent_buffers(txq->priv->ppio,
1000                                 hifs[j], j, sq, txq->queue_id, 1);
1001                         while (sq->tail != sq->head) {
1002                                 uint64_t addr = cookie_addr_high |
1003                                         sq->ent[sq->tail].buff.cookie;
1004                                 rte_pktmbuf_free(
1005                                         (struct rte_mbuf *)addr);
1006                                 sq->tail = (sq->tail + 1) &
1007                                             MRVL_PP2_TX_SHADOWQ_MASK;
1008                         }
1009                         memset(sq, 0, sizeof(*sq));
1010                 }
1011         }
1012 }
1013
1014 /**
1015  * Flush hardware bpool (buffer-pool).
1016  *
1017  * @param dev
1018  *   Pointer to Ethernet device structure.
1019  */
1020 static void
1021 mrvl_flush_bpool(struct rte_eth_dev *dev)
1022 {
1023         struct mrvl_priv *priv = dev->data->dev_private;
1024         struct pp2_hif *hif;
1025         uint32_t num;
1026         int ret;
1027         unsigned int core_id = rte_lcore_id();
1028
1029         if (core_id == LCORE_ID_ANY)
1030                 core_id = rte_get_main_lcore();
1031
1032         hif = mrvl_get_hif(priv, core_id);
1033
1034         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
1035         if (ret) {
1036                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
1037                 return;
1038         }
1039
1040         while (num--) {
1041                 struct pp2_buff_inf inf;
1042                 uint64_t addr;
1043
1044                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
1045                 if (ret)
1046                         break;
1047
1048                 addr = cookie_addr_high | inf.cookie;
1049                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1050         }
1051 }
1052
1053 /**
1054  * DPDK callback to stop the device.
1055  *
1056  * @param dev
1057  *   Pointer to Ethernet device structure.
1058  */
1059 static int
1060 mrvl_dev_stop(struct rte_eth_dev *dev)
1061 {
1062         return mrvl_dev_set_link_down(dev);
1063 }
1064
1065 /**
1066  * DPDK callback to close the device.
1067  *
1068  * @param dev
1069  *   Pointer to Ethernet device structure.
1070  */
1071 static int
1072 mrvl_dev_close(struct rte_eth_dev *dev)
1073 {
1074         struct mrvl_priv *priv = dev->data->dev_private;
1075         size_t i;
1076
1077         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1078                 return 0;
1079
1080         mrvl_flush_rx_queues(dev);
1081         mrvl_flush_tx_shadow_queues(dev);
1082         mrvl_flow_deinit(dev);
1083         mrvl_mtr_deinit(dev);
1084
1085         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
1086                 struct pp2_ppio_tc_params *tc_params =
1087                         &priv->ppio_params.inqs_params.tcs_params[i];
1088
1089                 if (tc_params->inqs_params) {
1090                         rte_free(tc_params->inqs_params);
1091                         tc_params->inqs_params = NULL;
1092                 }
1093         }
1094
1095         if (priv->cls_tbl) {
1096                 pp2_cls_tbl_deinit(priv->cls_tbl);
1097                 priv->cls_tbl = NULL;
1098         }
1099
1100         if (priv->qos_tbl) {
1101                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
1102                 priv->qos_tbl = NULL;
1103         }
1104
1105         mrvl_flush_bpool(dev);
1106         mrvl_tm_deinit(dev);
1107
1108         if (priv->ppio) {
1109                 pp2_ppio_deinit(priv->ppio);
1110                 priv->ppio = NULL;
1111         }
1112
1113         /* policer must be released after ppio deinitialization */
1114         if (priv->default_policer) {
1115                 pp2_cls_plcr_deinit(priv->default_policer);
1116                 priv->default_policer = NULL;
1117         }
1118
1119
1120         if (priv->bpool) {
1121                 pp2_bpool_deinit(priv->bpool);
1122                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
1123                 priv->bpool = NULL;
1124         }
1125
1126         mrvl_dev_num--;
1127
1128         if (mrvl_dev_num == 0) {
1129                 MRVL_LOG(INFO, "Perform MUSDK deinit");
1130                 mrvl_deinit_hifs();
1131                 mrvl_deinit_pp2();
1132                 rte_mvep_deinit(MVEP_MOD_T_PP2);
1133         }
1134
1135         return 0;
1136 }
1137
1138 /**
1139  * DPDK callback to retrieve physical link information.
1140  *
1141  * @param dev
1142  *   Pointer to Ethernet device structure.
1143  * @param wait_to_complete
1144  *   Wait for request completion (ignored).
1145  *
1146  * @return
1147  *   0 on success, negative error value otherwise.
1148  */
1149 static int
1150 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
1151 {
1152         /*
1153          * TODO
1154          * once MUSDK provides necessary API use it here
1155          */
1156         struct mrvl_priv *priv = dev->data->dev_private;
1157         struct ethtool_cmd edata;
1158         struct ifreq req;
1159         int ret, fd, link_up;
1160
1161         if (!priv->ppio)
1162                 return -EPERM;
1163
1164         edata.cmd = ETHTOOL_GSET;
1165
1166         strcpy(req.ifr_name, dev->data->name);
1167         req.ifr_data = (void *)&edata;
1168
1169         fd = socket(AF_INET, SOCK_DGRAM, 0);
1170         if (fd == -1)
1171                 return -EFAULT;
1172
1173         ret = ioctl(fd, SIOCETHTOOL, &req);
1174         if (ret == -1) {
1175                 close(fd);
1176                 return -EFAULT;
1177         }
1178
1179         close(fd);
1180
1181         switch (ethtool_cmd_speed(&edata)) {
1182         case SPEED_10:
1183                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
1184                 break;
1185         case SPEED_100:
1186                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
1187                 break;
1188         case SPEED_1000:
1189                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
1190                 break;
1191         case SPEED_10000:
1192                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
1193                 break;
1194         default:
1195                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
1196         }
1197
1198         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
1199                                                          ETH_LINK_HALF_DUPLEX;
1200         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
1201                                                            ETH_LINK_FIXED;
1202         pp2_ppio_get_link_state(priv->ppio, &link_up);
1203         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
1204
1205         return 0;
1206 }
1207
1208 /**
1209  * DPDK callback to enable promiscuous mode.
1210  *
1211  * @param dev
1212  *   Pointer to Ethernet device structure.
1213  *
1214  * @return
1215  *   0 on success, negative error value otherwise.
1216  */
1217 static int
1218 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
1219 {
1220         struct mrvl_priv *priv = dev->data->dev_private;
1221         int ret;
1222
1223         if (priv->isolated)
1224                 return -ENOTSUP;
1225
1226         if (!priv->ppio)
1227                 return 0;
1228
1229         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1230         if (ret) {
1231                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1232                 return -EAGAIN;
1233         }
1234
1235         return 0;
1236 }
1237
1238 /**
1239  * DPDK callback to enable allmulti mode.
1240  *
1241  * @param dev
1242  *   Pointer to Ethernet device structure.
1243  *
1244  * @return
1245  *   0 on success, negative error value otherwise.
1246  */
1247 static int
1248 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1249 {
1250         struct mrvl_priv *priv = dev->data->dev_private;
1251         int ret;
1252
1253         if (priv->isolated)
1254                 return -ENOTSUP;
1255
1256         if (!priv->ppio)
1257                 return 0;
1258
1259         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1260         if (ret) {
1261                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1262                 return -EAGAIN;
1263         }
1264
1265         return 0;
1266 }
1267
1268 /**
1269  * DPDK callback to disable promiscuous mode.
1270  *
1271  * @param dev
1272  *   Pointer to Ethernet device structure.
1273  *
1274  * @return
1275  *   0 on success, negative error value otherwise.
1276  */
1277 static int
1278 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1279 {
1280         struct mrvl_priv *priv = dev->data->dev_private;
1281         int ret;
1282
1283         if (priv->isolated)
1284                 return -ENOTSUP;
1285
1286         if (!priv->ppio)
1287                 return 0;
1288
1289         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1290         if (ret) {
1291                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1292                 return -EAGAIN;
1293         }
1294
1295         return 0;
1296 }
1297
1298 /**
1299  * DPDK callback to disable allmulticast mode.
1300  *
1301  * @param dev
1302  *   Pointer to Ethernet device structure.
1303  *
1304  * @return
1305  *   0 on success, negative error value otherwise.
1306  */
1307 static int
1308 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1309 {
1310         struct mrvl_priv *priv = dev->data->dev_private;
1311         int ret;
1312
1313         if (priv->isolated)
1314                 return -ENOTSUP;
1315
1316         if (!priv->ppio)
1317                 return 0;
1318
1319         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1320         if (ret) {
1321                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1322                 return -EAGAIN;
1323         }
1324
1325         return 0;
1326 }
1327
1328 /**
1329  * DPDK callback to remove a MAC address.
1330  *
1331  * @param dev
1332  *   Pointer to Ethernet device structure.
1333  * @param index
1334  *   MAC address index.
1335  */
1336 static void
1337 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1338 {
1339         struct mrvl_priv *priv = dev->data->dev_private;
1340         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1341         int ret;
1342
1343         if (priv->isolated)
1344                 return;
1345
1346         if (!priv->ppio)
1347                 return;
1348
1349         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1350                                        dev->data->mac_addrs[index].addr_bytes);
1351         if (ret) {
1352                 rte_ether_format_addr(buf, sizeof(buf),
1353                                   &dev->data->mac_addrs[index]);
1354                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1355         }
1356 }
1357
1358 /**
1359  * DPDK callback to add a MAC address.
1360  *
1361  * @param dev
1362  *   Pointer to Ethernet device structure.
1363  * @param mac_addr
1364  *   MAC address to register.
1365  * @param index
1366  *   MAC address index.
1367  * @param vmdq
1368  *   VMDq pool index to associate address with (unused).
1369  *
1370  * @return
1371  *   0 on success, negative error value otherwise.
1372  */
1373 static int
1374 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1375                   uint32_t index, uint32_t vmdq __rte_unused)
1376 {
1377         struct mrvl_priv *priv = dev->data->dev_private;
1378         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1379         int ret;
1380
1381         if (priv->isolated)
1382                 return -ENOTSUP;
1383
1384         if (!priv->ppio)
1385                 return 0;
1386
1387         if (index == 0)
1388                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1389                 return -1;
1390
1391         /*
1392          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1393          * parameter uc_filter_max. Maximum number of mc addresses is then
1394          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1395          * 21 respectively.
1396          *
1397          * If more than uc_filter_max uc addresses were added to filter list
1398          * then NIC will switch to promiscuous mode automatically.
1399          *
1400          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1401          * were added to filter list then NIC will switch to all-multicast mode
1402          * automatically.
1403          */
1404         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1405         if (ret) {
1406                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1407                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1408                 return -1;
1409         }
1410
1411         return 0;
1412 }
1413
1414 /**
1415  * DPDK callback to set the primary MAC address.
1416  *
1417  * @param dev
1418  *   Pointer to Ethernet device structure.
1419  * @param mac_addr
1420  *   MAC address to register.
1421  *
1422  * @return
1423  *   0 on success, negative error value otherwise.
1424  */
1425 static int
1426 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1427 {
1428         struct mrvl_priv *priv = dev->data->dev_private;
1429         int ret;
1430
1431         if (priv->isolated)
1432                 return -ENOTSUP;
1433
1434         if (!priv->ppio)
1435                 return 0;
1436
1437         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1438         if (ret) {
1439                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1440                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1441                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1442         }
1443
1444         return ret;
1445 }
1446
1447 /**
1448  * DPDK callback to get device statistics.
1449  *
1450  * @param dev
1451  *   Pointer to Ethernet device structure.
1452  * @param stats
1453  *   Stats structure output buffer.
1454  *
1455  * @return
1456  *   0 on success, negative error value otherwise.
1457  */
1458 static int
1459 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1460 {
1461         struct mrvl_priv *priv = dev->data->dev_private;
1462         struct pp2_ppio_statistics ppio_stats;
1463         uint64_t drop_mac = 0;
1464         unsigned int i, idx, ret;
1465
1466         if (!priv->ppio)
1467                 return -EPERM;
1468
1469         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1470                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1471                 struct pp2_ppio_inq_statistics rx_stats;
1472
1473                 if (!rxq)
1474                         continue;
1475
1476                 idx = rxq->queue_id;
1477                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1478                         MRVL_LOG(ERR,
1479                                 "rx queue %d stats out of range (0 - %d)",
1480                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1481                         continue;
1482                 }
1483
1484                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1485                                                   priv->rxq_map[idx].tc,
1486                                                   priv->rxq_map[idx].inq,
1487                                                   &rx_stats, 0);
1488                 if (unlikely(ret)) {
1489                         MRVL_LOG(ERR,
1490                                 "Failed to update rx queue %d stats", idx);
1491                         break;
1492                 }
1493
1494                 stats->q_ibytes[idx] = rxq->bytes_recv;
1495                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1496                 stats->q_errors[idx] = rx_stats.drop_early +
1497                                        rx_stats.drop_fullq +
1498                                        rx_stats.drop_bm +
1499                                        rxq->drop_mac;
1500                 stats->ibytes += rxq->bytes_recv;
1501                 drop_mac += rxq->drop_mac;
1502         }
1503
1504         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1505                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1506                 struct pp2_ppio_outq_statistics tx_stats;
1507
1508                 if (!txq)
1509                         continue;
1510
1511                 idx = txq->queue_id;
1512                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1513                         MRVL_LOG(ERR,
1514                                 "tx queue %d stats out of range (0 - %d)",
1515                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1516                 }
1517
1518                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1519                                                    &tx_stats, 0);
1520                 if (unlikely(ret)) {
1521                         MRVL_LOG(ERR,
1522                                 "Failed to update tx queue %d stats", idx);
1523                         break;
1524                 }
1525
1526                 stats->q_opackets[idx] = tx_stats.deq_desc;
1527                 stats->q_obytes[idx] = txq->bytes_sent;
1528                 stats->obytes += txq->bytes_sent;
1529         }
1530
1531         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1532         if (unlikely(ret)) {
1533                 MRVL_LOG(ERR, "Failed to update port statistics");
1534                 return ret;
1535         }
1536
1537         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1538         stats->opackets += ppio_stats.tx_packets;
1539         stats->imissed += ppio_stats.rx_fullq_dropped +
1540                           ppio_stats.rx_bm_dropped +
1541                           ppio_stats.rx_early_dropped +
1542                           ppio_stats.rx_fifo_dropped +
1543                           ppio_stats.rx_cls_dropped;
1544         stats->ierrors = drop_mac;
1545
1546         return 0;
1547 }
1548
1549 /**
1550  * DPDK callback to clear device statistics.
1551  *
1552  * @param dev
1553  *   Pointer to Ethernet device structure.
1554  *
1555  * @return
1556  *   0 on success, negative error value otherwise.
1557  */
1558 static int
1559 mrvl_stats_reset(struct rte_eth_dev *dev)
1560 {
1561         struct mrvl_priv *priv = dev->data->dev_private;
1562         int i;
1563
1564         if (!priv->ppio)
1565                 return 0;
1566
1567         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1568                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1569
1570                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1571                                             priv->rxq_map[i].inq, NULL, 1);
1572                 rxq->bytes_recv = 0;
1573                 rxq->drop_mac = 0;
1574         }
1575
1576         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1577                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1578
1579                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1580                 txq->bytes_sent = 0;
1581         }
1582
1583         return pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1584 }
1585
1586 /**
1587  * DPDK callback to get extended statistics.
1588  *
1589  * @param dev
1590  *   Pointer to Ethernet device structure.
1591  * @param stats
1592  *   Pointer to xstats table.
1593  * @param n
1594  *   Number of entries in xstats table.
1595  * @return
1596  *   Negative value on error, number of read xstats otherwise.
1597  */
1598 static int
1599 mrvl_xstats_get(struct rte_eth_dev *dev,
1600                 struct rte_eth_xstat *stats, unsigned int n)
1601 {
1602         struct mrvl_priv *priv = dev->data->dev_private;
1603         struct pp2_ppio_statistics ppio_stats;
1604         unsigned int i;
1605
1606         if (!stats)
1607                 return 0;
1608
1609         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1610         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1611                 uint64_t val;
1612
1613                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1614                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1615                                             mrvl_xstats_tbl[i].offset);
1616                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1617                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1618                                             mrvl_xstats_tbl[i].offset);
1619                 else
1620                         return -EINVAL;
1621
1622                 stats[i].id = i;
1623                 stats[i].value = val;
1624         }
1625
1626         return n;
1627 }
1628
1629 /**
1630  * DPDK callback to reset extended statistics.
1631  *
1632  * @param dev
1633  *   Pointer to Ethernet device structure.
1634  *
1635  * @return
1636  *   0 on success, negative error value otherwise.
1637  */
1638 static int
1639 mrvl_xstats_reset(struct rte_eth_dev *dev)
1640 {
1641         return mrvl_stats_reset(dev);
1642 }
1643
1644 /**
1645  * DPDK callback to get extended statistics names.
1646  *
1647  * @param dev (unused)
1648  *   Pointer to Ethernet device structure.
1649  * @param xstats_names
1650  *   Pointer to xstats names table.
1651  * @param size
1652  *   Size of the xstats names table.
1653  * @return
1654  *   Number of read names.
1655  */
1656 static int
1657 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1658                       struct rte_eth_xstat_name *xstats_names,
1659                       unsigned int size)
1660 {
1661         unsigned int i;
1662
1663         if (!xstats_names)
1664                 return RTE_DIM(mrvl_xstats_tbl);
1665
1666         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1667                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1668                         RTE_ETH_XSTATS_NAME_SIZE);
1669
1670         return size;
1671 }
1672
1673 /**
1674  * DPDK callback to get information about the device.
1675  *
1676  * @param dev
1677  *   Pointer to Ethernet device structure (unused).
1678  * @param info
1679  *   Info structure output buffer.
1680  */
1681 static int
1682 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1683                    struct rte_eth_dev_info *info)
1684 {
1685         info->speed_capa = ETH_LINK_SPEED_10M |
1686                            ETH_LINK_SPEED_100M |
1687                            ETH_LINK_SPEED_1G |
1688                            ETH_LINK_SPEED_10G;
1689
1690         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1691         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1692         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1693
1694         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1695         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1696         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1697
1698         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1699         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1700         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1701
1702         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1703         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1704
1705         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1706         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1707
1708         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1709                                        ETH_RSS_NONFRAG_IPV4_TCP |
1710                                        ETH_RSS_NONFRAG_IPV4_UDP;
1711
1712         /* By default packets are dropped if no descriptors are available */
1713         info->default_rxconf.rx_drop_en = 1;
1714
1715         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1716
1717         return 0;
1718 }
1719
1720 /**
1721  * Return supported packet types.
1722  *
1723  * @param dev
1724  *   Pointer to Ethernet device structure (unused).
1725  *
1726  * @return
1727  *   Const pointer to the table with supported packet types.
1728  */
1729 static const uint32_t *
1730 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1731 {
1732         static const uint32_t ptypes[] = {
1733                 RTE_PTYPE_L2_ETHER,
1734                 RTE_PTYPE_L2_ETHER_VLAN,
1735                 RTE_PTYPE_L2_ETHER_QINQ,
1736                 RTE_PTYPE_L3_IPV4,
1737                 RTE_PTYPE_L3_IPV4_EXT,
1738                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1739                 RTE_PTYPE_L3_IPV6,
1740                 RTE_PTYPE_L3_IPV6_EXT,
1741                 RTE_PTYPE_L2_ETHER_ARP,
1742                 RTE_PTYPE_L4_TCP,
1743                 RTE_PTYPE_L4_UDP
1744         };
1745
1746         return ptypes;
1747 }
1748
1749 /**
1750  * DPDK callback to get information about specific receive queue.
1751  *
1752  * @param dev
1753  *   Pointer to Ethernet device structure.
1754  * @param rx_queue_id
1755  *   Receive queue index.
1756  * @param qinfo
1757  *   Receive queue information structure.
1758  */
1759 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1760                               struct rte_eth_rxq_info *qinfo)
1761 {
1762         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1763         struct mrvl_priv *priv = dev->data->dev_private;
1764         int inq = priv->rxq_map[rx_queue_id].inq;
1765         int tc = priv->rxq_map[rx_queue_id].tc;
1766         struct pp2_ppio_tc_params *tc_params =
1767                 &priv->ppio_params.inqs_params.tcs_params[tc];
1768
1769         qinfo->mp = q->mp;
1770         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1771 }
1772
1773 /**
1774  * DPDK callback to get information about specific transmit queue.
1775  *
1776  * @param dev
1777  *   Pointer to Ethernet device structure.
1778  * @param tx_queue_id
1779  *   Transmit queue index.
1780  * @param qinfo
1781  *   Transmit queue information structure.
1782  */
1783 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1784                               struct rte_eth_txq_info *qinfo)
1785 {
1786         struct mrvl_priv *priv = dev->data->dev_private;
1787         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1788
1789         qinfo->nb_desc =
1790                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1791         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1792 }
1793
1794 /**
1795  * DPDK callback to Configure a VLAN filter.
1796  *
1797  * @param dev
1798  *   Pointer to Ethernet device structure.
1799  * @param vlan_id
1800  *   VLAN ID to filter.
1801  * @param on
1802  *   Toggle filter.
1803  *
1804  * @return
1805  *   0 on success, negative error value otherwise.
1806  */
1807 static int
1808 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1809 {
1810         struct mrvl_priv *priv = dev->data->dev_private;
1811
1812         if (priv->isolated)
1813                 return -ENOTSUP;
1814
1815         if (!priv->ppio)
1816                 return 0;
1817
1818         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1819                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1820 }
1821
1822 /**
1823  * DPDK callback to Configure VLAN offload.
1824  *
1825  * @param dev
1826  *   Pointer to Ethernet device structure.
1827  * @param mask
1828  *   VLAN offload mask.
1829  *
1830  * @return
1831  *   0 on success, negative error value otherwise.
1832  */
1833 static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1834 {
1835         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1836         int ret;
1837
1838         if (mask & ETH_VLAN_STRIP_MASK)
1839                 MRVL_LOG(ERR, "VLAN stripping is not supported\n");
1840
1841         if (mask & ETH_VLAN_FILTER_MASK) {
1842                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1843                         ret = mrvl_populate_vlan_table(dev, 1);
1844                 else
1845                         ret = mrvl_populate_vlan_table(dev, 0);
1846
1847                 if (ret)
1848                         return ret;
1849         }
1850
1851         if (mask & ETH_VLAN_EXTEND_MASK)
1852                 MRVL_LOG(ERR, "Extend VLAN not supported\n");
1853
1854         return 0;
1855 }
1856
1857 /**
1858  * Release buffers to hardware bpool (buffer-pool)
1859  *
1860  * @param rxq
1861  *   Receive queue pointer.
1862  * @param num
1863  *   Number of buffers to release to bpool.
1864  *
1865  * @return
1866  *   0 on success, negative error value otherwise.
1867  */
1868 static int
1869 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1870 {
1871         struct buff_release_entry entries[num];
1872         struct rte_mbuf *mbufs[num];
1873         int i, ret;
1874         unsigned int core_id;
1875         struct pp2_hif *hif;
1876         struct pp2_bpool *bpool;
1877
1878         core_id = rte_lcore_id();
1879         if (core_id == LCORE_ID_ANY)
1880                 core_id = rte_get_main_lcore();
1881
1882         hif = mrvl_get_hif(rxq->priv, core_id);
1883         if (!hif)
1884                 return -1;
1885
1886         bpool = rxq->priv->bpool;
1887
1888         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1889         if (ret)
1890                 return ret;
1891
1892         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1893                 cookie_addr_high =
1894                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1895
1896         for (i = 0; i < num; i++) {
1897                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1898                         != cookie_addr_high) {
1899                         MRVL_LOG(ERR,
1900                                 "mbuf virtual addr high is out of range "
1901                                 "0x%x instead of 0x%x\n",
1902                                 (uint32_t)((uint64_t)mbufs[i] >> 32),
1903                                 (uint32_t)(cookie_addr_high >> 32));
1904                         goto out;
1905                 }
1906
1907                 entries[i].buff.addr =
1908                         rte_mbuf_data_iova_default(mbufs[i]);
1909                 entries[i].buff.cookie = (uintptr_t)mbufs[i];
1910                 entries[i].bpool = bpool;
1911         }
1912
1913         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1914         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1915
1916         if (i != num)
1917                 goto out;
1918
1919         return 0;
1920 out:
1921         for (; i < num; i++)
1922                 rte_pktmbuf_free(mbufs[i]);
1923
1924         return -1;
1925 }
1926
1927 /**
1928  * DPDK callback to configure the receive queue.
1929  *
1930  * @param dev
1931  *   Pointer to Ethernet device structure.
1932  * @param idx
1933  *   RX queue index.
1934  * @param desc
1935  *   Number of descriptors to configure in queue.
1936  * @param socket
1937  *   NUMA socket on which memory must be allocated.
1938  * @param conf
1939  *   Thresholds parameters.
1940  * @param mp
1941  *   Memory pool for buffer allocations.
1942  *
1943  * @return
1944  *   0 on success, negative error value otherwise.
1945  */
1946 static int
1947 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1948                     unsigned int socket,
1949                     const struct rte_eth_rxconf *conf,
1950                     struct rte_mempool *mp)
1951 {
1952         struct mrvl_priv *priv = dev->data->dev_private;
1953         struct mrvl_rxq *rxq;
1954         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1955         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1956         int ret, tc, inq;
1957         uint64_t offloads;
1958
1959         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1960
1961         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1962                 /*
1963                  * Unknown TC mapping, mapping will not have a correct queue.
1964                  */
1965                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1966                         idx, priv->ppio_id);
1967                 return -EFAULT;
1968         }
1969
1970         frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
1971                      MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
1972         if (frame_size < max_rx_pkt_len) {
1973                 MRVL_LOG(WARNING,
1974                         "Mbuf size must be increased to %u bytes to hold up "
1975                         "to %u bytes of data.",
1976                         buf_size + max_rx_pkt_len - frame_size,
1977                         max_rx_pkt_len);
1978                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1979                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1980                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1981         }
1982
1983         if (dev->data->rx_queues[idx]) {
1984                 rte_free(dev->data->rx_queues[idx]);
1985                 dev->data->rx_queues[idx] = NULL;
1986         }
1987
1988         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1989         if (!rxq)
1990                 return -ENOMEM;
1991
1992         rxq->priv = priv;
1993         rxq->mp = mp;
1994         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1995         rxq->queue_id = idx;
1996         rxq->port_id = dev->data->port_id;
1997         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1998
1999         tc = priv->rxq_map[rxq->queue_id].tc,
2000         inq = priv->rxq_map[rxq->queue_id].inq;
2001         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
2002                 desc;
2003
2004         ret = mrvl_fill_bpool(rxq, desc);
2005         if (ret) {
2006                 rte_free(rxq);
2007                 return ret;
2008         }
2009
2010         priv->bpool_init_size += desc;
2011
2012         dev->data->rx_queues[idx] = rxq;
2013
2014         return 0;
2015 }
2016
2017 /**
2018  * DPDK callback to release the receive queue.
2019  *
2020  * @param rxq
2021  *   Generic receive queue pointer.
2022  */
2023 static void
2024 mrvl_rx_queue_release(void *rxq)
2025 {
2026         struct mrvl_rxq *q = rxq;
2027         struct pp2_ppio_tc_params *tc_params;
2028         int i, num, tc, inq;
2029         struct pp2_hif *hif;
2030         unsigned int core_id = rte_lcore_id();
2031
2032         if (core_id == LCORE_ID_ANY)
2033                 core_id = rte_get_main_lcore();
2034
2035         if (!q)
2036                 return;
2037
2038         hif = mrvl_get_hif(q->priv, core_id);
2039
2040         if (!hif)
2041                 return;
2042
2043         tc = q->priv->rxq_map[q->queue_id].tc;
2044         inq = q->priv->rxq_map[q->queue_id].inq;
2045         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
2046         num = tc_params->inqs_params[inq].size;
2047         for (i = 0; i < num; i++) {
2048                 struct pp2_buff_inf inf;
2049                 uint64_t addr;
2050
2051                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
2052                 addr = cookie_addr_high | inf.cookie;
2053                 rte_pktmbuf_free((struct rte_mbuf *)addr);
2054         }
2055
2056         rte_free(q);
2057 }
2058
2059 /**
2060  * DPDK callback to configure the transmit queue.
2061  *
2062  * @param dev
2063  *   Pointer to Ethernet device structure.
2064  * @param idx
2065  *   Transmit queue index.
2066  * @param desc
2067  *   Number of descriptors to configure in the queue.
2068  * @param socket
2069  *   NUMA socket on which memory must be allocated.
2070  * @param conf
2071  *   Tx queue configuration parameters.
2072  *
2073  * @return
2074  *   0 on success, negative error value otherwise.
2075  */
2076 static int
2077 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
2078                     unsigned int socket,
2079                     const struct rte_eth_txconf *conf)
2080 {
2081         struct mrvl_priv *priv = dev->data->dev_private;
2082         struct mrvl_txq *txq;
2083
2084         if (dev->data->tx_queues[idx]) {
2085                 rte_free(dev->data->tx_queues[idx]);
2086                 dev->data->tx_queues[idx] = NULL;
2087         }
2088
2089         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
2090         if (!txq)
2091                 return -ENOMEM;
2092
2093         txq->priv = priv;
2094         txq->queue_id = idx;
2095         txq->port_id = dev->data->port_id;
2096         txq->tx_deferred_start = conf->tx_deferred_start;
2097         dev->data->tx_queues[idx] = txq;
2098
2099         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
2100
2101         return 0;
2102 }
2103
2104 /**
2105  * DPDK callback to release the transmit queue.
2106  *
2107  * @param txq
2108  *   Generic transmit queue pointer.
2109  */
2110 static void
2111 mrvl_tx_queue_release(void *txq)
2112 {
2113         struct mrvl_txq *q = txq;
2114
2115         if (!q)
2116                 return;
2117
2118         rte_free(q);
2119 }
2120
2121 /**
2122  * DPDK callback to get flow control configuration.
2123  *
2124  * @param dev
2125  *  Pointer to Ethernet device structure.
2126  * @param fc_conf
2127  *  Pointer to the flow control configuration.
2128  *
2129  * @return
2130  *  0 on success, negative error value otherwise.
2131  */
2132 static int
2133 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2134 {
2135         struct mrvl_priv *priv = dev->data->dev_private;
2136         int ret, en;
2137
2138         if (!priv)
2139                 return -EPERM;
2140
2141         fc_conf->autoneg = 1;
2142         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
2143         if (ret) {
2144                 MRVL_LOG(ERR, "Failed to read rx pause state");
2145                 return ret;
2146         }
2147
2148         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
2149
2150         ret = pp2_ppio_get_tx_pause(priv->ppio, &en);
2151         if (ret) {
2152                 MRVL_LOG(ERR, "Failed to read tx pause state");
2153                 return ret;
2154         }
2155
2156         if (en) {
2157                 if (fc_conf->mode == RTE_FC_NONE)
2158                         fc_conf->mode = RTE_FC_TX_PAUSE;
2159                 else
2160                         fc_conf->mode = RTE_FC_FULL;
2161         }
2162
2163         return 0;
2164 }
2165
2166 /**
2167  * DPDK callback to set flow control configuration.
2168  *
2169  * @param dev
2170  *  Pointer to Ethernet device structure.
2171  * @param fc_conf
2172  *  Pointer to the flow control configuration.
2173  *
2174  * @return
2175  *  0 on success, negative error value otherwise.
2176  */
2177 static int
2178 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2179 {
2180         struct mrvl_priv *priv = dev->data->dev_private;
2181         struct pp2_ppio_tx_pause_params mrvl_pause_params;
2182         int ret;
2183         int rx_en, tx_en;
2184
2185         if (!priv)
2186                 return -EPERM;
2187
2188         if (fc_conf->high_water ||
2189             fc_conf->low_water ||
2190             fc_conf->pause_time ||
2191             fc_conf->mac_ctrl_frame_fwd) {
2192                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
2193
2194                 return -EINVAL;
2195         }
2196
2197         if (fc_conf->autoneg == 0) {
2198                 MRVL_LOG(ERR, "Flowctrl Autoneg disable is not supported");
2199                 return -EINVAL;
2200         }
2201
2202         switch (fc_conf->mode) {
2203         case RTE_FC_FULL:
2204                 rx_en = 1;
2205                 tx_en = 1;
2206                 break;
2207         case RTE_FC_TX_PAUSE:
2208                 rx_en = 0;
2209                 tx_en = 1;
2210                 break;
2211         case RTE_FC_RX_PAUSE:
2212                 rx_en = 1;
2213                 tx_en = 0;
2214                 break;
2215         case RTE_FC_NONE:
2216                 rx_en = 0;
2217                 tx_en = 0;
2218                 break;
2219         default:
2220                 MRVL_LOG(ERR, "Incorrect Flow control flag (%d)",
2221                          fc_conf->mode);
2222                 return -EINVAL;
2223         }
2224
2225         /* Set RX flow control */
2226         ret = pp2_ppio_set_rx_pause(priv->ppio, rx_en);
2227         if (ret) {
2228                 MRVL_LOG(ERR, "Failed to change RX flowctrl");
2229                 return ret;
2230         }
2231
2232         /* Set TX flow control */
2233         mrvl_pause_params.en = tx_en;
2234         /* all inqs participate in xon/xoff decision */
2235         mrvl_pause_params.use_tc_pause_inqs = 0;
2236         ret = pp2_ppio_set_tx_pause(priv->ppio, &mrvl_pause_params);
2237         if (ret) {
2238                 MRVL_LOG(ERR, "Failed to change TX flowctrl");
2239                 return ret;
2240         }
2241
2242         return 0;
2243 }
2244
2245 /**
2246  * Update RSS hash configuration
2247  *
2248  * @param dev
2249  *   Pointer to Ethernet device structure.
2250  * @param rss_conf
2251  *   Pointer to RSS configuration.
2252  *
2253  * @return
2254  *   0 on success, negative error value otherwise.
2255  */
2256 static int
2257 mrvl_rss_hash_update(struct rte_eth_dev *dev,
2258                      struct rte_eth_rss_conf *rss_conf)
2259 {
2260         struct mrvl_priv *priv = dev->data->dev_private;
2261
2262         if (priv->isolated)
2263                 return -ENOTSUP;
2264
2265         return mrvl_configure_rss(priv, rss_conf);
2266 }
2267
2268 /**
2269  * DPDK callback to get RSS hash configuration.
2270  *
2271  * @param dev
2272  *   Pointer to Ethernet device structure.
2273  * @rss_conf
2274  *   Pointer to RSS configuration.
2275  *
2276  * @return
2277  *   Always 0.
2278  */
2279 static int
2280 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
2281                        struct rte_eth_rss_conf *rss_conf)
2282 {
2283         struct mrvl_priv *priv = dev->data->dev_private;
2284         enum pp2_ppio_hash_type hash_type =
2285                 priv->ppio_params.inqs_params.hash_type;
2286
2287         rss_conf->rss_key = NULL;
2288
2289         if (hash_type == PP2_PPIO_HASH_T_NONE)
2290                 rss_conf->rss_hf = 0;
2291         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
2292                 rss_conf->rss_hf = ETH_RSS_IPV4;
2293         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
2294                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
2295         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
2296                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
2297
2298         return 0;
2299 }
2300
2301 /**
2302  * DPDK callback to get rte_flow callbacks.
2303  *
2304  * @param dev
2305  *   Pointer to the device structure.
2306  * @param filer_type
2307  *   Flow filter type.
2308  * @param filter_op
2309  *   Flow filter operation.
2310  * @param arg
2311  *   Pointer to pass the flow ops.
2312  *
2313  * @return
2314  *   0 on success, negative error value otherwise.
2315  */
2316 static int
2317 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
2318                      enum rte_filter_type filter_type,
2319                      enum rte_filter_op filter_op, void *arg)
2320 {
2321         switch (filter_type) {
2322         case RTE_ETH_FILTER_GENERIC:
2323                 if (filter_op != RTE_ETH_FILTER_GET)
2324                         return -EINVAL;
2325                 *(const void **)arg = &mrvl_flow_ops;
2326                 return 0;
2327         default:
2328                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
2329                                 filter_type);
2330                 return -EINVAL;
2331         }
2332 }
2333
2334 /**
2335  * DPDK callback to get rte_mtr callbacks.
2336  *
2337  * @param dev
2338  *   Pointer to the device structure.
2339  * @param ops
2340  *   Pointer to pass the mtr ops.
2341  *
2342  * @return
2343  *   Always 0.
2344  */
2345 static int
2346 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2347 {
2348         *(const void **)ops = &mrvl_mtr_ops;
2349
2350         return 0;
2351 }
2352
2353 /**
2354  * DPDK callback to get rte_tm callbacks.
2355  *
2356  * @param dev
2357  *   Pointer to the device structure.
2358  * @param ops
2359  *   Pointer to pass the tm ops.
2360  *
2361  * @return
2362  *   Always 0.
2363  */
2364 static int
2365 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2366 {
2367         *(const void **)ops = &mrvl_tm_ops;
2368
2369         return 0;
2370 }
2371
2372 static const struct eth_dev_ops mrvl_ops = {
2373         .dev_configure = mrvl_dev_configure,
2374         .dev_start = mrvl_dev_start,
2375         .dev_stop = mrvl_dev_stop,
2376         .dev_set_link_up = mrvl_dev_set_link_up,
2377         .dev_set_link_down = mrvl_dev_set_link_down,
2378         .dev_close = mrvl_dev_close,
2379         .link_update = mrvl_link_update,
2380         .promiscuous_enable = mrvl_promiscuous_enable,
2381         .allmulticast_enable = mrvl_allmulticast_enable,
2382         .promiscuous_disable = mrvl_promiscuous_disable,
2383         .allmulticast_disable = mrvl_allmulticast_disable,
2384         .mac_addr_remove = mrvl_mac_addr_remove,
2385         .mac_addr_add = mrvl_mac_addr_add,
2386         .mac_addr_set = mrvl_mac_addr_set,
2387         .mtu_set = mrvl_mtu_set,
2388         .stats_get = mrvl_stats_get,
2389         .stats_reset = mrvl_stats_reset,
2390         .xstats_get = mrvl_xstats_get,
2391         .xstats_reset = mrvl_xstats_reset,
2392         .xstats_get_names = mrvl_xstats_get_names,
2393         .dev_infos_get = mrvl_dev_infos_get,
2394         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2395         .rxq_info_get = mrvl_rxq_info_get,
2396         .txq_info_get = mrvl_txq_info_get,
2397         .vlan_filter_set = mrvl_vlan_filter_set,
2398         .vlan_offload_set = mrvl_vlan_offload_set,
2399         .tx_queue_start = mrvl_tx_queue_start,
2400         .tx_queue_stop = mrvl_tx_queue_stop,
2401         .rx_queue_setup = mrvl_rx_queue_setup,
2402         .rx_queue_release = mrvl_rx_queue_release,
2403         .tx_queue_setup = mrvl_tx_queue_setup,
2404         .tx_queue_release = mrvl_tx_queue_release,
2405         .flow_ctrl_get = mrvl_flow_ctrl_get,
2406         .flow_ctrl_set = mrvl_flow_ctrl_set,
2407         .rss_hash_update = mrvl_rss_hash_update,
2408         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2409         .filter_ctrl = mrvl_eth_filter_ctrl,
2410         .mtr_ops_get = mrvl_mtr_ops_get,
2411         .tm_ops_get = mrvl_tm_ops_get,
2412 };
2413
2414 /**
2415  * Return packet type information and l3/l4 offsets.
2416  *
2417  * @param desc
2418  *   Pointer to the received packet descriptor.
2419  * @param l3_offset
2420  *   l3 packet offset.
2421  * @param l4_offset
2422  *   l4 packet offset.
2423  *
2424  * @return
2425  *   Packet type information.
2426  */
2427 static inline uint64_t
2428 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2429                                     uint8_t *l3_offset, uint8_t *l4_offset)
2430 {
2431         enum pp2_inq_l3_type l3_type;
2432         enum pp2_inq_l4_type l4_type;
2433         enum pp2_inq_vlan_tag vlan_tag;
2434         uint64_t packet_type;
2435
2436         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2437         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2438         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2439
2440         packet_type = RTE_PTYPE_L2_ETHER;
2441
2442         switch (vlan_tag) {
2443         case PP2_INQ_VLAN_TAG_SINGLE:
2444                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2445                 break;
2446         case PP2_INQ_VLAN_TAG_DOUBLE:
2447         case PP2_INQ_VLAN_TAG_TRIPLE:
2448                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2449                 break;
2450         default:
2451                 break;
2452         }
2453
2454         switch (l3_type) {
2455         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2456                 packet_type |= RTE_PTYPE_L3_IPV4;
2457                 break;
2458         case PP2_INQ_L3_TYPE_IPV4_OK:
2459                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2460                 break;
2461         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2462                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2463                 break;
2464         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2465                 packet_type |= RTE_PTYPE_L3_IPV6;
2466                 break;
2467         case PP2_INQ_L3_TYPE_IPV6_EXT:
2468                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2469                 break;
2470         case PP2_INQ_L3_TYPE_ARP:
2471                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2472                 /*
2473                  * In case of ARP l4_offset is set to wrong value.
2474                  * Set it to proper one so that later on mbuf->l3_len can be
2475                  * calculated subtracting l4_offset and l3_offset.
2476                  */
2477                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2478                 break;
2479         default:
2480                 break;
2481         }
2482
2483         switch (l4_type) {
2484         case PP2_INQ_L4_TYPE_TCP:
2485                 packet_type |= RTE_PTYPE_L4_TCP;
2486                 break;
2487         case PP2_INQ_L4_TYPE_UDP:
2488                 packet_type |= RTE_PTYPE_L4_UDP;
2489                 break;
2490         default:
2491                 break;
2492         }
2493
2494         return packet_type;
2495 }
2496
2497 /**
2498  * Get offload information from the received packet descriptor.
2499  *
2500  * @param desc
2501  *   Pointer to the received packet descriptor.
2502  *
2503  * @return
2504  *   Mbuf offload flags.
2505  */
2506 static inline uint64_t
2507 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2508 {
2509         uint64_t flags;
2510         enum pp2_inq_desc_status status;
2511
2512         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2513         if (unlikely(status != PP2_DESC_ERR_OK))
2514                 flags = PKT_RX_IP_CKSUM_BAD;
2515         else
2516                 flags = PKT_RX_IP_CKSUM_GOOD;
2517
2518         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2519         if (unlikely(status != PP2_DESC_ERR_OK))
2520                 flags |= PKT_RX_L4_CKSUM_BAD;
2521         else
2522                 flags |= PKT_RX_L4_CKSUM_GOOD;
2523
2524         return flags;
2525 }
2526
2527 /**
2528  * DPDK callback for receive.
2529  *
2530  * @param rxq
2531  *   Generic pointer to the receive queue.
2532  * @param rx_pkts
2533  *   Array to store received packets.
2534  * @param nb_pkts
2535  *   Maximum number of packets in array.
2536  *
2537  * @return
2538  *   Number of packets successfully received.
2539  */
2540 static uint16_t
2541 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2542 {
2543         struct mrvl_rxq *q = rxq;
2544         struct pp2_ppio_desc descs[nb_pkts];
2545         struct pp2_bpool *bpool;
2546         int i, ret, rx_done = 0;
2547         int num;
2548         struct pp2_hif *hif;
2549         unsigned int core_id = rte_lcore_id();
2550
2551         hif = mrvl_get_hif(q->priv, core_id);
2552
2553         if (unlikely(!q->priv->ppio || !hif))
2554                 return 0;
2555
2556         bpool = q->priv->bpool;
2557
2558         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2559                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2560         if (unlikely(ret < 0))
2561                 return 0;
2562
2563         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2564
2565         for (i = 0; i < nb_pkts; i++) {
2566                 struct rte_mbuf *mbuf;
2567                 uint8_t l3_offset, l4_offset;
2568                 enum pp2_inq_desc_status status;
2569                 uint64_t addr;
2570
2571                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2572                         struct pp2_ppio_desc *pref_desc;
2573                         u64 pref_addr;
2574
2575                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2576                         pref_addr = cookie_addr_high |
2577                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2578                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2579                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2580                 }
2581
2582                 addr = cookie_addr_high |
2583                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2584                 mbuf = (struct rte_mbuf *)addr;
2585                 rte_pktmbuf_reset(mbuf);
2586
2587                 /* drop packet in case of mac, overrun or resource error */
2588                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2589                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2590                         struct pp2_buff_inf binf = {
2591                                 .addr = rte_mbuf_data_iova_default(mbuf),
2592                                 .cookie = (uint64_t)mbuf,
2593                         };
2594
2595                         pp2_bpool_put_buff(hif, bpool, &binf);
2596                         mrvl_port_bpool_size
2597                                 [bpool->pp2_id][bpool->id][core_id]++;
2598                         q->drop_mac++;
2599                         continue;
2600                 }
2601
2602                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2603                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2604                 mbuf->data_len = mbuf->pkt_len;
2605                 mbuf->port = q->port_id;
2606                 mbuf->packet_type =
2607                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2608                                                             &l3_offset,
2609                                                             &l4_offset);
2610                 mbuf->l2_len = l3_offset;
2611                 mbuf->l3_len = l4_offset - l3_offset;
2612
2613                 if (likely(q->cksum_enabled))
2614                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2615
2616                 rx_pkts[rx_done++] = mbuf;
2617                 q->bytes_recv += mbuf->pkt_len;
2618         }
2619
2620         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2621                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2622
2623                 if (unlikely(num <= q->priv->bpool_min_size ||
2624                              (!rx_done && num < q->priv->bpool_init_size))) {
2625                         mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2626                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2627                         int i;
2628                         int pkt_to_remove = num - q->priv->bpool_init_size;
2629                         struct rte_mbuf *mbuf;
2630                         struct pp2_buff_inf buff;
2631
2632                         for (i = 0; i < pkt_to_remove; i++) {
2633                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2634                                 if (ret)
2635                                         break;
2636                                 mbuf = (struct rte_mbuf *)
2637                                         (cookie_addr_high | buff.cookie);
2638                                 rte_pktmbuf_free(mbuf);
2639                         }
2640                         mrvl_port_bpool_size
2641                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2642                 }
2643                 rte_spinlock_unlock(&q->priv->lock);
2644         }
2645
2646         return rx_done;
2647 }
2648
2649 /**
2650  * Prepare offload information.
2651  *
2652  * @param ol_flags
2653  *   Offload flags.
2654  * @param l3_type
2655  *   Pointer to the pp2_ouq_l3_type structure.
2656  * @param l4_type
2657  *   Pointer to the pp2_outq_l4_type structure.
2658  * @param gen_l3_cksum
2659  *   Will be set to 1 in case l3 checksum is computed.
2660  * @param l4_cksum
2661  *   Will be set to 1 in case l4 checksum is computed.
2662  */
2663 static inline void
2664 mrvl_prepare_proto_info(uint64_t ol_flags,
2665                         enum pp2_outq_l3_type *l3_type,
2666                         enum pp2_outq_l4_type *l4_type,
2667                         int *gen_l3_cksum,
2668                         int *gen_l4_cksum)
2669 {
2670         /*
2671          * Based on ol_flags prepare information
2672          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2673          * for offloading.
2674          * in most of the checksum cases ipv4 must be set, so this is the
2675          * default value
2676          */
2677         *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2678         *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2679
2680         if (ol_flags & PKT_TX_IPV6) {
2681                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2682                 /* no checksum for ipv6 header */
2683                 *gen_l3_cksum = 0;
2684         }
2685
2686         if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) {
2687                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2688                 *gen_l4_cksum = 1;
2689         } else if ((ol_flags & PKT_TX_L4_MASK) ==  PKT_TX_UDP_CKSUM) {
2690                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2691                 *gen_l4_cksum = 1;
2692         } else {
2693                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2694                 /* no checksum for other type */
2695                 *gen_l4_cksum = 0;
2696         }
2697 }
2698
2699 /**
2700  * Release already sent buffers to bpool (buffer-pool).
2701  *
2702  * @param ppio
2703  *   Pointer to the port structure.
2704  * @param hif
2705  *   Pointer to the MUSDK hardware interface.
2706  * @param sq
2707  *   Pointer to the shadow queue.
2708  * @param qid
2709  *   Queue id number.
2710  * @param force
2711  *   Force releasing packets.
2712  */
2713 static inline void
2714 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2715                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2716                        int qid, int force)
2717 {
2718         struct buff_release_entry *entry;
2719         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2720         int i;
2721
2722         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2723
2724         sq->num_to_release += nb_done;
2725
2726         if (likely(!force &&
2727                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2728                 return;
2729
2730         nb_done = sq->num_to_release;
2731         sq->num_to_release = 0;
2732
2733         for (i = 0; i < nb_done; i++) {
2734                 entry = &sq->ent[sq->tail + num];
2735                 if (unlikely(!entry->buff.addr)) {
2736                         MRVL_LOG(ERR,
2737                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2738                                 sq->tail, (u64)entry->buff.cookie,
2739                                 (u64)entry->buff.addr);
2740                         skip_bufs = 1;
2741                         goto skip;
2742                 }
2743
2744                 if (unlikely(!entry->bpool)) {
2745                         struct rte_mbuf *mbuf;
2746
2747                         mbuf = (struct rte_mbuf *)entry->buff.cookie;
2748                         rte_pktmbuf_free(mbuf);
2749                         skip_bufs = 1;
2750                         goto skip;
2751                 }
2752
2753                 mrvl_port_bpool_size
2754                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2755                 num++;
2756                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2757                         goto skip;
2758                 continue;
2759 skip:
2760                 if (likely(num))
2761                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2762                 num += skip_bufs;
2763                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2764                 sq->size -= num;
2765                 num = 0;
2766                 skip_bufs = 0;
2767         }
2768
2769         if (likely(num)) {
2770                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2771                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2772                 sq->size -= num;
2773         }
2774 }
2775
2776 /**
2777  * DPDK callback for transmit.
2778  *
2779  * @param txq
2780  *   Generic pointer transmit queue.
2781  * @param tx_pkts
2782  *   Packets to transmit.
2783  * @param nb_pkts
2784  *   Number of packets in array.
2785  *
2786  * @return
2787  *   Number of packets successfully transmitted.
2788  */
2789 static uint16_t
2790 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2791 {
2792         struct mrvl_txq *q = txq;
2793         struct mrvl_shadow_txq *sq;
2794         struct pp2_hif *hif;
2795         struct pp2_ppio_desc descs[nb_pkts];
2796         unsigned int core_id = rte_lcore_id();
2797         int i, bytes_sent = 0;
2798         uint16_t num, sq_free_size;
2799         uint64_t addr;
2800
2801         hif = mrvl_get_hif(q->priv, core_id);
2802         sq = &q->shadow_txqs[core_id];
2803
2804         if (unlikely(!q->priv->ppio || !hif))
2805                 return 0;
2806
2807         if (sq->size)
2808                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2809                                        sq, q->queue_id, 0);
2810
2811         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2812         if (unlikely(nb_pkts > sq_free_size))
2813                 nb_pkts = sq_free_size;
2814
2815         for (i = 0; i < nb_pkts; i++) {
2816                 struct rte_mbuf *mbuf = tx_pkts[i];
2817                 int gen_l3_cksum, gen_l4_cksum;
2818                 enum pp2_outq_l3_type l3_type;
2819                 enum pp2_outq_l4_type l4_type;
2820
2821                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2822                         struct rte_mbuf *pref_pkt_hdr;
2823
2824                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2825                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2826                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2827                 }
2828
2829                 mrvl_fill_shadowq(sq, mbuf);
2830                 mrvl_fill_desc(&descs[i], mbuf);
2831
2832                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2833                 /*
2834                  * in case unsupported ol_flags were passed
2835                  * do not update descriptor offload information
2836                  */
2837                 if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS))
2838                         continue;
2839                 mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type,
2840                                         &gen_l3_cksum, &gen_l4_cksum);
2841
2842                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2843                                                   mbuf->l2_len,
2844                                                   mbuf->l2_len + mbuf->l3_len,
2845                                                   gen_l3_cksum, gen_l4_cksum);
2846         }
2847
2848         num = nb_pkts;
2849         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2850         /* number of packets that were not sent */
2851         if (unlikely(num > nb_pkts)) {
2852                 for (i = nb_pkts; i < num; i++) {
2853                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2854                                 MRVL_PP2_TX_SHADOWQ_MASK;
2855                         addr = sq->ent[sq->head].buff.cookie;
2856                         bytes_sent -=
2857                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2858                 }
2859                 sq->size -= num - nb_pkts;
2860         }
2861
2862         q->bytes_sent += bytes_sent;
2863
2864         return nb_pkts;
2865 }
2866
2867 /** DPDK callback for S/G transmit.
2868  *
2869  * @param txq
2870  *   Generic pointer transmit queue.
2871  * @param tx_pkts
2872  *   Packets to transmit.
2873  * @param nb_pkts
2874  *   Number of packets in array.
2875  *
2876  * @return
2877  *   Number of packets successfully transmitted.
2878  */
2879 static uint16_t
2880 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2881                      uint16_t nb_pkts)
2882 {
2883         struct mrvl_txq *q = txq;
2884         struct mrvl_shadow_txq *sq;
2885         struct pp2_hif *hif;
2886         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2887         struct pp2_ppio_sg_pkts pkts;
2888         uint8_t frags[nb_pkts];
2889         unsigned int core_id = rte_lcore_id();
2890         int i, j, bytes_sent = 0;
2891         int tail, tail_first;
2892         uint16_t num, sq_free_size;
2893         uint16_t nb_segs, total_descs = 0;
2894         uint64_t addr;
2895
2896         hif = mrvl_get_hif(q->priv, core_id);
2897         sq = &q->shadow_txqs[core_id];
2898         pkts.frags = frags;
2899         pkts.num = 0;
2900
2901         if (unlikely(!q->priv->ppio || !hif))
2902                 return 0;
2903
2904         if (sq->size)
2905                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2906                                        sq, q->queue_id, 0);
2907
2908         /* Save shadow queue free size */
2909         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2910
2911         tail = 0;
2912         for (i = 0; i < nb_pkts; i++) {
2913                 struct rte_mbuf *mbuf = tx_pkts[i];
2914                 struct rte_mbuf *seg = NULL;
2915                 int gen_l3_cksum, gen_l4_cksum;
2916                 enum pp2_outq_l3_type l3_type;
2917                 enum pp2_outq_l4_type l4_type;
2918
2919                 nb_segs = mbuf->nb_segs;
2920                 tail_first = tail;
2921                 total_descs += nb_segs;
2922
2923                 /*
2924                  * Check if total_descs does not exceed
2925                  * shadow queue free size
2926                  */
2927                 if (unlikely(total_descs > sq_free_size)) {
2928                         total_descs -= nb_segs;
2929                         break;
2930                 }
2931
2932                 /* Check if nb_segs does not exceed the max nb of desc per
2933                  * fragmented packet
2934                  */
2935                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2936                         total_descs -= nb_segs;
2937                         RTE_LOG(ERR, PMD,
2938                                 "Too many segments. Packet won't be sent.\n");
2939                         break;
2940                 }
2941
2942                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2943                         struct rte_mbuf *pref_pkt_hdr;
2944
2945                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2946                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2947                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2948                 }
2949
2950                 pkts.frags[pkts.num] = nb_segs;
2951                 pkts.num++;
2952
2953                 seg = mbuf;
2954                 for (j = 0; j < nb_segs - 1; j++) {
2955                         /* For the subsequent segments, set shadow queue
2956                          * buffer to NULL
2957                          */
2958                         mrvl_fill_shadowq(sq, NULL);
2959                         mrvl_fill_desc(&descs[tail], seg);
2960
2961                         tail++;
2962                         seg = seg->next;
2963                 }
2964                 /* Put first mbuf info in last shadow queue entry */
2965                 mrvl_fill_shadowq(sq, mbuf);
2966                 /* Update descriptor with last segment */
2967                 mrvl_fill_desc(&descs[tail++], seg);
2968
2969                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2970                 /* In case unsupported ol_flags were passed
2971                  * do not update descriptor offload information
2972                  */
2973                 if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS))
2974                         continue;
2975                 mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type,
2976                                         &gen_l3_cksum, &gen_l4_cksum);
2977
2978                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2979                                                   l4_type, mbuf->l2_len,
2980                                                   mbuf->l2_len + mbuf->l3_len,
2981                                                   gen_l3_cksum, gen_l4_cksum);
2982         }
2983
2984         num = total_descs;
2985         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2986                          &total_descs, &pkts);
2987         /* number of packets that were not sent */
2988         if (unlikely(num > total_descs)) {
2989                 for (i = total_descs; i < num; i++) {
2990                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2991                                 MRVL_PP2_TX_SHADOWQ_MASK;
2992
2993                         addr = sq->ent[sq->head].buff.cookie;
2994                         if (addr)
2995                                 bytes_sent -=
2996                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2997                                                 (cookie_addr_high | addr));
2998                 }
2999                 sq->size -= num - total_descs;
3000                 nb_pkts = pkts.num;
3001         }
3002
3003         q->bytes_sent += bytes_sent;
3004
3005         return nb_pkts;
3006 }
3007
3008 /**
3009  * Create private device structure.
3010  *
3011  * @param dev_name
3012  *   Pointer to the port name passed in the initialization parameters.
3013  *
3014  * @return
3015  *   Pointer to the newly allocated private device structure.
3016  */
3017 static struct mrvl_priv *
3018 mrvl_priv_create(const char *dev_name)
3019 {
3020         struct pp2_bpool_params bpool_params;
3021         char match[MRVL_MATCH_LEN];
3022         struct mrvl_priv *priv;
3023         int ret, bpool_bit;
3024
3025         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
3026         if (!priv)
3027                 return NULL;
3028
3029         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
3030                                        &priv->pp_id, &priv->ppio_id);
3031         if (ret)
3032                 goto out_free_priv;
3033
3034         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
3035                                      PP2_BPOOL_NUM_POOLS);
3036         if (bpool_bit < 0)
3037                 goto out_free_priv;
3038         priv->bpool_bit = bpool_bit;
3039
3040         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
3041                  priv->bpool_bit);
3042         memset(&bpool_params, 0, sizeof(bpool_params));
3043         bpool_params.match = match;
3044         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
3045         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
3046         if (ret)
3047                 goto out_clear_bpool_bit;
3048
3049         priv->ppio_params.type = PP2_PPIO_T_NIC;
3050         rte_spinlock_init(&priv->lock);
3051
3052         return priv;
3053 out_clear_bpool_bit:
3054         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
3055 out_free_priv:
3056         rte_free(priv);
3057         return NULL;
3058 }
3059
3060 /**
3061  * Create device representing Ethernet port.
3062  *
3063  * @param name
3064  *   Pointer to the port's name.
3065  *
3066  * @return
3067  *   0 on success, negative error value otherwise.
3068  */
3069 static int
3070 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
3071 {
3072         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
3073         struct rte_eth_dev *eth_dev;
3074         struct mrvl_priv *priv;
3075         struct ifreq req;
3076
3077         eth_dev = rte_eth_dev_allocate(name);
3078         if (!eth_dev)
3079                 return -ENOMEM;
3080
3081         priv = mrvl_priv_create(name);
3082         if (!priv) {
3083                 ret = -ENOMEM;
3084                 goto out_free;
3085         }
3086         eth_dev->data->dev_private = priv;
3087
3088         eth_dev->data->mac_addrs =
3089                 rte_zmalloc("mac_addrs",
3090                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
3091         if (!eth_dev->data->mac_addrs) {
3092                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
3093                 ret = -ENOMEM;
3094                 goto out_free;
3095         }
3096
3097         memset(&req, 0, sizeof(req));
3098         strcpy(req.ifr_name, name);
3099         ret = ioctl(fd, SIOCGIFHWADDR, &req);
3100         if (ret)
3101                 goto out_free;
3102
3103         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
3104                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
3105
3106         eth_dev->device = &vdev->device;
3107         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
3108         mrvl_set_tx_function(eth_dev);
3109         eth_dev->dev_ops = &mrvl_ops;
3110         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
3111
3112         eth_dev->data->dev_link.link_status = ETH_LINK_UP;
3113
3114         rte_eth_dev_probing_finish(eth_dev);
3115         return 0;
3116 out_free:
3117         rte_eth_dev_release_port(eth_dev);
3118
3119         return ret;
3120 }
3121
3122 /**
3123  * Callback used by rte_kvargs_process() during argument parsing.
3124  *
3125  * @param key
3126  *   Pointer to the parsed key (unused).
3127  * @param value
3128  *   Pointer to the parsed value.
3129  * @param extra_args
3130  *   Pointer to the extra arguments which contains address of the
3131  *   table of pointers to parsed interface names.
3132  *
3133  * @return
3134  *   Always 0.
3135  */
3136 static int
3137 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
3138                  void *extra_args)
3139 {
3140         struct mrvl_ifnames *ifnames = extra_args;
3141
3142         ifnames->names[ifnames->idx++] = value;
3143
3144         return 0;
3145 }
3146
3147 /**
3148  * DPDK callback to register the virtual device.
3149  *
3150  * @param vdev
3151  *   Pointer to the virtual device.
3152  *
3153  * @return
3154  *   0 on success, negative error value otherwise.
3155  */
3156 static int
3157 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
3158 {
3159         struct rte_kvargs *kvlist;
3160         struct mrvl_ifnames ifnames;
3161         int ret = -EINVAL;
3162         uint32_t i, ifnum, cfgnum;
3163         const char *params;
3164
3165         params = rte_vdev_device_args(vdev);
3166         if (!params)
3167                 return -EINVAL;
3168
3169         kvlist = rte_kvargs_parse(params, valid_args);
3170         if (!kvlist)
3171                 return -EINVAL;
3172
3173         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
3174         if (ifnum > RTE_DIM(ifnames.names))
3175                 goto out_free_kvlist;
3176
3177         ifnames.idx = 0;
3178         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
3179                            mrvl_get_ifnames, &ifnames);
3180
3181
3182         /*
3183          * The below system initialization should be done only once,
3184          * on the first provided configuration file
3185          */
3186         if (!mrvl_cfg) {
3187                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
3188                 MRVL_LOG(INFO, "Parsing config file!");
3189                 if (cfgnum > 1) {
3190                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
3191                         goto out_free_kvlist;
3192                 } else if (cfgnum == 1) {
3193                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
3194                                            mrvl_get_cfg, &mrvl_cfg);
3195                 }
3196         }
3197
3198         if (mrvl_dev_num)
3199                 goto init_devices;
3200
3201         MRVL_LOG(INFO, "Perform MUSDK initializations");
3202
3203         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
3204         if (ret)
3205                 goto out_free_kvlist;
3206
3207         ret = mrvl_init_pp2();
3208         if (ret) {
3209                 MRVL_LOG(ERR, "Failed to init PP!");
3210                 rte_mvep_deinit(MVEP_MOD_T_PP2);
3211                 goto out_free_kvlist;
3212         }
3213
3214         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
3215         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
3216
3217         mrvl_lcore_first = RTE_MAX_LCORE;
3218         mrvl_lcore_last = 0;
3219
3220 init_devices:
3221         for (i = 0; i < ifnum; i++) {
3222                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
3223                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
3224                 if (ret)
3225                         goto out_cleanup;
3226                 mrvl_dev_num++;
3227         }
3228
3229         rte_kvargs_free(kvlist);
3230
3231         return 0;
3232 out_cleanup:
3233         rte_pmd_mrvl_remove(vdev);
3234
3235 out_free_kvlist:
3236         rte_kvargs_free(kvlist);
3237
3238         return ret;
3239 }
3240
3241 /**
3242  * DPDK callback to remove virtual device.
3243  *
3244  * @param vdev
3245  *   Pointer to the removed virtual device.
3246  *
3247  * @return
3248  *   0 on success, negative error value otherwise.
3249  */
3250 static int
3251 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
3252 {
3253         uint16_t port_id;
3254         int ret = 0;
3255
3256         RTE_ETH_FOREACH_DEV(port_id) {
3257                 if (rte_eth_devices[port_id].device != &vdev->device)
3258                         continue;
3259                 ret |= rte_eth_dev_close(port_id);
3260         }
3261
3262         return ret == 0 ? 0 : -EIO;
3263 }
3264
3265 static struct rte_vdev_driver pmd_mrvl_drv = {
3266         .probe = rte_pmd_mrvl_probe,
3267         .remove = rte_pmd_mrvl_remove,
3268 };
3269
3270 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3271 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3272 RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);