drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x01
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries */
  44 #define MRVL_MAC_ADDRS_MAX 25
  45 #define MRVL_MATCH_LEN 16
  46 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  47 /* Maximum allowable packet size */
  48 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  49
  50 #define MRVL_IFACE_NAME_ARG "iface"
  51 #define MRVL_CFG_ARG "cfg"
  52
  53 #define MRVL_BURST_SIZE 64
  54
  55 #define MRVL_ARP_LENGTH 28
  56
  57 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  58 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  59
  60 /** Port Rx offload capabilities */
  61 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  62                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  63                           DEV_RX_OFFLOAD_CHECKSUM)
  64
  65 /** Port Tx offloads capabilities */
  66 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  67                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  68                           DEV_TX_OFFLOAD_TCP_CKSUM | \
  69                           DEV_TX_OFFLOAD_MULTI_SEGS)
  70
  71 static const char * const valid_args[] = {
  72         MRVL_IFACE_NAME_ARG,
  73         MRVL_CFG_ARG,
  74         NULL
  75 };
  76
  77 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  78 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  79 static int used_bpools[PP2_NUM_PKT_PROC] = {
  80         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  81 };
  82
  83 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  84 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  85 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  86
  87 struct mrvl_ifnames {
  88         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  89         int idx;
  90 };
  91
  92 /*
  93  * To use buffer harvesting based on loopback port shadow queue structure
  94  * was introduced for buffers information bookkeeping.
  95  *
  96  * Before sending the packet, related buffer information (pp2_buff_inf) is
  97  * stored in shadow queue. After packet is transmitted no longer used
  98  * packet buffer is released back to it's original hardware pool,
  99  * on condition it originated from interface.
 100  * In case it  was generated by application itself i.e: mbuf->port field is
 101  * 0xff then its released to software mempool.
 102  */
 103 struct mrvl_shadow_txq {
 104         int head;           /* write index - used when sending buffers */
 105         int tail;           /* read index - used when releasing buffers */
 106         u16 size;           /* queue occupied size */
 107         u16 num_to_release; /* number of descriptors sent, that can be
 108                              * released
 109                              */
 110         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 111 };
 112
 113 struct mrvl_rxq {
 114         struct mrvl_priv *priv;
 115         struct rte_mempool *mp;
 116         int queue_id;
 117         int port_id;
 118         int cksum_enabled;
 119         uint64_t bytes_recv;
 120         uint64_t drop_mac;
 121 };
 122
 123 struct mrvl_txq {
 124         struct mrvl_priv *priv;
 125         int queue_id;
 126         int port_id;
 127         uint64_t bytes_sent;
 128         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 129         int tx_deferred_start;
 130 };
 131
 132 static int mrvl_lcore_first;
 133 static int mrvl_lcore_last;
 134 static int mrvl_dev_num;
 135
 136 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 137 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 138                         struct pp2_hif *hif, unsigned int core_id,
 139                         struct mrvl_shadow_txq *sq, int qid, int force);
 140
 141 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 142                                   uint16_t nb_pkts);
 143 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 144                                      uint16_t nb_pkts);
 145 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 146 static void mrvl_deinit_pp2(void);
 147 static void mrvl_deinit_hifs(void);
 148
 149
 150 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 151         #name, offsetof(struct pp2_ppio_statistics, name),      \
 152         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 153 }
 154
 155 /* Table with xstats data */
 156 static struct {
 157         const char *name;
 158         unsigned int offset;
 159         unsigned int size;
 160 } mrvl_xstats_tbl[] = {
 161         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 162         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 163         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 164         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 165         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 166         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 167         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 168         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 169         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 170         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 171         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 172         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 173         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 174 };
 175
 176 static inline void
 177 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 178 {
 179         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 180         sq->ent[sq->head].buff.addr = buf ?
 181                 rte_mbuf_data_iova_default(buf) : 0;
 182
 183         sq->ent[sq->head].bpool =
 184                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 185                  buf->refcnt > 1)) ? NULL :
 186                  mrvl_port_to_bpool_lookup[buf->port];
 187
 188         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 189         sq->size++;
 190 }
 191
 192 static inline void
 193 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 194 {
 195         pp2_ppio_outq_desc_reset(desc);
 196         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 197         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 198         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 199 }
 200
 201 static inline int
 202 mrvl_get_bpool_size(int pp2_id, int pool_id)
 203 {
 204         int i;
 205         int size = 0;
 206
 207         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 208                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 209
 210         return size;
 211 }
 212
 213 static inline int
 214 mrvl_reserve_bit(int *bitmap, int max)
 215 {
 216         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 217
 218         if (n >= max)
 219                 return -1;
 220
 221         *bitmap |= 1 << n;
 222
 223         return n;
 224 }
 225
 226 static int
 227 mrvl_init_hif(int core_id)
 228 {
 229         struct pp2_hif_params params;
 230         char match[MRVL_MATCH_LEN];
 231         int ret;
 232
 233         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 234         if (ret < 0) {
 235                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 236                 return ret;
 237         }
 238
 239         snprintf(match, sizeof(match), "hif-%d", ret);
 240         memset(&params, 0, sizeof(params));
 241         params.match = match;
 242         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 243         ret = pp2_hif_init(&params, &hifs[core_id]);
 244         if (ret) {
 245                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 246                 return ret;
 247         }
 248
 249         return 0;
 250 }
 251
 252 static inline struct pp2_hif*
 253 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 254 {
 255         int ret;
 256
 257         if (likely(hifs[core_id] != NULL))
 258                 return hifs[core_id];
 259
 260         rte_spinlock_lock(&priv->lock);
 261
 262         ret = mrvl_init_hif(core_id);
 263         if (ret < 0) {
 264                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 265                 goto out;
 266         }
 267
 268         if (core_id < mrvl_lcore_first)
 269                 mrvl_lcore_first = core_id;
 270
 271         if (core_id > mrvl_lcore_last)
 272                 mrvl_lcore_last = core_id;
 273 out:
 274         rte_spinlock_unlock(&priv->lock);
 275
 276         return hifs[core_id];
 277 }
 278
 279 /**
 280  * Set tx burst function according to offload flag
 281  *
 282  * @param dev
 283  *   Pointer to Ethernet device structure.
 284  */
 285 static void
 286 mrvl_set_tx_function(struct rte_eth_dev *dev)
 287 {
 288         struct mrvl_priv *priv = dev->data->dev_private;
 289
 290         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 291         if (priv->multiseg) {
 292                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 293                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 294         } else {
 295                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 296                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 297         }
 298 }
 299
 300 /**
 301  * Configure rss based on dpdk rss configuration.
 302  *
 303  * @param priv
 304  *   Pointer to private structure.
 305  * @param rss_conf
 306  *   Pointer to RSS configuration.
 307  *
 308  * @return
 309  *   0 on success, negative error value otherwise.
 310  */
 311 static int
 312 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 313 {
 314         if (rss_conf->rss_key)
 315                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 316
 317         if (rss_conf->rss_hf == 0) {
 318                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 319         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 320                 priv->ppio_params.inqs_params.hash_type =
 321                         PP2_PPIO_HASH_T_2_TUPLE;
 322         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 323                 priv->ppio_params.inqs_params.hash_type =
 324                         PP2_PPIO_HASH_T_5_TUPLE;
 325                 priv->rss_hf_tcp = 1;
 326         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 327                 priv->ppio_params.inqs_params.hash_type =
 328                         PP2_PPIO_HASH_T_5_TUPLE;
 329                 priv->rss_hf_tcp = 0;
 330         } else {
 331                 return -EINVAL;
 332         }
 333
 334         return 0;
 335 }
 336
 337 /**
 338  * Ethernet device configuration.
 339  *
 340  * Prepare the driver for a given number of TX and RX queues and
 341  * configure RSS.
 342  *
 343  * @param dev
 344  *   Pointer to Ethernet device structure.
 345  *
 346  * @return
 347  *   0 on success, negative error value otherwise.
 348  */
 349 static int
 350 mrvl_dev_configure(struct rte_eth_dev *dev)
 351 {
 352         struct mrvl_priv *priv = dev->data->dev_private;
 353         int ret;
 354
 355         if (priv->ppio) {
 356                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 357                 return -EINVAL;
 358         }
 359
 360         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 361             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 362                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 363                         dev->data->dev_conf.rxmode.mq_mode);
 364                 return -EINVAL;
 365         }
 366
 367         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 368                 MRVL_LOG(INFO, "Split headers not supported");
 369                 return -EINVAL;
 370         }
 371
 372         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 373                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 374                                  MRVL_PP2_ETH_HDRS_LEN;
 375
 376         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 377                 priv->multiseg = 1;
 378
 379         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 380                                   dev->data->nb_rx_queues);
 381         if (ret < 0)
 382                 return ret;
 383
 384         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 385                                   dev->data->nb_tx_queues);
 386         if (ret < 0)
 387                 return ret;
 388
 389         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 390         priv->ppio_params.maintain_stats = 1;
 391         priv->nb_rx_queues = dev->data->nb_rx_queues;
 392
 393         ret = mrvl_tm_init(dev);
 394         if (ret < 0)
 395                 return ret;
 396
 397         if (dev->data->nb_rx_queues == 1 &&
 398             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 399                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 400                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 401
 402                 return 0;
 403         }
 404
 405         return mrvl_configure_rss(priv,
 406                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 407 }
 408
 409 /**
 410  * DPDK callback to change the MTU.
 411  *
 412  * Setting the MTU affects hardware MRU (packets larger than the MRU
 413  * will be dropped).
 414  *
 415  * @param dev
 416  *   Pointer to Ethernet device structure.
 417  * @param mtu
 418  *   New MTU.
 419  *
 420  * @return
 421  *   0 on success, negative error value otherwise.
 422  */
 423 static int
 424 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 425 {
 426         struct mrvl_priv *priv = dev->data->dev_private;
 427         uint16_t mru;
 428         uint16_t mbuf_data_size = 0; /* SW buffer size */
 429         int ret;
 430
 431         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 432         /*
 433          * min_rx_buf_size is equal to mbuf data size
 434          * if pmd didn't set it differently
 435          */
 436         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 437         /* Prevent PMD from:
 438          * - setting mru greater than the mbuf size resulting in
 439          * hw and sw buffer size mismatch
 440          * - setting mtu that requires the support of scattered packets
 441          * when this feature has not been enabled/supported so far
 442          * (TODO check scattered_rx flag here once scattered RX is supported).
 443          */
 444         if (mru - RTE_ETHER_CRC_LEN + MRVL_PKT_OFFS > mbuf_data_size) {
 445                 mru = mbuf_data_size + RTE_ETHER_CRC_LEN - MRVL_PKT_OFFS;
 446                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 447                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 448                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 449                         mbuf_data_size, mtu, mru);
 450         }
 451
 452         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 453                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 454                 return -EINVAL;
 455         }
 456
 457         dev->data->mtu = mtu;
 458         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 459
 460         if (!priv->ppio)
 461                 return 0;
 462
 463         ret = pp2_ppio_set_mru(priv->ppio, mru);
 464         if (ret) {
 465                 MRVL_LOG(ERR, "Failed to change MRU");
 466                 return ret;
 467         }
 468
 469         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 470         if (ret) {
 471                 MRVL_LOG(ERR, "Failed to change MTU");
 472                 return ret;
 473         }
 474
 475         return 0;
 476 }
 477
 478 /**
 479  * DPDK callback to bring the link up.
 480  *
 481  * @param dev
 482  *   Pointer to Ethernet device structure.
 483  *
 484  * @return
 485  *   0 on success, negative error value otherwise.
 486  */
 487 static int
 488 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 489 {
 490         struct mrvl_priv *priv = dev->data->dev_private;
 491         int ret;
 492
 493         if (!priv->ppio)
 494                 return -EPERM;
 495
 496         ret = pp2_ppio_enable(priv->ppio);
 497         if (ret)
 498                 return ret;
 499
 500         /*
 501          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 502          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 503          * PP2_TRAFFIC_INGRESS_EGRESS.
 504          *
 505          * Set mtu to default DPDK value here.
 506          */
 507         ret = mrvl_mtu_set(dev, dev->data->mtu);
 508         if (ret)
 509                 pp2_ppio_disable(priv->ppio);
 510
 511         return ret;
 512 }
 513
 514 /**
 515  * DPDK callback to bring the link down.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device structure.
 519  *
 520  * @return
 521  *   0 on success, negative error value otherwise.
 522  */
 523 static int
 524 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 525 {
 526         struct mrvl_priv *priv = dev->data->dev_private;
 527
 528         if (!priv->ppio)
 529                 return -EPERM;
 530
 531         return pp2_ppio_disable(priv->ppio);
 532 }
 533
 534 /**
 535  * DPDK callback to start tx queue.
 536  *
 537  * @param dev
 538  *   Pointer to Ethernet device structure.
 539  * @param queue_id
 540  *   Transmit queue index.
 541  *
 542  * @return
 543  *   0 on success, negative error value otherwise.
 544  */
 545 static int
 546 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 547 {
 548         struct mrvl_priv *priv = dev->data->dev_private;
 549         int ret;
 550
 551         if (!priv)
 552                 return -EPERM;
 553
 554         /* passing 1 enables given tx queue */
 555         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 556         if (ret) {
 557                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 558                 return ret;
 559         }
 560
 561         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 562
 563         return 0;
 564 }
 565
 566 /**
 567  * DPDK callback to stop tx queue.
 568  *
 569  * @param dev
 570  *   Pointer to Ethernet device structure.
 571  * @param queue_id
 572  *   Transmit queue index.
 573  *
 574  * @return
 575  *   0 on success, negative error value otherwise.
 576  */
 577 static int
 578 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 579 {
 580         struct mrvl_priv *priv = dev->data->dev_private;
 581         int ret;
 582
 583         if (!priv->ppio)
 584                 return -EPERM;
 585
 586         /* passing 0 disables given tx queue */
 587         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 588         if (ret) {
 589                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 590                 return ret;
 591         }
 592
 593         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 594
 595         return 0;
 596 }
 597
 598 /**
 599  * DPDK callback to start the device.
 600  *
 601  * @param dev
 602  *   Pointer to Ethernet device structure.
 603  *
 604  * @return
 605  *   0 on success, negative errno value on failure.
 606  */
 607 static int
 608 mrvl_dev_start(struct rte_eth_dev *dev)
 609 {
 610         struct mrvl_priv *priv = dev->data->dev_private;
 611         char match[MRVL_MATCH_LEN];
 612         int ret = 0, i, def_init_size;
 613
 614         if (priv->ppio)
 615                 return mrvl_dev_set_link_up(dev);
 616
 617         snprintf(match, sizeof(match), "ppio-%d:%d",
 618                  priv->pp_id, priv->ppio_id);
 619         priv->ppio_params.match = match;
 620
 621         /*
 622          * Calculate the minimum bpool size for refill feature as follows:
 623          * 2 default burst sizes multiply by number of rx queues.
 624          * If the bpool size will be below this value, new buffers will
 625          * be added to the pool.
 626          */
 627         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 628
 629         /* In case initial bpool size configured in queues setup is
 630          * smaller than minimum size add more buffers
 631          */
 632         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 633         if (priv->bpool_init_size < def_init_size) {
 634                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 635
 636                 priv->bpool_init_size += buffs_to_add;
 637                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 638                 if (ret)
 639                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 640         }
 641
 642         /*
 643          * Calculate the maximum bpool size for refill feature as follows:
 644          * maximum number of descriptors in rx queue multiply by number
 645          * of rx queues plus minimum bpool size.
 646          * In case the bpool size will exceed this value, superfluous buffers
 647          * will be removed
 648          */
 649         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 650                                 priv->bpool_min_size;
 651
 652         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 653         if (ret) {
 654                 MRVL_LOG(ERR, "Failed to init ppio");
 655                 return ret;
 656         }
 657
 658         /*
 659          * In case there are some some stale uc/mc mac addresses flush them
 660          * here. It cannot be done during mrvl_dev_close() as port information
 661          * is already gone at that point (due to pp2_ppio_deinit() in
 662          * mrvl_dev_stop()).
 663          */
 664         if (!priv->uc_mc_flushed) {
 665                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 666                 if (ret) {
 667                         MRVL_LOG(ERR,
 668                                 "Failed to flush uc/mc filter list");
 669                         goto out;
 670                 }
 671                 priv->uc_mc_flushed = 1;
 672         }
 673
 674         ret = mrvl_mtu_set(dev, dev->data->mtu);
 675         if (ret)
 676                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 677
 678         /* For default QoS config, don't start classifier. */
 679         if (mrvl_qos_cfg  &&
 680             mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 681                 ret = mrvl_start_qos_mapping(priv);
 682                 if (ret) {
 683                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 684                         goto out;
 685                 }
 686         }
 687
 688         ret = mrvl_dev_set_link_up(dev);
 689         if (ret) {
 690                 MRVL_LOG(ERR, "Failed to set link up");
 691                 goto out;
 692         }
 693
 694         /* start tx queues */
 695         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 696                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 697
 698                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 699
 700                 if (!txq->tx_deferred_start)
 701                         continue;
 702
 703                 /*
 704                  * All txqs are started by default. Stop them
 705                  * so that tx_deferred_start works as expected.
 706                  */
 707                 ret = mrvl_tx_queue_stop(dev, i);
 708                 if (ret)
 709                         goto out;
 710         }
 711
 712         mrvl_flow_init(dev);
 713         mrvl_mtr_init(dev);
 714         mrvl_set_tx_function(dev);
 715
 716         return 0;
 717 out:
 718         MRVL_LOG(ERR, "Failed to start device");
 719         pp2_ppio_deinit(priv->ppio);
 720         return ret;
 721 }
 722
 723 /**
 724  * Flush receive queues.
 725  *
 726  * @param dev
 727  *   Pointer to Ethernet device structure.
 728  */
 729 static void
 730 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 731 {
 732         int i;
 733
 734         MRVL_LOG(INFO, "Flushing rx queues");
 735         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 736                 int ret, num;
 737
 738                 do {
 739                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 740                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 741
 742                         num = MRVL_PP2_RXD_MAX;
 743                         ret = pp2_ppio_recv(q->priv->ppio,
 744                                             q->priv->rxq_map[q->queue_id].tc,
 745                                             q->priv->rxq_map[q->queue_id].inq,
 746                                             descs, (uint16_t *)&num);
 747                 } while (ret == 0 && num);
 748         }
 749 }
 750
 751 /**
 752  * Flush transmit shadow queues.
 753  *
 754  * @param dev
 755  *   Pointer to Ethernet device structure.
 756  */
 757 static void
 758 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 759 {
 760         int i, j;
 761         struct mrvl_txq *txq;
 762
 763         MRVL_LOG(INFO, "Flushing tx shadow queues");
 764         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 765                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 766
 767                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 768                         struct mrvl_shadow_txq *sq;
 769
 770                         if (!hifs[j])
 771                                 continue;
 772
 773                         sq = &txq->shadow_txqs[j];
 774                         mrvl_free_sent_buffers(txq->priv->ppio,
 775                                 hifs[j], j, sq, txq->queue_id, 1);
 776                         while (sq->tail != sq->head) {
 777                                 uint64_t addr = cookie_addr_high |
 778                                         sq->ent[sq->tail].buff.cookie;
 779                                 rte_pktmbuf_free(
 780                                         (struct rte_mbuf *)addr);
 781                                 sq->tail = (sq->tail + 1) &
 782                                             MRVL_PP2_TX_SHADOWQ_MASK;
 783                         }
 784                         memset(sq, 0, sizeof(*sq));
 785                 }
 786         }
 787 }
 788
 789 /**
 790  * Flush hardware bpool (buffer-pool).
 791  *
 792  * @param dev
 793  *   Pointer to Ethernet device structure.
 794  */
 795 static void
 796 mrvl_flush_bpool(struct rte_eth_dev *dev)
 797 {
 798         struct mrvl_priv *priv = dev->data->dev_private;
 799         struct pp2_hif *hif;
 800         uint32_t num;
 801         int ret;
 802         unsigned int core_id = rte_lcore_id();
 803
 804         if (core_id == LCORE_ID_ANY)
 805                 core_id = rte_get_main_lcore();
 806
 807         hif = mrvl_get_hif(priv, core_id);
 808
 809         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 810         if (ret) {
 811                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 812                 return;
 813         }
 814
 815         while (num--) {
 816                 struct pp2_buff_inf inf;
 817                 uint64_t addr;
 818
 819                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 820                 if (ret)
 821                         break;
 822
 823                 addr = cookie_addr_high | inf.cookie;
 824                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 825         }
 826 }
 827
 828 /**
 829  * DPDK callback to stop the device.
 830  *
 831  * @param dev
 832  *   Pointer to Ethernet device structure.
 833  */
 834 static int
 835 mrvl_dev_stop(struct rte_eth_dev *dev)
 836 {
 837         return mrvl_dev_set_link_down(dev);
 838 }
 839
 840 /**
 841  * DPDK callback to close the device.
 842  *
 843  * @param dev
 844  *   Pointer to Ethernet device structure.
 845  */
 846 static int
 847 mrvl_dev_close(struct rte_eth_dev *dev)
 848 {
 849         struct mrvl_priv *priv = dev->data->dev_private;
 850         size_t i;
 851
 852         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 853                 return 0;
 854
 855         mrvl_flush_rx_queues(dev);
 856         mrvl_flush_tx_shadow_queues(dev);
 857         mrvl_flow_deinit(dev);
 858         mrvl_mtr_deinit(dev);
 859
 860         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 861                 struct pp2_ppio_tc_params *tc_params =
 862                         &priv->ppio_params.inqs_params.tcs_params[i];
 863
 864                 if (tc_params->inqs_params) {
 865                         rte_free(tc_params->inqs_params);
 866                         tc_params->inqs_params = NULL;
 867                 }
 868         }
 869
 870         if (priv->cls_tbl) {
 871                 pp2_cls_tbl_deinit(priv->cls_tbl);
 872                 priv->cls_tbl = NULL;
 873         }
 874
 875         if (priv->qos_tbl) {
 876                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 877                 priv->qos_tbl = NULL;
 878         }
 879
 880         mrvl_flush_bpool(dev);
 881         mrvl_tm_deinit(dev);
 882
 883         if (priv->ppio) {
 884                 pp2_ppio_deinit(priv->ppio);
 885                 priv->ppio = NULL;
 886         }
 887
 888         /* policer must be released after ppio deinitialization */
 889         if (priv->default_policer) {
 890                 pp2_cls_plcr_deinit(priv->default_policer);
 891                 priv->default_policer = NULL;
 892         }
 893
 894
 895         if (priv->bpool) {
 896                 pp2_bpool_deinit(priv->bpool);
 897                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
 898                 priv->bpool = NULL;
 899         }
 900
 901         mrvl_dev_num--;
 902
 903         if (mrvl_dev_num == 0) {
 904                 MRVL_LOG(INFO, "Perform MUSDK deinit");
 905                 mrvl_deinit_hifs();
 906                 mrvl_deinit_pp2();
 907                 rte_mvep_deinit(MVEP_MOD_T_PP2);
 908         }
 909
 910         return 0;
 911 }
 912
 913 /**
 914  * DPDK callback to retrieve physical link information.
 915  *
 916  * @param dev
 917  *   Pointer to Ethernet device structure.
 918  * @param wait_to_complete
 919  *   Wait for request completion (ignored).
 920  *
 921  * @return
 922  *   0 on success, negative error value otherwise.
 923  */
 924 static int
 925 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 926 {
 927         /*
 928          * TODO
 929          * once MUSDK provides necessary API use it here
 930          */
 931         struct mrvl_priv *priv = dev->data->dev_private;
 932         struct ethtool_cmd edata;
 933         struct ifreq req;
 934         int ret, fd, link_up;
 935
 936         if (!priv->ppio)
 937                 return -EPERM;
 938
 939         edata.cmd = ETHTOOL_GSET;
 940
 941         strcpy(req.ifr_name, dev->data->name);
 942         req.ifr_data = (void *)&edata;
 943
 944         fd = socket(AF_INET, SOCK_DGRAM, 0);
 945         if (fd == -1)
 946                 return -EFAULT;
 947
 948         ret = ioctl(fd, SIOCETHTOOL, &req);
 949         if (ret == -1) {
 950                 close(fd);
 951                 return -EFAULT;
 952         }
 953
 954         close(fd);
 955
 956         switch (ethtool_cmd_speed(&edata)) {
 957         case SPEED_10:
 958                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 959                 break;
 960         case SPEED_100:
 961                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 962                 break;
 963         case SPEED_1000:
 964                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 965                 break;
 966         case SPEED_10000:
 967                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 968                 break;
 969         default:
 970                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 971         }
 972
 973         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 974                                                          ETH_LINK_HALF_DUPLEX;
 975         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 976                                                            ETH_LINK_FIXED;
 977         pp2_ppio_get_link_state(priv->ppio, &link_up);
 978         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 979
 980         return 0;
 981 }
 982
 983 /**
 984  * DPDK callback to enable promiscuous mode.
 985  *
 986  * @param dev
 987  *   Pointer to Ethernet device structure.
 988  *
 989  * @return
 990  *   0 on success, negative error value otherwise.
 991  */
 992 static int
 993 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
 994 {
 995         struct mrvl_priv *priv = dev->data->dev_private;
 996         int ret;
 997
 998         if (!priv->ppio)
 999                 return 0;
1000
1001         if (priv->isolated)
1002                 return 0;
1003
1004         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1005         if (ret) {
1006                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1007                 return -EAGAIN;
1008         }
1009
1010         return 0;
1011 }
1012
1013 /**
1014  * DPDK callback to enable allmulti mode.
1015  *
1016  * @param dev
1017  *   Pointer to Ethernet device structure.
1018  *
1019  * @return
1020  *   0 on success, negative error value otherwise.
1021  */
1022 static int
1023 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1024 {
1025         struct mrvl_priv *priv = dev->data->dev_private;
1026         int ret;
1027
1028         if (!priv->ppio)
1029                 return 0;
1030
1031         if (priv->isolated)
1032                 return 0;
1033
1034         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1035         if (ret) {
1036                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1037                 return -EAGAIN;
1038         }
1039
1040         return 0;
1041 }
1042
1043 /**
1044  * DPDK callback to disable promiscuous mode.
1045  *
1046  * @param dev
1047  *   Pointer to Ethernet device structure.
1048  *
1049  * @return
1050  *   0 on success, negative error value otherwise.
1051  */
1052 static int
1053 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1054 {
1055         struct mrvl_priv *priv = dev->data->dev_private;
1056         int ret;
1057
1058         if (!priv->ppio)
1059                 return 0;
1060
1061         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1062         if (ret) {
1063                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1064                 return -EAGAIN;
1065         }
1066
1067         return 0;
1068 }
1069
1070 /**
1071  * DPDK callback to disable allmulticast mode.
1072  *
1073  * @param dev
1074  *   Pointer to Ethernet device structure.
1075  *
1076  * @return
1077  *   0 on success, negative error value otherwise.
1078  */
1079 static int
1080 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1081 {
1082         struct mrvl_priv *priv = dev->data->dev_private;
1083         int ret;
1084
1085         if (!priv->ppio)
1086                 return 0;
1087
1088         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1089         if (ret) {
1090                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1091                 return -EAGAIN;
1092         }
1093
1094         return 0;
1095 }
1096
1097 /**
1098  * DPDK callback to remove a MAC address.
1099  *
1100  * @param dev
1101  *   Pointer to Ethernet device structure.
1102  * @param index
1103  *   MAC address index.
1104  */
1105 static void
1106 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1107 {
1108         struct mrvl_priv *priv = dev->data->dev_private;
1109         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1110         int ret;
1111
1112         if (!priv->ppio)
1113                 return;
1114
1115         if (priv->isolated)
1116                 return;
1117
1118         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1119                                        dev->data->mac_addrs[index].addr_bytes);
1120         if (ret) {
1121                 rte_ether_format_addr(buf, sizeof(buf),
1122                                   &dev->data->mac_addrs[index]);
1123                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1124         }
1125 }
1126
1127 /**
1128  * DPDK callback to add a MAC address.
1129  *
1130  * @param dev
1131  *   Pointer to Ethernet device structure.
1132  * @param mac_addr
1133  *   MAC address to register.
1134  * @param index
1135  *   MAC address index.
1136  * @param vmdq
1137  *   VMDq pool index to associate address with (unused).
1138  *
1139  * @return
1140  *   0 on success, negative error value otherwise.
1141  */
1142 static int
1143 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1144                   uint32_t index, uint32_t vmdq __rte_unused)
1145 {
1146         struct mrvl_priv *priv = dev->data->dev_private;
1147         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1148         int ret;
1149
1150         if (priv->isolated)
1151                 return -ENOTSUP;
1152
1153         if (index == 0)
1154                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1155                 return -1;
1156
1157         if (!priv->ppio)
1158                 return 0;
1159
1160         /*
1161          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1162          * parameter uc_filter_max. Maximum number of mc addresses is then
1163          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1164          * 21 respectively.
1165          *
1166          * If more than uc_filter_max uc addresses were added to filter list
1167          * then NIC will switch to promiscuous mode automatically.
1168          *
1169          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1170          * were added to filter list then NIC will switch to all-multicast mode
1171          * automatically.
1172          */
1173         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1174         if (ret) {
1175                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1176                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1177                 return -1;
1178         }
1179
1180         return 0;
1181 }
1182
1183 /**
1184  * DPDK callback to set the primary MAC address.
1185  *
1186  * @param dev
1187  *   Pointer to Ethernet device structure.
1188  * @param mac_addr
1189  *   MAC address to register.
1190  *
1191  * @return
1192  *   0 on success, negative error value otherwise.
1193  */
1194 static int
1195 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1196 {
1197         struct mrvl_priv *priv = dev->data->dev_private;
1198         int ret;
1199
1200         if (!priv->ppio)
1201                 return 0;
1202
1203         if (priv->isolated)
1204                 return -ENOTSUP;
1205
1206         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1207         if (ret) {
1208                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1209                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1210                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1211         }
1212
1213         return ret;
1214 }
1215
1216 /**
1217  * DPDK callback to get device statistics.
1218  *
1219  * @param dev
1220  *   Pointer to Ethernet device structure.
1221  * @param stats
1222  *   Stats structure output buffer.
1223  *
1224  * @return
1225  *   0 on success, negative error value otherwise.
1226  */
1227 static int
1228 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1229 {
1230         struct mrvl_priv *priv = dev->data->dev_private;
1231         struct pp2_ppio_statistics ppio_stats;
1232         uint64_t drop_mac = 0;
1233         unsigned int i, idx, ret;
1234
1235         if (!priv->ppio)
1236                 return -EPERM;
1237
1238         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1239                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1240                 struct pp2_ppio_inq_statistics rx_stats;
1241
1242                 if (!rxq)
1243                         continue;
1244
1245                 idx = rxq->queue_id;
1246                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1247                         MRVL_LOG(ERR,
1248                                 "rx queue %d stats out of range (0 - %d)",
1249                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1250                         continue;
1251                 }
1252
1253                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1254                                                   priv->rxq_map[idx].tc,
1255                                                   priv->rxq_map[idx].inq,
1256                                                   &rx_stats, 0);
1257                 if (unlikely(ret)) {
1258                         MRVL_LOG(ERR,
1259                                 "Failed to update rx queue %d stats", idx);
1260                         break;
1261                 }
1262
1263                 stats->q_ibytes[idx] = rxq->bytes_recv;
1264                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1265                 stats->q_errors[idx] = rx_stats.drop_early +
1266                                        rx_stats.drop_fullq +
1267                                        rx_stats.drop_bm +
1268                                        rxq->drop_mac;
1269                 stats->ibytes += rxq->bytes_recv;
1270                 drop_mac += rxq->drop_mac;
1271         }
1272
1273         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1274                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1275                 struct pp2_ppio_outq_statistics tx_stats;
1276
1277                 if (!txq)
1278                         continue;
1279
1280                 idx = txq->queue_id;
1281                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1282                         MRVL_LOG(ERR,
1283                                 "tx queue %d stats out of range (0 - %d)",
1284                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1285                 }
1286
1287                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1288                                                    &tx_stats, 0);
1289                 if (unlikely(ret)) {
1290                         MRVL_LOG(ERR,
1291                                 "Failed to update tx queue %d stats", idx);
1292                         break;
1293                 }
1294
1295                 stats->q_opackets[idx] = tx_stats.deq_desc;
1296                 stats->q_obytes[idx] = txq->bytes_sent;
1297                 stats->obytes += txq->bytes_sent;
1298         }
1299
1300         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1301         if (unlikely(ret)) {
1302                 MRVL_LOG(ERR, "Failed to update port statistics");
1303                 return ret;
1304         }
1305
1306         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1307         stats->opackets += ppio_stats.tx_packets;
1308         stats->imissed += ppio_stats.rx_fullq_dropped +
1309                           ppio_stats.rx_bm_dropped +
1310                           ppio_stats.rx_early_dropped +
1311                           ppio_stats.rx_fifo_dropped +
1312                           ppio_stats.rx_cls_dropped;
1313         stats->ierrors = drop_mac;
1314
1315         return 0;
1316 }
1317
1318 /**
1319  * DPDK callback to clear device statistics.
1320  *
1321  * @param dev
1322  *   Pointer to Ethernet device structure.
1323  *
1324  * @return
1325  *   0 on success, negative error value otherwise.
1326  */
1327 static int
1328 mrvl_stats_reset(struct rte_eth_dev *dev)
1329 {
1330         struct mrvl_priv *priv = dev->data->dev_private;
1331         int i;
1332
1333         if (!priv->ppio)
1334                 return 0;
1335
1336         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1337                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1338
1339                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1340                                             priv->rxq_map[i].inq, NULL, 1);
1341                 rxq->bytes_recv = 0;
1342                 rxq->drop_mac = 0;
1343         }
1344
1345         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1346                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1347
1348                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1349                 txq->bytes_sent = 0;
1350         }
1351
1352         return pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1353 }
1354
1355 /**
1356  * DPDK callback to get extended statistics.
1357  *
1358  * @param dev
1359  *   Pointer to Ethernet device structure.
1360  * @param stats
1361  *   Pointer to xstats table.
1362  * @param n
1363  *   Number of entries in xstats table.
1364  * @return
1365  *   Negative value on error, number of read xstats otherwise.
1366  */
1367 static int
1368 mrvl_xstats_get(struct rte_eth_dev *dev,
1369                 struct rte_eth_xstat *stats, unsigned int n)
1370 {
1371         struct mrvl_priv *priv = dev->data->dev_private;
1372         struct pp2_ppio_statistics ppio_stats;
1373         unsigned int i;
1374
1375         if (!stats)
1376                 return 0;
1377
1378         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1379         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1380                 uint64_t val;
1381
1382                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1383                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1384                                             mrvl_xstats_tbl[i].offset);
1385                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1386                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1387                                             mrvl_xstats_tbl[i].offset);
1388                 else
1389                         return -EINVAL;
1390
1391                 stats[i].id = i;
1392                 stats[i].value = val;
1393         }
1394
1395         return n;
1396 }
1397
1398 /**
1399  * DPDK callback to reset extended statistics.
1400  *
1401  * @param dev
1402  *   Pointer to Ethernet device structure.
1403  *
1404  * @return
1405  *   0 on success, negative error value otherwise.
1406  */
1407 static int
1408 mrvl_xstats_reset(struct rte_eth_dev *dev)
1409 {
1410         return mrvl_stats_reset(dev);
1411 }
1412
1413 /**
1414  * DPDK callback to get extended statistics names.
1415  *
1416  * @param dev (unused)
1417  *   Pointer to Ethernet device structure.
1418  * @param xstats_names
1419  *   Pointer to xstats names table.
1420  * @param size
1421  *   Size of the xstats names table.
1422  * @return
1423  *   Number of read names.
1424  */
1425 static int
1426 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1427                       struct rte_eth_xstat_name *xstats_names,
1428                       unsigned int size)
1429 {
1430         unsigned int i;
1431
1432         if (!xstats_names)
1433                 return RTE_DIM(mrvl_xstats_tbl);
1434
1435         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1436                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1437                         RTE_ETH_XSTATS_NAME_SIZE);
1438
1439         return size;
1440 }
1441
1442 /**
1443  * DPDK callback to get information about the device.
1444  *
1445  * @param dev
1446  *   Pointer to Ethernet device structure (unused).
1447  * @param info
1448  *   Info structure output buffer.
1449  */
1450 static int
1451 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1452                    struct rte_eth_dev_info *info)
1453 {
1454         info->speed_capa = ETH_LINK_SPEED_10M |
1455                            ETH_LINK_SPEED_100M |
1456                            ETH_LINK_SPEED_1G |
1457                            ETH_LINK_SPEED_10G;
1458
1459         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1460         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1461         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1462
1463         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1464         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1465         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1466
1467         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1468         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1469         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1470
1471         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1472         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1473
1474         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1475         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1476
1477         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1478                                        ETH_RSS_NONFRAG_IPV4_TCP |
1479                                        ETH_RSS_NONFRAG_IPV4_UDP;
1480
1481         /* By default packets are dropped if no descriptors are available */
1482         info->default_rxconf.rx_drop_en = 1;
1483
1484         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1485
1486         return 0;
1487 }
1488
1489 /**
1490  * Return supported packet types.
1491  *
1492  * @param dev
1493  *   Pointer to Ethernet device structure (unused).
1494  *
1495  * @return
1496  *   Const pointer to the table with supported packet types.
1497  */
1498 static const uint32_t *
1499 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1500 {
1501         static const uint32_t ptypes[] = {
1502                 RTE_PTYPE_L2_ETHER,
1503                 RTE_PTYPE_L2_ETHER_VLAN,
1504                 RTE_PTYPE_L2_ETHER_QINQ,
1505                 RTE_PTYPE_L3_IPV4,
1506                 RTE_PTYPE_L3_IPV4_EXT,
1507                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1508                 RTE_PTYPE_L3_IPV6,
1509                 RTE_PTYPE_L3_IPV6_EXT,
1510                 RTE_PTYPE_L2_ETHER_ARP,
1511                 RTE_PTYPE_L4_TCP,
1512                 RTE_PTYPE_L4_UDP
1513         };
1514
1515         return ptypes;
1516 }
1517
1518 /**
1519  * DPDK callback to get information about specific receive queue.
1520  *
1521  * @param dev
1522  *   Pointer to Ethernet device structure.
1523  * @param rx_queue_id
1524  *   Receive queue index.
1525  * @param qinfo
1526  *   Receive queue information structure.
1527  */
1528 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1529                               struct rte_eth_rxq_info *qinfo)
1530 {
1531         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1532         struct mrvl_priv *priv = dev->data->dev_private;
1533         int inq = priv->rxq_map[rx_queue_id].inq;
1534         int tc = priv->rxq_map[rx_queue_id].tc;
1535         struct pp2_ppio_tc_params *tc_params =
1536                 &priv->ppio_params.inqs_params.tcs_params[tc];
1537
1538         qinfo->mp = q->mp;
1539         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1540 }
1541
1542 /**
1543  * DPDK callback to get information about specific transmit queue.
1544  *
1545  * @param dev
1546  *   Pointer to Ethernet device structure.
1547  * @param tx_queue_id
1548  *   Transmit queue index.
1549  * @param qinfo
1550  *   Transmit queue information structure.
1551  */
1552 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1553                               struct rte_eth_txq_info *qinfo)
1554 {
1555         struct mrvl_priv *priv = dev->data->dev_private;
1556         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1557
1558         qinfo->nb_desc =
1559                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1560         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1561 }
1562
1563 /**
1564  * DPDK callback to Configure a VLAN filter.
1565  *
1566  * @param dev
1567  *   Pointer to Ethernet device structure.
1568  * @param vlan_id
1569  *   VLAN ID to filter.
1570  * @param on
1571  *   Toggle filter.
1572  *
1573  * @return
1574  *   0 on success, negative error value otherwise.
1575  */
1576 static int
1577 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1578 {
1579         struct mrvl_priv *priv = dev->data->dev_private;
1580
1581         if (!priv->ppio)
1582                 return -EPERM;
1583
1584         if (priv->isolated)
1585                 return -ENOTSUP;
1586
1587         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1588                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1589 }
1590
1591 /**
1592  * Release buffers to hardware bpool (buffer-pool)
1593  *
1594  * @param rxq
1595  *   Receive queue pointer.
1596  * @param num
1597  *   Number of buffers to release to bpool.
1598  *
1599  * @return
1600  *   0 on success, negative error value otherwise.
1601  */
1602 static int
1603 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1604 {
1605         struct buff_release_entry entries[num];
1606         struct rte_mbuf *mbufs[num];
1607         int i, ret;
1608         unsigned int core_id;
1609         struct pp2_hif *hif;
1610         struct pp2_bpool *bpool;
1611
1612         core_id = rte_lcore_id();
1613         if (core_id == LCORE_ID_ANY)
1614                 core_id = rte_get_main_lcore();
1615
1616         hif = mrvl_get_hif(rxq->priv, core_id);
1617         if (!hif)
1618                 return -1;
1619
1620         bpool = rxq->priv->bpool;
1621
1622         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1623         if (ret)
1624                 return ret;
1625
1626         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1627                 cookie_addr_high =
1628                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1629
1630         for (i = 0; i < num; i++) {
1631                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1632                         != cookie_addr_high) {
1633                         MRVL_LOG(ERR,
1634                                 "mbuf virtual addr high 0x%lx out of range",
1635                                 (uint64_t)mbufs[i] >> 32);
1636                         goto out;
1637                 }
1638
1639                 entries[i].buff.addr =
1640                         rte_mbuf_data_iova_default(mbufs[i]);
1641                 entries[i].buff.cookie = (uint64_t)mbufs[i];
1642                 entries[i].bpool = bpool;
1643         }
1644
1645         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1646         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1647
1648         if (i != num)
1649                 goto out;
1650
1651         return 0;
1652 out:
1653         for (; i < num; i++)
1654                 rte_pktmbuf_free(mbufs[i]);
1655
1656         return -1;
1657 }
1658
1659 /**
1660  * DPDK callback to configure the receive queue.
1661  *
1662  * @param dev
1663  *   Pointer to Ethernet device structure.
1664  * @param idx
1665  *   RX queue index.
1666  * @param desc
1667  *   Number of descriptors to configure in queue.
1668  * @param socket
1669  *   NUMA socket on which memory must be allocated.
1670  * @param conf
1671  *   Thresholds parameters.
1672  * @param mp
1673  *   Memory pool for buffer allocations.
1674  *
1675  * @return
1676  *   0 on success, negative error value otherwise.
1677  */
1678 static int
1679 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1680                     unsigned int socket,
1681                     const struct rte_eth_rxconf *conf,
1682                     struct rte_mempool *mp)
1683 {
1684         struct mrvl_priv *priv = dev->data->dev_private;
1685         struct mrvl_rxq *rxq;
1686         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1687         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1688         int ret, tc, inq;
1689         uint64_t offloads;
1690
1691         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1692
1693         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1694                 /*
1695                  * Unknown TC mapping, mapping will not have a correct queue.
1696                  */
1697                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1698                         idx, priv->ppio_id);
1699                 return -EFAULT;
1700         }
1701
1702         frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
1703                      MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
1704         if (frame_size < max_rx_pkt_len) {
1705                 MRVL_LOG(WARNING,
1706                         "Mbuf size must be increased to %u bytes to hold up "
1707                         "to %u bytes of data.",
1708                         buf_size + max_rx_pkt_len - frame_size,
1709                         max_rx_pkt_len);
1710                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1711                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1712                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1713         }
1714
1715         if (dev->data->rx_queues[idx]) {
1716                 rte_free(dev->data->rx_queues[idx]);
1717                 dev->data->rx_queues[idx] = NULL;
1718         }
1719
1720         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1721         if (!rxq)
1722                 return -ENOMEM;
1723
1724         rxq->priv = priv;
1725         rxq->mp = mp;
1726         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1727         rxq->queue_id = idx;
1728         rxq->port_id = dev->data->port_id;
1729         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1730
1731         tc = priv->rxq_map[rxq->queue_id].tc,
1732         inq = priv->rxq_map[rxq->queue_id].inq;
1733         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1734                 desc;
1735
1736         ret = mrvl_fill_bpool(rxq, desc);
1737         if (ret) {
1738                 rte_free(rxq);
1739                 return ret;
1740         }
1741
1742         priv->bpool_init_size += desc;
1743
1744         dev->data->rx_queues[idx] = rxq;
1745
1746         return 0;
1747 }
1748
1749 /**
1750  * DPDK callback to release the receive queue.
1751  *
1752  * @param rxq
1753  *   Generic receive queue pointer.
1754  */
1755 static void
1756 mrvl_rx_queue_release(void *rxq)
1757 {
1758         struct mrvl_rxq *q = rxq;
1759         struct pp2_ppio_tc_params *tc_params;
1760         int i, num, tc, inq;
1761         struct pp2_hif *hif;
1762         unsigned int core_id = rte_lcore_id();
1763
1764         if (core_id == LCORE_ID_ANY)
1765                 core_id = rte_get_main_lcore();
1766
1767         if (!q)
1768                 return;
1769
1770         hif = mrvl_get_hif(q->priv, core_id);
1771
1772         if (!hif)
1773                 return;
1774
1775         tc = q->priv->rxq_map[q->queue_id].tc;
1776         inq = q->priv->rxq_map[q->queue_id].inq;
1777         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1778         num = tc_params->inqs_params[inq].size;
1779         for (i = 0; i < num; i++) {
1780                 struct pp2_buff_inf inf;
1781                 uint64_t addr;
1782
1783                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1784                 addr = cookie_addr_high | inf.cookie;
1785                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1786         }
1787
1788         rte_free(q);
1789 }
1790
1791 /**
1792  * DPDK callback to configure the transmit queue.
1793  *
1794  * @param dev
1795  *   Pointer to Ethernet device structure.
1796  * @param idx
1797  *   Transmit queue index.
1798  * @param desc
1799  *   Number of descriptors to configure in the queue.
1800  * @param socket
1801  *   NUMA socket on which memory must be allocated.
1802  * @param conf
1803  *   Tx queue configuration parameters.
1804  *
1805  * @return
1806  *   0 on success, negative error value otherwise.
1807  */
1808 static int
1809 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1810                     unsigned int socket,
1811                     const struct rte_eth_txconf *conf)
1812 {
1813         struct mrvl_priv *priv = dev->data->dev_private;
1814         struct mrvl_txq *txq;
1815
1816         if (dev->data->tx_queues[idx]) {
1817                 rte_free(dev->data->tx_queues[idx]);
1818                 dev->data->tx_queues[idx] = NULL;
1819         }
1820
1821         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1822         if (!txq)
1823                 return -ENOMEM;
1824
1825         txq->priv = priv;
1826         txq->queue_id = idx;
1827         txq->port_id = dev->data->port_id;
1828         txq->tx_deferred_start = conf->tx_deferred_start;
1829         dev->data->tx_queues[idx] = txq;
1830
1831         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1832
1833         return 0;
1834 }
1835
1836 /**
1837  * DPDK callback to release the transmit queue.
1838  *
1839  * @param txq
1840  *   Generic transmit queue pointer.
1841  */
1842 static void
1843 mrvl_tx_queue_release(void *txq)
1844 {
1845         struct mrvl_txq *q = txq;
1846
1847         if (!q)
1848                 return;
1849
1850         rte_free(q);
1851 }
1852
1853 /**
1854  * DPDK callback to get flow control configuration.
1855  *
1856  * @param dev
1857  *  Pointer to Ethernet device structure.
1858  * @param fc_conf
1859  *  Pointer to the flow control configuration.
1860  *
1861  * @return
1862  *  0 on success, negative error value otherwise.
1863  */
1864 static int
1865 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1866 {
1867         struct mrvl_priv *priv = dev->data->dev_private;
1868         int ret, en;
1869
1870         if (!priv)
1871                 return -EPERM;
1872
1873         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
1874         if (ret) {
1875                 MRVL_LOG(ERR, "Failed to read rx pause state");
1876                 return ret;
1877         }
1878
1879         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
1880
1881         return 0;
1882 }
1883
1884 /**
1885  * DPDK callback to set flow control configuration.
1886  *
1887  * @param dev
1888  *  Pointer to Ethernet device structure.
1889  * @param fc_conf
1890  *  Pointer to the flow control configuration.
1891  *
1892  * @return
1893  *  0 on success, negative error value otherwise.
1894  */
1895 static int
1896 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1897 {
1898         struct mrvl_priv *priv = dev->data->dev_private;
1899
1900         if (!priv)
1901                 return -EPERM;
1902
1903         if (fc_conf->high_water ||
1904             fc_conf->low_water ||
1905             fc_conf->pause_time ||
1906             fc_conf->mac_ctrl_frame_fwd ||
1907             fc_conf->autoneg) {
1908                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
1909
1910                 return -EINVAL;
1911         }
1912
1913         if (fc_conf->mode == RTE_FC_NONE ||
1914             fc_conf->mode == RTE_FC_RX_PAUSE) {
1915                 int ret, en;
1916
1917                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
1918                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
1919                 if (ret)
1920                         MRVL_LOG(ERR,
1921                                 "Failed to change flowctrl on RX side");
1922
1923                 return ret;
1924         }
1925
1926         return 0;
1927 }
1928
1929 /**
1930  * Update RSS hash configuration
1931  *
1932  * @param dev
1933  *   Pointer to Ethernet device structure.
1934  * @param rss_conf
1935  *   Pointer to RSS configuration.
1936  *
1937  * @return
1938  *   0 on success, negative error value otherwise.
1939  */
1940 static int
1941 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1942                      struct rte_eth_rss_conf *rss_conf)
1943 {
1944         struct mrvl_priv *priv = dev->data->dev_private;
1945
1946         if (priv->isolated)
1947                 return -ENOTSUP;
1948
1949         return mrvl_configure_rss(priv, rss_conf);
1950 }
1951
1952 /**
1953  * DPDK callback to get RSS hash configuration.
1954  *
1955  * @param dev
1956  *   Pointer to Ethernet device structure.
1957  * @rss_conf
1958  *   Pointer to RSS configuration.
1959  *
1960  * @return
1961  *   Always 0.
1962  */
1963 static int
1964 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1965                        struct rte_eth_rss_conf *rss_conf)
1966 {
1967         struct mrvl_priv *priv = dev->data->dev_private;
1968         enum pp2_ppio_hash_type hash_type =
1969                 priv->ppio_params.inqs_params.hash_type;
1970
1971         rss_conf->rss_key = NULL;
1972
1973         if (hash_type == PP2_PPIO_HASH_T_NONE)
1974                 rss_conf->rss_hf = 0;
1975         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1976                 rss_conf->rss_hf = ETH_RSS_IPV4;
1977         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1978                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1979         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1980                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1981
1982         return 0;
1983 }
1984
1985 /**
1986  * DPDK callback to get rte_flow callbacks.
1987  *
1988  * @param dev
1989  *   Pointer to the device structure.
1990  * @param filer_type
1991  *   Flow filter type.
1992  * @param filter_op
1993  *   Flow filter operation.
1994  * @param arg
1995  *   Pointer to pass the flow ops.
1996  *
1997  * @return
1998  *   0 on success, negative error value otherwise.
1999  */
2000 static int
2001 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
2002                      enum rte_filter_type filter_type,
2003                      enum rte_filter_op filter_op, void *arg)
2004 {
2005         switch (filter_type) {
2006         case RTE_ETH_FILTER_GENERIC:
2007                 if (filter_op != RTE_ETH_FILTER_GET)
2008                         return -EINVAL;
2009                 *(const void **)arg = &mrvl_flow_ops;
2010                 return 0;
2011         default:
2012                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
2013                                 filter_type);
2014                 return -EINVAL;
2015         }
2016 }
2017
2018 /**
2019  * DPDK callback to get rte_mtr callbacks.
2020  *
2021  * @param dev
2022  *   Pointer to the device structure.
2023  * @param ops
2024  *   Pointer to pass the mtr ops.
2025  *
2026  * @return
2027  *   Always 0.
2028  */
2029 static int
2030 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2031 {
2032         *(const void **)ops = &mrvl_mtr_ops;
2033
2034         return 0;
2035 }
2036
2037 /**
2038  * DPDK callback to get rte_tm callbacks.
2039  *
2040  * @param dev
2041  *   Pointer to the device structure.
2042  * @param ops
2043  *   Pointer to pass the tm ops.
2044  *
2045  * @return
2046  *   Always 0.
2047  */
2048 static int
2049 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2050 {
2051         *(const void **)ops = &mrvl_tm_ops;
2052
2053         return 0;
2054 }
2055
2056 static const struct eth_dev_ops mrvl_ops = {
2057         .dev_configure = mrvl_dev_configure,
2058         .dev_start = mrvl_dev_start,
2059         .dev_stop = mrvl_dev_stop,
2060         .dev_set_link_up = mrvl_dev_set_link_up,
2061         .dev_set_link_down = mrvl_dev_set_link_down,
2062         .dev_close = mrvl_dev_close,
2063         .link_update = mrvl_link_update,
2064         .promiscuous_enable = mrvl_promiscuous_enable,
2065         .allmulticast_enable = mrvl_allmulticast_enable,
2066         .promiscuous_disable = mrvl_promiscuous_disable,
2067         .allmulticast_disable = mrvl_allmulticast_disable,
2068         .mac_addr_remove = mrvl_mac_addr_remove,
2069         .mac_addr_add = mrvl_mac_addr_add,
2070         .mac_addr_set = mrvl_mac_addr_set,
2071         .mtu_set = mrvl_mtu_set,
2072         .stats_get = mrvl_stats_get,
2073         .stats_reset = mrvl_stats_reset,
2074         .xstats_get = mrvl_xstats_get,
2075         .xstats_reset = mrvl_xstats_reset,
2076         .xstats_get_names = mrvl_xstats_get_names,
2077         .dev_infos_get = mrvl_dev_infos_get,
2078         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2079         .rxq_info_get = mrvl_rxq_info_get,
2080         .txq_info_get = mrvl_txq_info_get,
2081         .vlan_filter_set = mrvl_vlan_filter_set,
2082         .tx_queue_start = mrvl_tx_queue_start,
2083         .tx_queue_stop = mrvl_tx_queue_stop,
2084         .rx_queue_setup = mrvl_rx_queue_setup,
2085         .rx_queue_release = mrvl_rx_queue_release,
2086         .tx_queue_setup = mrvl_tx_queue_setup,
2087         .tx_queue_release = mrvl_tx_queue_release,
2088         .flow_ctrl_get = mrvl_flow_ctrl_get,
2089         .flow_ctrl_set = mrvl_flow_ctrl_set,
2090         .rss_hash_update = mrvl_rss_hash_update,
2091         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2092         .filter_ctrl = mrvl_eth_filter_ctrl,
2093         .mtr_ops_get = mrvl_mtr_ops_get,
2094         .tm_ops_get = mrvl_tm_ops_get,
2095 };
2096
2097 /**
2098  * Return packet type information and l3/l4 offsets.
2099  *
2100  * @param desc
2101  *   Pointer to the received packet descriptor.
2102  * @param l3_offset
2103  *   l3 packet offset.
2104  * @param l4_offset
2105  *   l4 packet offset.
2106  *
2107  * @return
2108  *   Packet type information.
2109  */
2110 static inline uint64_t
2111 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2112                                     uint8_t *l3_offset, uint8_t *l4_offset)
2113 {
2114         enum pp2_inq_l3_type l3_type;
2115         enum pp2_inq_l4_type l4_type;
2116         enum pp2_inq_vlan_tag vlan_tag;
2117         uint64_t packet_type;
2118
2119         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2120         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2121         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2122
2123         packet_type = RTE_PTYPE_L2_ETHER;
2124
2125         switch (vlan_tag) {
2126         case PP2_INQ_VLAN_TAG_SINGLE:
2127                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2128                 break;
2129         case PP2_INQ_VLAN_TAG_DOUBLE:
2130         case PP2_INQ_VLAN_TAG_TRIPLE:
2131                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2132                 break;
2133         default:
2134                 break;
2135         }
2136
2137         switch (l3_type) {
2138         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2139                 packet_type |= RTE_PTYPE_L3_IPV4;
2140                 break;
2141         case PP2_INQ_L3_TYPE_IPV4_OK:
2142                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2143                 break;
2144         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2145                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2146                 break;
2147         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2148                 packet_type |= RTE_PTYPE_L3_IPV6;
2149                 break;
2150         case PP2_INQ_L3_TYPE_IPV6_EXT:
2151                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2152                 break;
2153         case PP2_INQ_L3_TYPE_ARP:
2154                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2155                 /*
2156                  * In case of ARP l4_offset is set to wrong value.
2157                  * Set it to proper one so that later on mbuf->l3_len can be
2158                  * calculated subtracting l4_offset and l3_offset.
2159                  */
2160                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2161                 break;
2162         default:
2163                 break;
2164         }
2165
2166         switch (l4_type) {
2167         case PP2_INQ_L4_TYPE_TCP:
2168                 packet_type |= RTE_PTYPE_L4_TCP;
2169                 break;
2170         case PP2_INQ_L4_TYPE_UDP:
2171                 packet_type |= RTE_PTYPE_L4_UDP;
2172                 break;
2173         default:
2174                 break;
2175         }
2176
2177         return packet_type;
2178 }
2179
2180 /**
2181  * Get offload information from the received packet descriptor.
2182  *
2183  * @param desc
2184  *   Pointer to the received packet descriptor.
2185  *
2186  * @return
2187  *   Mbuf offload flags.
2188  */
2189 static inline uint64_t
2190 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2191 {
2192         uint64_t flags;
2193         enum pp2_inq_desc_status status;
2194
2195         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2196         if (unlikely(status != PP2_DESC_ERR_OK))
2197                 flags = PKT_RX_IP_CKSUM_BAD;
2198         else
2199                 flags = PKT_RX_IP_CKSUM_GOOD;
2200
2201         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2202         if (unlikely(status != PP2_DESC_ERR_OK))
2203                 flags |= PKT_RX_L4_CKSUM_BAD;
2204         else
2205                 flags |= PKT_RX_L4_CKSUM_GOOD;
2206
2207         return flags;
2208 }
2209
2210 /**
2211  * DPDK callback for receive.
2212  *
2213  * @param rxq
2214  *   Generic pointer to the receive queue.
2215  * @param rx_pkts
2216  *   Array to store received packets.
2217  * @param nb_pkts
2218  *   Maximum number of packets in array.
2219  *
2220  * @return
2221  *   Number of packets successfully received.
2222  */
2223 static uint16_t
2224 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2225 {
2226         struct mrvl_rxq *q = rxq;
2227         struct pp2_ppio_desc descs[nb_pkts];
2228         struct pp2_bpool *bpool;
2229         int i, ret, rx_done = 0;
2230         int num;
2231         struct pp2_hif *hif;
2232         unsigned int core_id = rte_lcore_id();
2233
2234         hif = mrvl_get_hif(q->priv, core_id);
2235
2236         if (unlikely(!q->priv->ppio || !hif))
2237                 return 0;
2238
2239         bpool = q->priv->bpool;
2240
2241         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2242                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2243         if (unlikely(ret < 0))
2244                 return 0;
2245
2246         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2247
2248         for (i = 0; i < nb_pkts; i++) {
2249                 struct rte_mbuf *mbuf;
2250                 uint8_t l3_offset, l4_offset;
2251                 enum pp2_inq_desc_status status;
2252                 uint64_t addr;
2253
2254                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2255                         struct pp2_ppio_desc *pref_desc;
2256                         u64 pref_addr;
2257
2258                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2259                         pref_addr = cookie_addr_high |
2260                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2261                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2262                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2263                 }
2264
2265                 addr = cookie_addr_high |
2266                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2267                 mbuf = (struct rte_mbuf *)addr;
2268                 rte_pktmbuf_reset(mbuf);
2269
2270                 /* drop packet in case of mac, overrun or resource error */
2271                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2272                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2273                         struct pp2_buff_inf binf = {
2274                                 .addr = rte_mbuf_data_iova_default(mbuf),
2275                                 .cookie = (uint64_t)mbuf,
2276                         };
2277
2278                         pp2_bpool_put_buff(hif, bpool, &binf);
2279                         mrvl_port_bpool_size
2280                                 [bpool->pp2_id][bpool->id][core_id]++;
2281                         q->drop_mac++;
2282                         continue;
2283                 }
2284
2285                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2286                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2287                 mbuf->data_len = mbuf->pkt_len;
2288                 mbuf->port = q->port_id;
2289                 mbuf->packet_type =
2290                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2291                                                             &l3_offset,
2292                                                             &l4_offset);
2293                 mbuf->l2_len = l3_offset;
2294                 mbuf->l3_len = l4_offset - l3_offset;
2295
2296                 if (likely(q->cksum_enabled))
2297                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2298
2299                 rx_pkts[rx_done++] = mbuf;
2300                 q->bytes_recv += mbuf->pkt_len;
2301         }
2302
2303         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2304                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2305
2306                 if (unlikely(num <= q->priv->bpool_min_size ||
2307                              (!rx_done && num < q->priv->bpool_init_size))) {
2308                         mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2309                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2310                         int i;
2311                         int pkt_to_remove = num - q->priv->bpool_init_size;
2312                         struct rte_mbuf *mbuf;
2313                         struct pp2_buff_inf buff;
2314
2315                         for (i = 0; i < pkt_to_remove; i++) {
2316                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2317                                 if (ret)
2318                                         break;
2319                                 mbuf = (struct rte_mbuf *)
2320                                         (cookie_addr_high | buff.cookie);
2321                                 rte_pktmbuf_free(mbuf);
2322                         }
2323                         mrvl_port_bpool_size
2324                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2325                 }
2326                 rte_spinlock_unlock(&q->priv->lock);
2327         }
2328
2329         return rx_done;
2330 }
2331
2332 /**
2333  * Prepare offload information.
2334  *
2335  * @param ol_flags
2336  *   Offload flags.
2337  * @param packet_type
2338  *   Packet type bitfield.
2339  * @param l3_type
2340  *   Pointer to the pp2_ouq_l3_type structure.
2341  * @param l4_type
2342  *   Pointer to the pp2_outq_l4_type structure.
2343  * @param gen_l3_cksum
2344  *   Will be set to 1 in case l3 checksum is computed.
2345  * @param l4_cksum
2346  *   Will be set to 1 in case l4 checksum is computed.
2347  *
2348  * @return
2349  *   0 on success, negative error value otherwise.
2350  */
2351 static inline int
2352 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2353                         enum pp2_outq_l3_type *l3_type,
2354                         enum pp2_outq_l4_type *l4_type,
2355                         int *gen_l3_cksum,
2356                         int *gen_l4_cksum)
2357 {
2358         /*
2359          * Based on ol_flags prepare information
2360          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2361          * for offloading.
2362          */
2363         if (ol_flags & PKT_TX_IPV4) {
2364                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2365                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2366         } else if (ol_flags & PKT_TX_IPV6) {
2367                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2368                 /* no checksum for ipv6 header */
2369                 *gen_l3_cksum = 0;
2370         } else {
2371                 /* if something different then stop processing */
2372                 return -1;
2373         }
2374
2375         ol_flags &= PKT_TX_L4_MASK;
2376         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2377             ol_flags == PKT_TX_TCP_CKSUM) {
2378                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2379                 *gen_l4_cksum = 1;
2380         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2381                    ol_flags == PKT_TX_UDP_CKSUM) {
2382                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2383                 *gen_l4_cksum = 1;
2384         } else {
2385                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2386                 /* no checksum for other type */
2387                 *gen_l4_cksum = 0;
2388         }
2389
2390         return 0;
2391 }
2392
2393 /**
2394  * Release already sent buffers to bpool (buffer-pool).
2395  *
2396  * @param ppio
2397  *   Pointer to the port structure.
2398  * @param hif
2399  *   Pointer to the MUSDK hardware interface.
2400  * @param sq
2401  *   Pointer to the shadow queue.
2402  * @param qid
2403  *   Queue id number.
2404  * @param force
2405  *   Force releasing packets.
2406  */
2407 static inline void
2408 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2409                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2410                        int qid, int force)
2411 {
2412         struct buff_release_entry *entry;
2413         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2414         int i;
2415
2416         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2417
2418         sq->num_to_release += nb_done;
2419
2420         if (likely(!force &&
2421                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2422                 return;
2423
2424         nb_done = sq->num_to_release;
2425         sq->num_to_release = 0;
2426
2427         for (i = 0; i < nb_done; i++) {
2428                 entry = &sq->ent[sq->tail + num];
2429                 if (unlikely(!entry->buff.addr)) {
2430                         MRVL_LOG(ERR,
2431                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2432                                 sq->tail, (u64)entry->buff.cookie,
2433                                 (u64)entry->buff.addr);
2434                         skip_bufs = 1;
2435                         goto skip;
2436                 }
2437
2438                 if (unlikely(!entry->bpool)) {
2439                         struct rte_mbuf *mbuf;
2440
2441                         mbuf = (struct rte_mbuf *)
2442                                (cookie_addr_high | entry->buff.cookie);
2443                         rte_pktmbuf_free(mbuf);
2444                         skip_bufs = 1;
2445                         goto skip;
2446                 }
2447
2448                 mrvl_port_bpool_size
2449                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2450                 num++;
2451                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2452                         goto skip;
2453                 continue;
2454 skip:
2455                 if (likely(num))
2456                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2457                 num += skip_bufs;
2458                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2459                 sq->size -= num;
2460                 num = 0;
2461                 skip_bufs = 0;
2462         }
2463
2464         if (likely(num)) {
2465                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2466                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2467                 sq->size -= num;
2468         }
2469 }
2470
2471 /**
2472  * DPDK callback for transmit.
2473  *
2474  * @param txq
2475  *   Generic pointer transmit queue.
2476  * @param tx_pkts
2477  *   Packets to transmit.
2478  * @param nb_pkts
2479  *   Number of packets in array.
2480  *
2481  * @return
2482  *   Number of packets successfully transmitted.
2483  */
2484 static uint16_t
2485 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2486 {
2487         struct mrvl_txq *q = txq;
2488         struct mrvl_shadow_txq *sq;
2489         struct pp2_hif *hif;
2490         struct pp2_ppio_desc descs[nb_pkts];
2491         unsigned int core_id = rte_lcore_id();
2492         int i, ret, bytes_sent = 0;
2493         uint16_t num, sq_free_size;
2494         uint64_t addr;
2495
2496         hif = mrvl_get_hif(q->priv, core_id);
2497         sq = &q->shadow_txqs[core_id];
2498
2499         if (unlikely(!q->priv->ppio || !hif))
2500                 return 0;
2501
2502         if (sq->size)
2503                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2504                                        sq, q->queue_id, 0);
2505
2506         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2507         if (unlikely(nb_pkts > sq_free_size))
2508                 nb_pkts = sq_free_size;
2509
2510         for (i = 0; i < nb_pkts; i++) {
2511                 struct rte_mbuf *mbuf = tx_pkts[i];
2512                 int gen_l3_cksum, gen_l4_cksum;
2513                 enum pp2_outq_l3_type l3_type;
2514                 enum pp2_outq_l4_type l4_type;
2515
2516                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2517                         struct rte_mbuf *pref_pkt_hdr;
2518
2519                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2520                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2521                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2522                 }
2523
2524                 mrvl_fill_shadowq(sq, mbuf);
2525                 mrvl_fill_desc(&descs[i], mbuf);
2526
2527                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2528                 /*
2529                  * in case unsupported ol_flags were passed
2530                  * do not update descriptor offload information
2531                  */
2532                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2533                                               &l3_type, &l4_type, &gen_l3_cksum,
2534                                               &gen_l4_cksum);
2535                 if (unlikely(ret))
2536                         continue;
2537
2538                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2539                                                   mbuf->l2_len,
2540                                                   mbuf->l2_len + mbuf->l3_len,
2541                                                   gen_l3_cksum, gen_l4_cksum);
2542         }
2543
2544         num = nb_pkts;
2545         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2546         /* number of packets that were not sent */
2547         if (unlikely(num > nb_pkts)) {
2548                 for (i = nb_pkts; i < num; i++) {
2549                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2550                                 MRVL_PP2_TX_SHADOWQ_MASK;
2551                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2552                         bytes_sent -=
2553                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2554                 }
2555                 sq->size -= num - nb_pkts;
2556         }
2557
2558         q->bytes_sent += bytes_sent;
2559
2560         return nb_pkts;
2561 }
2562
2563 /** DPDK callback for S/G transmit.
2564  *
2565  * @param txq
2566  *   Generic pointer transmit queue.
2567  * @param tx_pkts
2568  *   Packets to transmit.
2569  * @param nb_pkts
2570  *   Number of packets in array.
2571  *
2572  * @return
2573  *   Number of packets successfully transmitted.
2574  */
2575 static uint16_t
2576 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2577                      uint16_t nb_pkts)
2578 {
2579         struct mrvl_txq *q = txq;
2580         struct mrvl_shadow_txq *sq;
2581         struct pp2_hif *hif;
2582         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2583         struct pp2_ppio_sg_pkts pkts;
2584         uint8_t frags[nb_pkts];
2585         unsigned int core_id = rte_lcore_id();
2586         int i, j, ret, bytes_sent = 0;
2587         int tail, tail_first;
2588         uint16_t num, sq_free_size;
2589         uint16_t nb_segs, total_descs = 0;
2590         uint64_t addr;
2591
2592         hif = mrvl_get_hif(q->priv, core_id);
2593         sq = &q->shadow_txqs[core_id];
2594         pkts.frags = frags;
2595         pkts.num = 0;
2596
2597         if (unlikely(!q->priv->ppio || !hif))
2598                 return 0;
2599
2600         if (sq->size)
2601                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2602                                        sq, q->queue_id, 0);
2603
2604         /* Save shadow queue free size */
2605         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2606
2607         tail = 0;
2608         for (i = 0; i < nb_pkts; i++) {
2609                 struct rte_mbuf *mbuf = tx_pkts[i];
2610                 struct rte_mbuf *seg = NULL;
2611                 int gen_l3_cksum, gen_l4_cksum;
2612                 enum pp2_outq_l3_type l3_type;
2613                 enum pp2_outq_l4_type l4_type;
2614
2615                 nb_segs = mbuf->nb_segs;
2616                 tail_first = tail;
2617                 total_descs += nb_segs;
2618
2619                 /*
2620                  * Check if total_descs does not exceed
2621                  * shadow queue free size
2622                  */
2623                 if (unlikely(total_descs > sq_free_size)) {
2624                         total_descs -= nb_segs;
2625                         break;
2626                 }
2627
2628                 /* Check if nb_segs does not exceed the max nb of desc per
2629                  * fragmented packet
2630                  */
2631                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2632                         total_descs -= nb_segs;
2633                         RTE_LOG(ERR, PMD,
2634                                 "Too many segments. Packet won't be sent.\n");
2635                         break;
2636                 }
2637
2638                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2639                         struct rte_mbuf *pref_pkt_hdr;
2640
2641                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2642                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2643                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2644                 }
2645
2646                 pkts.frags[pkts.num] = nb_segs;
2647                 pkts.num++;
2648
2649                 seg = mbuf;
2650                 for (j = 0; j < nb_segs - 1; j++) {
2651                         /* For the subsequent segments, set shadow queue
2652                          * buffer to NULL
2653                          */
2654                         mrvl_fill_shadowq(sq, NULL);
2655                         mrvl_fill_desc(&descs[tail], seg);
2656
2657                         tail++;
2658                         seg = seg->next;
2659                 }
2660                 /* Put first mbuf info in last shadow queue entry */
2661                 mrvl_fill_shadowq(sq, mbuf);
2662                 /* Update descriptor with last segment */
2663                 mrvl_fill_desc(&descs[tail++], seg);
2664
2665                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2666                 /* In case unsupported ol_flags were passed
2667                  * do not update descriptor offload information
2668                  */
2669                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2670                                               &l3_type, &l4_type, &gen_l3_cksum,
2671                                               &gen_l4_cksum);
2672                 if (unlikely(ret))
2673                         continue;
2674
2675                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2676                                                   l4_type, mbuf->l2_len,
2677                                                   mbuf->l2_len + mbuf->l3_len,
2678                                                   gen_l3_cksum, gen_l4_cksum);
2679         }
2680
2681         num = total_descs;
2682         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2683                          &total_descs, &pkts);
2684         /* number of packets that were not sent */
2685         if (unlikely(num > total_descs)) {
2686                 for (i = total_descs; i < num; i++) {
2687                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2688                                 MRVL_PP2_TX_SHADOWQ_MASK;
2689
2690                         addr = sq->ent[sq->head].buff.cookie;
2691                         if (addr)
2692                                 bytes_sent -=
2693                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2694                                                 (cookie_addr_high | addr));
2695                 }
2696                 sq->size -= num - total_descs;
2697                 nb_pkts = pkts.num;
2698         }
2699
2700         q->bytes_sent += bytes_sent;
2701
2702         return nb_pkts;
2703 }
2704
2705 /**
2706  * Initialize packet processor.
2707  *
2708  * @return
2709  *   0 on success, negative error value otherwise.
2710  */
2711 static int
2712 mrvl_init_pp2(void)
2713 {
2714         struct pp2_init_params init_params;
2715
2716         memset(&init_params, 0, sizeof(init_params));
2717         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2718         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2719         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2720
2721         return pp2_init(&init_params);
2722 }
2723
2724 /**
2725  * Deinitialize packet processor.
2726  *
2727  * @return
2728  *   0 on success, negative error value otherwise.
2729  */
2730 static void
2731 mrvl_deinit_pp2(void)
2732 {
2733         pp2_deinit();
2734 }
2735
2736 /**
2737  * Create private device structure.
2738  *
2739  * @param dev_name
2740  *   Pointer to the port name passed in the initialization parameters.
2741  *
2742  * @return
2743  *   Pointer to the newly allocated private device structure.
2744  */
2745 static struct mrvl_priv *
2746 mrvl_priv_create(const char *dev_name)
2747 {
2748         struct pp2_bpool_params bpool_params;
2749         char match[MRVL_MATCH_LEN];
2750         struct mrvl_priv *priv;
2751         int ret, bpool_bit;
2752
2753         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2754         if (!priv)
2755                 return NULL;
2756
2757         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2758                                        &priv->pp_id, &priv->ppio_id);
2759         if (ret)
2760                 goto out_free_priv;
2761
2762         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2763                                      PP2_BPOOL_NUM_POOLS);
2764         if (bpool_bit < 0)
2765                 goto out_free_priv;
2766         priv->bpool_bit = bpool_bit;
2767
2768         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2769                  priv->bpool_bit);
2770         memset(&bpool_params, 0, sizeof(bpool_params));
2771         bpool_params.match = match;
2772         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2773         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2774         if (ret)
2775                 goto out_clear_bpool_bit;
2776
2777         priv->ppio_params.type = PP2_PPIO_T_NIC;
2778         rte_spinlock_init(&priv->lock);
2779
2780         return priv;
2781 out_clear_bpool_bit:
2782         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2783 out_free_priv:
2784         rte_free(priv);
2785         return NULL;
2786 }
2787
2788 /**
2789  * Create device representing Ethernet port.
2790  *
2791  * @param name
2792  *   Pointer to the port's name.
2793  *
2794  * @return
2795  *   0 on success, negative error value otherwise.
2796  */
2797 static int
2798 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2799 {
2800         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2801         struct rte_eth_dev *eth_dev;
2802         struct mrvl_priv *priv;
2803         struct ifreq req;
2804
2805         eth_dev = rte_eth_dev_allocate(name);
2806         if (!eth_dev)
2807                 return -ENOMEM;
2808
2809         priv = mrvl_priv_create(name);
2810         if (!priv) {
2811                 ret = -ENOMEM;
2812                 goto out_free;
2813         }
2814         eth_dev->data->dev_private = priv;
2815
2816         eth_dev->data->mac_addrs =
2817                 rte_zmalloc("mac_addrs",
2818                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2819         if (!eth_dev->data->mac_addrs) {
2820                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2821                 ret = -ENOMEM;
2822                 goto out_free;
2823         }
2824
2825         memset(&req, 0, sizeof(req));
2826         strcpy(req.ifr_name, name);
2827         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2828         if (ret)
2829                 goto out_free;
2830
2831         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2832                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
2833
2834         eth_dev->device = &vdev->device;
2835         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2836         mrvl_set_tx_function(eth_dev);
2837         eth_dev->dev_ops = &mrvl_ops;
2838         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
2839
2840         rte_eth_dev_probing_finish(eth_dev);
2841         return 0;
2842 out_free:
2843         rte_eth_dev_release_port(eth_dev);
2844
2845         return ret;
2846 }
2847
2848 /**
2849  * Callback used by rte_kvargs_process() during argument parsing.
2850  *
2851  * @param key
2852  *   Pointer to the parsed key (unused).
2853  * @param value
2854  *   Pointer to the parsed value.
2855  * @param extra_args
2856  *   Pointer to the extra arguments which contains address of the
2857  *   table of pointers to parsed interface names.
2858  *
2859  * @return
2860  *   Always 0.
2861  */
2862 static int
2863 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2864                  void *extra_args)
2865 {
2866         struct mrvl_ifnames *ifnames = extra_args;
2867
2868         ifnames->names[ifnames->idx++] = value;
2869
2870         return 0;
2871 }
2872
2873 /**
2874  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2875  */
2876 static void
2877 mrvl_deinit_hifs(void)
2878 {
2879         int i;
2880
2881         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2882                 if (hifs[i])
2883                         pp2_hif_deinit(hifs[i]);
2884         }
2885         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2886         memset(hifs, 0, sizeof(hifs));
2887 }
2888
2889 /**
2890  * DPDK callback to register the virtual device.
2891  *
2892  * @param vdev
2893  *   Pointer to the virtual device.
2894  *
2895  * @return
2896  *   0 on success, negative error value otherwise.
2897  */
2898 static int
2899 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2900 {
2901         struct rte_kvargs *kvlist;
2902         struct mrvl_ifnames ifnames;
2903         int ret = -EINVAL;
2904         uint32_t i, ifnum, cfgnum;
2905         const char *params;
2906
2907         params = rte_vdev_device_args(vdev);
2908         if (!params)
2909                 return -EINVAL;
2910
2911         kvlist = rte_kvargs_parse(params, valid_args);
2912         if (!kvlist)
2913                 return -EINVAL;
2914
2915         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2916         if (ifnum > RTE_DIM(ifnames.names))
2917                 goto out_free_kvlist;
2918
2919         ifnames.idx = 0;
2920         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2921                            mrvl_get_ifnames, &ifnames);
2922
2923
2924         /*
2925          * The below system initialization should be done only once,
2926          * on the first provided configuration file
2927          */
2928         if (!mrvl_qos_cfg) {
2929                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2930                 MRVL_LOG(INFO, "Parsing config file!");
2931                 if (cfgnum > 1) {
2932                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
2933                         goto out_free_kvlist;
2934                 } else if (cfgnum == 1) {
2935                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2936                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2937                 }
2938         }
2939
2940         if (mrvl_dev_num)
2941                 goto init_devices;
2942
2943         MRVL_LOG(INFO, "Perform MUSDK initializations");
2944
2945         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
2946         if (ret)
2947                 goto out_free_kvlist;
2948
2949         ret = mrvl_init_pp2();
2950         if (ret) {
2951                 MRVL_LOG(ERR, "Failed to init PP!");
2952                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2953                 goto out_free_kvlist;
2954         }
2955
2956         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2957         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2958
2959         mrvl_lcore_first = RTE_MAX_LCORE;
2960         mrvl_lcore_last = 0;
2961
2962 init_devices:
2963         for (i = 0; i < ifnum; i++) {
2964                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
2965                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2966                 if (ret)
2967                         goto out_cleanup;
2968                 mrvl_dev_num++;
2969         }
2970
2971         rte_kvargs_free(kvlist);
2972
2973         return 0;
2974 out_cleanup:
2975         rte_pmd_mrvl_remove(vdev);
2976
2977 out_free_kvlist:
2978         rte_kvargs_free(kvlist);
2979
2980         return ret;
2981 }
2982
2983 /**
2984  * DPDK callback to remove virtual device.
2985  *
2986  * @param vdev
2987  *   Pointer to the removed virtual device.
2988  *
2989  * @return
2990  *   0 on success, negative error value otherwise.
2991  */
2992 static int
2993 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
2994 {
2995         uint16_t port_id;
2996         int ret = 0;
2997
2998         RTE_ETH_FOREACH_DEV(port_id) {
2999                 if (rte_eth_devices[port_id].device != &vdev->device)
3000                         continue;
3001                 ret |= rte_eth_dev_close(port_id);
3002         }
3003
3004         return ret == 0 ? 0 : -EIO;
3005 }
3006
3007 static struct rte_vdev_driver pmd_mrvl_drv = {
3008         .probe = rte_pmd_mrvl_probe,
3009         .remove = rte_pmd_mrvl_remove,
3010 };
3011
3012 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3013 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3014 RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);