1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2014-2018 Netronome Systems, Inc.
5 * Small portions derived from code Copyright(c) 2010-2015 Intel Corporation.
9 * vim:shiftwidth=8:noexpandtab
11 * @file dpdk/pmd/nfp_common.c
13 * Netronome vNIC DPDK Poll-Mode Driver: Common files
16 #include <rte_byteorder.h>
17 #include <rte_common.h>
19 #include <rte_debug.h>
20 #include <ethdev_driver.h>
21 #include <ethdev_pci.h>
23 #include <rte_ether.h>
24 #include <rte_malloc.h>
25 #include <rte_memzone.h>
26 #include <rte_mempool.h>
27 #include <rte_version.h>
28 #include <rte_string_fns.h>
29 #include <rte_alarm.h>
30 #include <rte_spinlock.h>
31 #include <rte_service_component.h>
33 #include "nfpcore/nfp_cpp.h"
34 #include "nfpcore/nfp_nffw.h"
35 #include "nfpcore/nfp_hwinfo.h"
36 #include "nfpcore/nfp_mip.h"
37 #include "nfpcore/nfp_rtsym.h"
38 #include "nfpcore/nfp_nsp.h"
40 #include "nfp_common.h"
44 #include "nfp_cpp_bridge.h"
46 #include <sys/types.h>
47 #include <sys/socket.h>
51 #include <sys/ioctl.h>
55 __nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t update)
61 PMD_DRV_LOG(DEBUG, "Writing to the configuration queue (%p)...",
64 if (hw->qcp_cfg == NULL)
65 rte_panic("Bad configuration queue pointer\n");
67 nfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1);
70 wait.tv_nsec = 1000000;
72 PMD_DRV_LOG(DEBUG, "Polling for update ack...");
74 /* Poll update field, waiting for NFP to ack the config */
75 for (cnt = 0; ; cnt++) {
76 new = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE);
79 if (new & NFP_NET_CFG_UPDATE_ERR) {
80 PMD_INIT_LOG(ERR, "Reconfig error: 0x%08x", new);
83 if (cnt >= NFP_NET_POLL_TIMEOUT) {
84 PMD_INIT_LOG(ERR, "Reconfig timeout for 0x%08x after"
85 " %dms", update, cnt);
86 rte_panic("Exiting\n");
88 nanosleep(&wait, 0); /* waiting for a 1ms */
90 PMD_DRV_LOG(DEBUG, "Ack DONE");
96 * @nn: device to reconfigure
97 * @ctrl: The value for the ctrl field in the BAR config
98 * @update: The value for the update field in the BAR config
100 * Write the update word to the BAR and ping the reconfig queue. Then poll
101 * until the firmware has acknowledged the update by zeroing the update word.
104 nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t ctrl, uint32_t update)
108 PMD_DRV_LOG(DEBUG, "nfp_net_reconfig: ctrl=%08x update=%08x",
111 rte_spinlock_lock(&hw->reconfig_lock);
113 nn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl);
114 nn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update);
118 err = __nfp_net_reconfig(hw, update);
120 rte_spinlock_unlock(&hw->reconfig_lock);
126 * Reconfig errors imply situations where they can be handled.
127 * Otherwise, rte_panic is called inside __nfp_net_reconfig
129 PMD_INIT_LOG(ERR, "Error nfp_net reconfig for ctrl: %x update: %x",
135 * Configure an Ethernet device. This function must be invoked first
136 * before any other function in the Ethernet API. This function can
137 * also be re-invoked when a device is in the stopped state.
140 nfp_net_configure(struct rte_eth_dev *dev)
142 struct rte_eth_conf *dev_conf;
143 struct rte_eth_rxmode *rxmode;
144 struct rte_eth_txmode *txmode;
145 struct nfp_net_hw *hw;
147 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
150 * A DPDK app sends info about how many queues to use and how
151 * those queues need to be configured. This is used by the
152 * DPDK core and it makes sure no more queues than those
153 * advertised by the driver are requested. This function is
154 * called after that internal process
157 PMD_INIT_LOG(DEBUG, "Configure");
159 dev_conf = &dev->data->dev_conf;
160 rxmode = &dev_conf->rxmode;
161 txmode = &dev_conf->txmode;
163 if (rxmode->mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
164 rxmode->offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
166 /* Checking TX mode */
167 if (txmode->mq_mode) {
168 PMD_INIT_LOG(INFO, "TX mq_mode DCB and VMDq not supported");
172 /* Checking RX mode */
173 if (rxmode->mq_mode & RTE_ETH_MQ_RX_RSS &&
174 !(hw->cap & NFP_NET_CFG_CTRL_RSS)) {
175 PMD_INIT_LOG(INFO, "RSS not supported");
179 /* Checking MTU set */
180 if (rxmode->mtu > hw->flbufsz) {
181 PMD_INIT_LOG(INFO, "MTU (%u) larger then current mbufsize (%u) not supported",
182 rxmode->mtu, hw->flbufsz);
190 nfp_net_enable_queues(struct rte_eth_dev *dev)
192 struct nfp_net_hw *hw;
193 uint64_t enabled_queues = 0;
196 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
198 /* Enabling the required TX queues in the device */
199 for (i = 0; i < dev->data->nb_tx_queues; i++)
200 enabled_queues |= (1 << i);
202 nn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, enabled_queues);
206 /* Enabling the required RX queues in the device */
207 for (i = 0; i < dev->data->nb_rx_queues; i++)
208 enabled_queues |= (1 << i);
210 nn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, enabled_queues);
214 nfp_net_disable_queues(struct rte_eth_dev *dev)
216 struct nfp_net_hw *hw;
217 uint32_t new_ctrl, update = 0;
219 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
221 nn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, 0);
222 nn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, 0);
224 new_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_ENABLE;
225 update = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |
226 NFP_NET_CFG_UPDATE_MSIX;
228 if (hw->cap & NFP_NET_CFG_CTRL_RINGCFG)
229 new_ctrl &= ~NFP_NET_CFG_CTRL_RINGCFG;
231 /* If an error when reconfig we avoid to change hw state */
232 if (nfp_net_reconfig(hw, new_ctrl, update) < 0)
239 nfp_net_params_setup(struct nfp_net_hw *hw)
241 nn_cfg_writel(hw, NFP_NET_CFG_MTU, hw->mtu);
242 nn_cfg_writel(hw, NFP_NET_CFG_FLBUFSZ, hw->flbufsz);
246 nfp_net_cfg_queue_setup(struct nfp_net_hw *hw)
248 hw->qcp_cfg = hw->tx_bar + NFP_QCP_QUEUE_ADDR_SZ;
251 #define ETH_ADDR_LEN 6
254 nfp_eth_copy_mac(uint8_t *dst, const uint8_t *src)
258 for (i = 0; i < ETH_ADDR_LEN; i++)
263 nfp_net_write_mac(struct nfp_net_hw *hw, uint8_t *mac)
265 uint32_t mac0 = *(uint32_t *)mac;
268 nn_writel(rte_cpu_to_be_32(mac0), hw->ctrl_bar + NFP_NET_CFG_MACADDR);
271 mac1 = *(uint16_t *)mac;
272 nn_writew(rte_cpu_to_be_16(mac1),
273 hw->ctrl_bar + NFP_NET_CFG_MACADDR + 6);
277 nfp_set_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
279 struct nfp_net_hw *hw;
280 uint32_t update, ctrl;
282 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
283 if ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) &&
284 !(hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR)) {
285 PMD_INIT_LOG(INFO, "MAC address unable to change when"
290 /* Writing new MAC to the specific port BAR address */
291 nfp_net_write_mac(hw, (uint8_t *)mac_addr);
293 /* Signal the NIC about the change */
294 update = NFP_NET_CFG_UPDATE_MACADDR;
296 if ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) &&
297 (hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR))
298 ctrl |= NFP_NET_CFG_CTRL_LIVE_ADDR;
299 if (nfp_net_reconfig(hw, ctrl, update) < 0) {
300 PMD_INIT_LOG(INFO, "MAC address update failed");
307 nfp_configure_rx_interrupt(struct rte_eth_dev *dev,
308 struct rte_intr_handle *intr_handle)
310 struct nfp_net_hw *hw;
313 if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
314 dev->data->nb_rx_queues)) {
315 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
316 " intr_vec", dev->data->nb_rx_queues);
320 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
322 if (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) {
323 PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with UIO");
324 /* UIO just supports one queue and no LSC*/
325 nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(0), 0);
326 if (rte_intr_vec_list_index_set(intr_handle, 0, 0))
329 PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with VFIO");
330 for (i = 0; i < dev->data->nb_rx_queues; i++) {
332 * The first msix vector is reserved for non
335 nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(i), i + 1);
336 if (rte_intr_vec_list_index_set(intr_handle, i,
339 PMD_INIT_LOG(DEBUG, "intr_vec[%d]= %d", i,
340 rte_intr_vec_list_index_get(intr_handle,
345 /* Avoiding TX interrupts */
346 hw->ctrl |= NFP_NET_CFG_CTRL_MSIX_TX_OFF;
351 nfp_check_offloads(struct rte_eth_dev *dev)
353 struct nfp_net_hw *hw;
354 struct rte_eth_conf *dev_conf;
355 struct rte_eth_rxmode *rxmode;
356 struct rte_eth_txmode *txmode;
359 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
361 dev_conf = &dev->data->dev_conf;
362 rxmode = &dev_conf->rxmode;
363 txmode = &dev_conf->txmode;
365 if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM) {
366 if (hw->cap & NFP_NET_CFG_CTRL_RXCSUM)
367 ctrl |= NFP_NET_CFG_CTRL_RXCSUM;
370 if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
371 if (hw->cap & NFP_NET_CFG_CTRL_RXVLAN)
372 ctrl |= NFP_NET_CFG_CTRL_RXVLAN;
375 hw->mtu = dev->data->mtu;
377 if (txmode->offloads & RTE_ETH_TX_OFFLOAD_VLAN_INSERT)
378 ctrl |= NFP_NET_CFG_CTRL_TXVLAN;
381 if (hw->cap & NFP_NET_CFG_CTRL_L2BC)
382 ctrl |= NFP_NET_CFG_CTRL_L2BC;
385 if (hw->cap & NFP_NET_CFG_CTRL_L2MC)
386 ctrl |= NFP_NET_CFG_CTRL_L2MC;
388 /* TX checksum offload */
389 if (txmode->offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM ||
390 txmode->offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM ||
391 txmode->offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
392 ctrl |= NFP_NET_CFG_CTRL_TXCSUM;
395 if (txmode->offloads & RTE_ETH_TX_OFFLOAD_TCP_TSO) {
396 if (hw->cap & NFP_NET_CFG_CTRL_LSO)
397 ctrl |= NFP_NET_CFG_CTRL_LSO;
399 ctrl |= NFP_NET_CFG_CTRL_LSO2;
403 if (txmode->offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
404 ctrl |= NFP_NET_CFG_CTRL_GATHER;
410 nfp_net_promisc_enable(struct rte_eth_dev *dev)
412 uint32_t new_ctrl, update = 0;
413 struct nfp_net_hw *hw;
416 PMD_DRV_LOG(DEBUG, "Promiscuous mode enable");
418 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
420 if (!(hw->cap & NFP_NET_CFG_CTRL_PROMISC)) {
421 PMD_INIT_LOG(INFO, "Promiscuous mode not supported");
425 if (hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) {
426 PMD_DRV_LOG(INFO, "Promiscuous mode already enabled");
430 new_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_PROMISC;
431 update = NFP_NET_CFG_UPDATE_GEN;
434 * DPDK sets promiscuous mode on just after this call assuming
435 * it can not fail ...
437 ret = nfp_net_reconfig(hw, new_ctrl, update);
447 nfp_net_promisc_disable(struct rte_eth_dev *dev)
449 uint32_t new_ctrl, update = 0;
450 struct nfp_net_hw *hw;
453 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
455 if ((hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) == 0) {
456 PMD_DRV_LOG(INFO, "Promiscuous mode already disabled");
460 new_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_PROMISC;
461 update = NFP_NET_CFG_UPDATE_GEN;
464 * DPDK sets promiscuous mode off just before this call
465 * assuming it can not fail ...
467 ret = nfp_net_reconfig(hw, new_ctrl, update);
477 * return 0 means link status changed, -1 means not changed
479 * Wait to complete is needed as it can take up to 9 seconds to get the Link
483 nfp_net_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
485 struct nfp_net_hw *hw;
486 struct rte_eth_link link;
487 uint32_t nn_link_status;
490 static const uint32_t ls_to_ethtool[] = {
491 [NFP_NET_CFG_STS_LINK_RATE_UNSUPPORTED] = RTE_ETH_SPEED_NUM_NONE,
492 [NFP_NET_CFG_STS_LINK_RATE_UNKNOWN] = RTE_ETH_SPEED_NUM_NONE,
493 [NFP_NET_CFG_STS_LINK_RATE_1G] = RTE_ETH_SPEED_NUM_1G,
494 [NFP_NET_CFG_STS_LINK_RATE_10G] = RTE_ETH_SPEED_NUM_10G,
495 [NFP_NET_CFG_STS_LINK_RATE_25G] = RTE_ETH_SPEED_NUM_25G,
496 [NFP_NET_CFG_STS_LINK_RATE_40G] = RTE_ETH_SPEED_NUM_40G,
497 [NFP_NET_CFG_STS_LINK_RATE_50G] = RTE_ETH_SPEED_NUM_50G,
498 [NFP_NET_CFG_STS_LINK_RATE_100G] = RTE_ETH_SPEED_NUM_100G,
501 PMD_DRV_LOG(DEBUG, "Link update");
503 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
505 nn_link_status = nn_cfg_readl(hw, NFP_NET_CFG_STS);
507 memset(&link, 0, sizeof(struct rte_eth_link));
509 if (nn_link_status & NFP_NET_CFG_STS_LINK)
510 link.link_status = RTE_ETH_LINK_UP;
512 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
514 nn_link_status = (nn_link_status >> NFP_NET_CFG_STS_LINK_RATE_SHIFT) &
515 NFP_NET_CFG_STS_LINK_RATE_MASK;
517 if (nn_link_status >= RTE_DIM(ls_to_ethtool))
518 link.link_speed = RTE_ETH_SPEED_NUM_NONE;
520 link.link_speed = ls_to_ethtool[nn_link_status];
522 ret = rte_eth_linkstatus_set(dev, &link);
524 if (link.link_status)
525 PMD_DRV_LOG(INFO, "NIC Link is Up");
527 PMD_DRV_LOG(INFO, "NIC Link is Down");
533 nfp_net_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
536 struct nfp_net_hw *hw;
537 struct rte_eth_stats nfp_dev_stats;
539 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
541 /* RTE_ETHDEV_QUEUE_STAT_CNTRS default value is 16 */
543 memset(&nfp_dev_stats, 0, sizeof(nfp_dev_stats));
545 /* reading per RX ring stats */
546 for (i = 0; i < dev->data->nb_rx_queues; i++) {
547 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
550 nfp_dev_stats.q_ipackets[i] =
551 nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i));
553 nfp_dev_stats.q_ipackets[i] -=
554 hw->eth_stats_base.q_ipackets[i];
556 nfp_dev_stats.q_ibytes[i] =
557 nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i) + 0x8);
559 nfp_dev_stats.q_ibytes[i] -=
560 hw->eth_stats_base.q_ibytes[i];
563 /* reading per TX ring stats */
564 for (i = 0; i < dev->data->nb_tx_queues; i++) {
565 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
568 nfp_dev_stats.q_opackets[i] =
569 nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i));
571 nfp_dev_stats.q_opackets[i] -=
572 hw->eth_stats_base.q_opackets[i];
574 nfp_dev_stats.q_obytes[i] =
575 nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i) + 0x8);
577 nfp_dev_stats.q_obytes[i] -=
578 hw->eth_stats_base.q_obytes[i];
581 nfp_dev_stats.ipackets =
582 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_FRAMES);
584 nfp_dev_stats.ipackets -= hw->eth_stats_base.ipackets;
586 nfp_dev_stats.ibytes =
587 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_OCTETS);
589 nfp_dev_stats.ibytes -= hw->eth_stats_base.ibytes;
591 nfp_dev_stats.opackets =
592 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_FRAMES);
594 nfp_dev_stats.opackets -= hw->eth_stats_base.opackets;
596 nfp_dev_stats.obytes =
597 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_OCTETS);
599 nfp_dev_stats.obytes -= hw->eth_stats_base.obytes;
601 /* reading general device stats */
602 nfp_dev_stats.ierrors =
603 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_ERRORS);
605 nfp_dev_stats.ierrors -= hw->eth_stats_base.ierrors;
607 nfp_dev_stats.oerrors =
608 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_ERRORS);
610 nfp_dev_stats.oerrors -= hw->eth_stats_base.oerrors;
612 /* RX ring mbuf allocation failures */
613 nfp_dev_stats.rx_nombuf = dev->data->rx_mbuf_alloc_failed;
615 nfp_dev_stats.imissed =
616 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_DISCARDS);
618 nfp_dev_stats.imissed -= hw->eth_stats_base.imissed;
621 memcpy(stats, &nfp_dev_stats, sizeof(*stats));
628 nfp_net_stats_reset(struct rte_eth_dev *dev)
631 struct nfp_net_hw *hw;
633 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
636 * hw->eth_stats_base records the per counter starting point.
640 /* reading per RX ring stats */
641 for (i = 0; i < dev->data->nb_rx_queues; i++) {
642 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
645 hw->eth_stats_base.q_ipackets[i] =
646 nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i));
648 hw->eth_stats_base.q_ibytes[i] =
649 nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i) + 0x8);
652 /* reading per TX ring stats */
653 for (i = 0; i < dev->data->nb_tx_queues; i++) {
654 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
657 hw->eth_stats_base.q_opackets[i] =
658 nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i));
660 hw->eth_stats_base.q_obytes[i] =
661 nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i) + 0x8);
664 hw->eth_stats_base.ipackets =
665 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_FRAMES);
667 hw->eth_stats_base.ibytes =
668 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_OCTETS);
670 hw->eth_stats_base.opackets =
671 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_FRAMES);
673 hw->eth_stats_base.obytes =
674 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_OCTETS);
676 /* reading general device stats */
677 hw->eth_stats_base.ierrors =
678 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_ERRORS);
680 hw->eth_stats_base.oerrors =
681 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_ERRORS);
683 /* RX ring mbuf allocation failures */
684 dev->data->rx_mbuf_alloc_failed = 0;
686 hw->eth_stats_base.imissed =
687 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_DISCARDS);
693 nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
695 struct nfp_net_hw *hw;
697 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
699 dev_info->max_rx_queues = (uint16_t)hw->max_rx_queues;
700 dev_info->max_tx_queues = (uint16_t)hw->max_tx_queues;
701 dev_info->min_rx_bufsize = RTE_ETHER_MIN_MTU;
703 * The maximum rx packet length (max_rx_pktlen) is set to the
704 * maximum supported frame size that the NFP can handle. This
705 * includes layer 2 headers, CRC and other metadata that can
706 * optionally be used.
707 * The maximum layer 3 MTU (max_mtu) is read from hardware,
708 * which was set by the firmware loaded onto the card.
710 dev_info->max_rx_pktlen = NFP_FRAME_SIZE_MAX;
711 dev_info->max_mtu = hw->max_mtu;
712 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
713 /* Next should change when PF support is implemented */
714 dev_info->max_mac_addrs = 1;
716 if (hw->cap & NFP_NET_CFG_CTRL_RXVLAN)
717 dev_info->rx_offload_capa = RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
719 if (hw->cap & NFP_NET_CFG_CTRL_RXCSUM)
720 dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
721 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
722 RTE_ETH_RX_OFFLOAD_TCP_CKSUM;
724 if (hw->cap & NFP_NET_CFG_CTRL_TXVLAN)
725 dev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_VLAN_INSERT;
727 if (hw->cap & NFP_NET_CFG_CTRL_TXCSUM)
728 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
729 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
730 RTE_ETH_TX_OFFLOAD_TCP_CKSUM;
732 if (hw->cap & NFP_NET_CFG_CTRL_LSO_ANY)
733 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_TCP_TSO;
735 if (hw->cap & NFP_NET_CFG_CTRL_GATHER)
736 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
738 dev_info->default_rxconf = (struct rte_eth_rxconf) {
740 .pthresh = DEFAULT_RX_PTHRESH,
741 .hthresh = DEFAULT_RX_HTHRESH,
742 .wthresh = DEFAULT_RX_WTHRESH,
744 .rx_free_thresh = DEFAULT_RX_FREE_THRESH,
748 dev_info->default_txconf = (struct rte_eth_txconf) {
750 .pthresh = DEFAULT_TX_PTHRESH,
751 .hthresh = DEFAULT_TX_HTHRESH,
752 .wthresh = DEFAULT_TX_WTHRESH,
754 .tx_free_thresh = DEFAULT_TX_FREE_THRESH,
755 .tx_rs_thresh = DEFAULT_TX_RSBIT_THRESH,
758 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
759 .nb_max = NFP_NET_MAX_RX_DESC,
760 .nb_min = NFP_NET_MIN_RX_DESC,
761 .nb_align = NFP_ALIGN_RING_DESC,
764 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
765 .nb_max = NFP_NET_MAX_TX_DESC,
766 .nb_min = NFP_NET_MIN_TX_DESC,
767 .nb_align = NFP_ALIGN_RING_DESC,
768 .nb_seg_max = NFP_TX_MAX_SEG,
769 .nb_mtu_seg_max = NFP_TX_MAX_MTU_SEG,
772 if (hw->cap & NFP_NET_CFG_CTRL_RSS) {
773 dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
775 dev_info->flow_type_rss_offloads = RTE_ETH_RSS_IPV4 |
776 RTE_ETH_RSS_NONFRAG_IPV4_TCP |
777 RTE_ETH_RSS_NONFRAG_IPV4_UDP |
779 RTE_ETH_RSS_NONFRAG_IPV6_TCP |
780 RTE_ETH_RSS_NONFRAG_IPV6_UDP;
782 dev_info->reta_size = NFP_NET_CFG_RSS_ITBL_SZ;
783 dev_info->hash_key_size = NFP_NET_CFG_RSS_KEY_SZ;
786 dev_info->speed_capa = RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G |
787 RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_40G |
788 RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_100G;
794 nfp_net_supported_ptypes_get(struct rte_eth_dev *dev)
796 static const uint32_t ptypes[] = {
797 /* refers to nfp_net_set_hash() */
798 RTE_PTYPE_INNER_L3_IPV4,
799 RTE_PTYPE_INNER_L3_IPV6,
800 RTE_PTYPE_INNER_L3_IPV6_EXT,
801 RTE_PTYPE_INNER_L4_MASK,
805 if (dev->rx_pkt_burst == nfp_net_recv_pkts)
811 nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
813 struct rte_pci_device *pci_dev;
814 struct nfp_net_hw *hw;
817 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
818 pci_dev = RTE_ETH_DEV_TO_PCI(dev);
820 if (rte_intr_type_get(pci_dev->intr_handle) !=
824 /* Make sure all updates are written before un-masking */
826 nn_cfg_writeb(hw, NFP_NET_CFG_ICR(base + queue_id),
827 NFP_NET_CFG_ICR_UNMASKED);
832 nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
834 struct rte_pci_device *pci_dev;
835 struct nfp_net_hw *hw;
838 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
839 pci_dev = RTE_ETH_DEV_TO_PCI(dev);
841 if (rte_intr_type_get(pci_dev->intr_handle) !=
845 /* Make sure all updates are written before un-masking */
847 nn_cfg_writeb(hw, NFP_NET_CFG_ICR(base + queue_id), 0x1);
852 nfp_net_dev_link_status_print(struct rte_eth_dev *dev)
854 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
855 struct rte_eth_link link;
857 rte_eth_linkstatus_get(dev, &link);
858 if (link.link_status)
859 PMD_DRV_LOG(INFO, "Port %d: Link Up - speed %u Mbps - %s",
860 dev->data->port_id, link.link_speed,
861 link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX
862 ? "full-duplex" : "half-duplex");
864 PMD_DRV_LOG(INFO, " Port %d: Link Down",
867 PMD_DRV_LOG(INFO, "PCI Address: " PCI_PRI_FMT,
868 pci_dev->addr.domain, pci_dev->addr.bus,
869 pci_dev->addr.devid, pci_dev->addr.function);
872 /* Interrupt configuration and handling */
875 * nfp_net_irq_unmask - Unmask an interrupt
877 * If MSI-X auto-masking is enabled clear the mask bit, otherwise
878 * clear the ICR for the entry.
881 nfp_net_irq_unmask(struct rte_eth_dev *dev)
883 struct nfp_net_hw *hw;
884 struct rte_pci_device *pci_dev;
886 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
887 pci_dev = RTE_ETH_DEV_TO_PCI(dev);
889 if (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {
890 /* If MSI-X auto-masking is used, clear the entry */
892 rte_intr_ack(pci_dev->intr_handle);
894 /* Make sure all updates are written before un-masking */
896 nn_cfg_writeb(hw, NFP_NET_CFG_ICR(NFP_NET_IRQ_LSC_IDX),
897 NFP_NET_CFG_ICR_UNMASKED);
902 * Interrupt handler which shall be registered for alarm callback for delayed
903 * handling specific interrupt to wait for the stable nic state. As the NIC
904 * interrupt state is not stable for nfp after link is just down, it needs
905 * to wait 4 seconds to get the stable status.
907 * @param handle Pointer to interrupt handle.
908 * @param param The address of parameter (struct rte_eth_dev *)
913 nfp_net_dev_interrupt_delayed_handler(void *param)
915 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
917 nfp_net_link_update(dev, 0);
918 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
920 nfp_net_dev_link_status_print(dev);
923 nfp_net_irq_unmask(dev);
927 nfp_net_dev_interrupt_handler(void *param)
930 struct rte_eth_link link;
931 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
933 PMD_DRV_LOG(DEBUG, "We got a LSC interrupt!!!");
935 rte_eth_linkstatus_get(dev, &link);
937 nfp_net_link_update(dev, 0);
940 if (!link.link_status) {
941 /* handle it 1 sec later, wait it being stable */
942 timeout = NFP_NET_LINK_UP_CHECK_TIMEOUT;
945 /* handle it 4 sec later, wait it being stable */
946 timeout = NFP_NET_LINK_DOWN_CHECK_TIMEOUT;
949 if (rte_eal_alarm_set(timeout * 1000,
950 nfp_net_dev_interrupt_delayed_handler,
952 PMD_INIT_LOG(ERR, "Error setting alarm");
954 nfp_net_irq_unmask(dev);
959 nfp_net_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
961 struct nfp_net_hw *hw;
963 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
965 /* mtu setting is forbidden if port is started */
966 if (dev->data->dev_started) {
967 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
972 /* MTU larger then current mbufsize not supported */
973 if (mtu > hw->flbufsz) {
974 PMD_DRV_LOG(ERR, "MTU (%u) larger then current mbufsize (%u) not supported",
979 /* writing to configuration space */
980 nn_cfg_writel(hw, NFP_NET_CFG_MTU, mtu);
988 nfp_net_vlan_offload_set(struct rte_eth_dev *dev, int mask)
990 uint32_t new_ctrl, update;
991 struct nfp_net_hw *hw;
992 struct rte_eth_conf *dev_conf;
995 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
996 dev_conf = &dev->data->dev_conf;
1000 * Vlan stripping setting
1001 * Enable or disable VLAN stripping
1003 if (mask & RTE_ETH_VLAN_STRIP_MASK) {
1004 if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
1005 new_ctrl |= NFP_NET_CFG_CTRL_RXVLAN;
1007 new_ctrl &= ~NFP_NET_CFG_CTRL_RXVLAN;
1010 if (new_ctrl == hw->ctrl)
1013 update = NFP_NET_CFG_UPDATE_GEN;
1015 ret = nfp_net_reconfig(hw, new_ctrl, update);
1017 hw->ctrl = new_ctrl;
1023 nfp_net_rss_reta_write(struct rte_eth_dev *dev,
1024 struct rte_eth_rss_reta_entry64 *reta_conf,
1027 uint32_t reta, mask;
1030 struct nfp_net_hw *hw =
1031 NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1033 if (reta_size != NFP_NET_CFG_RSS_ITBL_SZ) {
1034 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1035 "(%d) doesn't match the number hardware can supported "
1036 "(%d)", reta_size, NFP_NET_CFG_RSS_ITBL_SZ);
1041 * Update Redirection Table. There are 128 8bit-entries which can be
1042 * manage as 32 32bit-entries
1044 for (i = 0; i < reta_size; i += 4) {
1045 /* Handling 4 RSS entries per loop */
1046 idx = i / RTE_ETH_RETA_GROUP_SIZE;
1047 shift = i % RTE_ETH_RETA_GROUP_SIZE;
1048 mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xF);
1054 /* If all 4 entries were set, don't need read RETA register */
1056 reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + i);
1058 for (j = 0; j < 4; j++) {
1059 if (!(mask & (0x1 << j)))
1062 /* Clearing the entry bits */
1063 reta &= ~(0xFF << (8 * j));
1064 reta |= reta_conf[idx].reta[shift + j] << (8 * j);
1066 nn_cfg_writel(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) + shift,
1072 /* Update Redirection Table(RETA) of Receive Side Scaling of Ethernet device */
1074 nfp_net_reta_update(struct rte_eth_dev *dev,
1075 struct rte_eth_rss_reta_entry64 *reta_conf,
1078 struct nfp_net_hw *hw =
1079 NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1083 if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1086 ret = nfp_net_rss_reta_write(dev, reta_conf, reta_size);
1090 update = NFP_NET_CFG_UPDATE_RSS;
1092 if (nfp_net_reconfig(hw, hw->ctrl, update) < 0)
1098 /* Query Redirection Table(RETA) of Receive Side Scaling of Ethernet device. */
1100 nfp_net_reta_query(struct rte_eth_dev *dev,
1101 struct rte_eth_rss_reta_entry64 *reta_conf,
1107 struct nfp_net_hw *hw;
1109 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1111 if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1114 if (reta_size != NFP_NET_CFG_RSS_ITBL_SZ) {
1115 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1116 "(%d) doesn't match the number hardware can supported "
1117 "(%d)", reta_size, NFP_NET_CFG_RSS_ITBL_SZ);
1122 * Reading Redirection Table. There are 128 8bit-entries which can be
1123 * manage as 32 32bit-entries
1125 for (i = 0; i < reta_size; i += 4) {
1126 /* Handling 4 RSS entries per loop */
1127 idx = i / RTE_ETH_RETA_GROUP_SIZE;
1128 shift = i % RTE_ETH_RETA_GROUP_SIZE;
1129 mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xF);
1134 reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) +
1136 for (j = 0; j < 4; j++) {
1137 if (!(mask & (0x1 << j)))
1139 reta_conf[idx].reta[shift + j] =
1140 (uint8_t)((reta >> (8 * j)) & 0xF);
1147 nfp_net_rss_hash_write(struct rte_eth_dev *dev,
1148 struct rte_eth_rss_conf *rss_conf)
1150 struct nfp_net_hw *hw;
1152 uint32_t cfg_rss_ctrl = 0;
1156 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1158 /* Writing the key byte a byte */
1159 for (i = 0; i < rss_conf->rss_key_len; i++) {
1160 memcpy(&key, &rss_conf->rss_key[i], 1);
1161 nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY + i, key);
1164 rss_hf = rss_conf->rss_hf;
1166 if (rss_hf & RTE_ETH_RSS_IPV4)
1167 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4;
1169 if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP)
1170 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4_TCP;
1172 if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP)
1173 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4_UDP;
1175 if (rss_hf & RTE_ETH_RSS_IPV6)
1176 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6;
1178 if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP)
1179 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6_TCP;
1181 if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP)
1182 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6_UDP;
1184 cfg_rss_ctrl |= NFP_NET_CFG_RSS_MASK;
1185 cfg_rss_ctrl |= NFP_NET_CFG_RSS_TOEPLITZ;
1187 /* configuring where to apply the RSS hash */
1188 nn_cfg_writel(hw, NFP_NET_CFG_RSS_CTRL, cfg_rss_ctrl);
1190 /* Writing the key size */
1191 nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY_SZ, rss_conf->rss_key_len);
1197 nfp_net_rss_hash_update(struct rte_eth_dev *dev,
1198 struct rte_eth_rss_conf *rss_conf)
1202 struct nfp_net_hw *hw;
1204 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1206 rss_hf = rss_conf->rss_hf;
1208 /* Checking if RSS is enabled */
1209 if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) {
1210 if (rss_hf != 0) { /* Enable RSS? */
1211 PMD_DRV_LOG(ERR, "RSS unsupported");
1214 return 0; /* Nothing to do */
1217 if (rss_conf->rss_key_len > NFP_NET_CFG_RSS_KEY_SZ) {
1218 PMD_DRV_LOG(ERR, "hash key too long");
1222 nfp_net_rss_hash_write(dev, rss_conf);
1224 update = NFP_NET_CFG_UPDATE_RSS;
1226 if (nfp_net_reconfig(hw, hw->ctrl, update) < 0)
1233 nfp_net_rss_hash_conf_get(struct rte_eth_dev *dev,
1234 struct rte_eth_rss_conf *rss_conf)
1237 uint32_t cfg_rss_ctrl;
1240 struct nfp_net_hw *hw;
1242 hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1244 if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1247 rss_hf = rss_conf->rss_hf;
1248 cfg_rss_ctrl = nn_cfg_readl(hw, NFP_NET_CFG_RSS_CTRL);
1250 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4)
1251 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_NONFRAG_IPV4_UDP;
1253 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4_TCP)
1254 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP;
1256 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6_TCP)
1257 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_TCP;
1259 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4_UDP)
1260 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP;
1262 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6_UDP)
1263 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_UDP;
1265 if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6)
1266 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_NONFRAG_IPV6_UDP;
1268 /* Propagate current RSS hash functions to caller */
1269 rss_conf->rss_hf = rss_hf;
1271 /* Reading the key size */
1272 rss_conf->rss_key_len = nn_cfg_readl(hw, NFP_NET_CFG_RSS_KEY_SZ);
1274 /* Reading the key byte a byte */
1275 for (i = 0; i < rss_conf->rss_key_len; i++) {
1276 key = nn_cfg_readb(hw, NFP_NET_CFG_RSS_KEY + i);
1277 memcpy(&rss_conf->rss_key[i], &key, 1);
1284 nfp_net_rss_config_default(struct rte_eth_dev *dev)
1286 struct rte_eth_conf *dev_conf;
1287 struct rte_eth_rss_conf rss_conf;
1288 struct rte_eth_rss_reta_entry64 nfp_reta_conf[2];
1289 uint16_t rx_queues = dev->data->nb_rx_queues;
1293 PMD_DRV_LOG(INFO, "setting default RSS conf for %u queues",
1296 nfp_reta_conf[0].mask = ~0x0;
1297 nfp_reta_conf[1].mask = ~0x0;
1300 for (i = 0; i < 0x40; i += 8) {
1301 for (j = i; j < (i + 8); j++) {
1302 nfp_reta_conf[0].reta[j] = queue;
1303 nfp_reta_conf[1].reta[j] = queue++;
1307 ret = nfp_net_rss_reta_write(dev, nfp_reta_conf, 0x80);
1311 dev_conf = &dev->data->dev_conf;
1313 PMD_DRV_LOG(INFO, "wrong rss conf");
1316 rss_conf = dev_conf->rx_adv_conf.rss_conf;
1318 ret = nfp_net_rss_hash_write(dev, &rss_conf);
1323 RTE_LOG_REGISTER_SUFFIX(nfp_logtype_init, init, NOTICE);
1324 RTE_LOG_REGISTER_SUFFIX(nfp_logtype_driver, driver, NOTICE);
1327 * c-file-style: "Linux"
1328 * indent-tabs-mode: t