drivers/net/nfp/nfp_common.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (c) 2014-2018 Netronome Systems, Inc.
   3  * All rights reserved.
   4  *
   5  * Small portions derived from code Copyright(c) 2010-2015 Intel Corporation.
   6  */
   7
   8 /*
   9  * vim:shiftwidth=8:noexpandtab
  10  *
  11  * @file dpdk/pmd/nfp_common.c
  12  *
  13  * Netronome vNIC DPDK Poll-Mode Driver: Common files
  14  */
  15
  16 #include <rte_byteorder.h>
  17 #include <rte_common.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <ethdev_driver.h>
  21 #include <ethdev_pci.h>
  22 #include <rte_dev.h>
  23 #include <rte_ether.h>
  24 #include <rte_malloc.h>
  25 #include <rte_memzone.h>
  26 #include <rte_mempool.h>
  27 #include <rte_version.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_spinlock.h>
  31 #include <rte_service_component.h>
  32
  33 #include "nfpcore/nfp_cpp.h"
  34 #include "nfpcore/nfp_nffw.h"
  35 #include "nfpcore/nfp_hwinfo.h"
  36 #include "nfpcore/nfp_mip.h"
  37 #include "nfpcore/nfp_rtsym.h"
  38 #include "nfpcore/nfp_nsp.h"
  39
  40 #include "nfp_common.h"
  41 #include "nfp_rxtx.h"
  42 #include "nfp_logs.h"
  43 #include "nfp_ctrl.h"
  44 #include "nfp_cpp_bridge.h"
  45
  46 #include <sys/types.h>
  47 #include <sys/socket.h>
  48 #include <sys/un.h>
  49 #include <unistd.h>
  50 #include <stdio.h>
  51 #include <sys/ioctl.h>
  52 #include <errno.h>
  53
  54 static int
  55 __nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t update)
  56 {
  57         int cnt;
  58         uint32_t new;
  59         struct timespec wait;
  60
  61         PMD_DRV_LOG(DEBUG, "Writing to the configuration queue (%p)...",
  62                     hw->qcp_cfg);
  63
  64         if (hw->qcp_cfg == NULL)
  65                 rte_panic("Bad configuration queue pointer\n");
  66
  67         nfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1);
  68
  69         wait.tv_sec = 0;
  70         wait.tv_nsec = 1000000;
  71
  72         PMD_DRV_LOG(DEBUG, "Polling for update ack...");
  73
  74         /* Poll update field, waiting for NFP to ack the config */
  75         for (cnt = 0; ; cnt++) {
  76                 new = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE);
  77                 if (new == 0)
  78                         break;
  79                 if (new & NFP_NET_CFG_UPDATE_ERR) {
  80                         PMD_INIT_LOG(ERR, "Reconfig error: 0x%08x", new);
  81                         return -1;
  82                 }
  83                 if (cnt >= NFP_NET_POLL_TIMEOUT) {
  84                         PMD_INIT_LOG(ERR, "Reconfig timeout for 0x%08x after"
  85                                           " %dms", update, cnt);
  86                         rte_panic("Exiting\n");
  87                 }
  88                 nanosleep(&wait, 0); /* waiting for a 1ms */
  89         }
  90         PMD_DRV_LOG(DEBUG, "Ack DONE");
  91         return 0;
  92 }
  93
  94 /*
  95  * Reconfigure the NIC
  96  * @nn:    device to reconfigure
  97  * @ctrl:    The value for the ctrl field in the BAR config
  98  * @update:  The value for the update field in the BAR config
  99  *
 100  * Write the update word to the BAR and ping the reconfig queue. Then poll
 101  * until the firmware has acknowledged the update by zeroing the update word.
 102  */
 103 int
 104 nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t ctrl, uint32_t update)
 105 {
 106         uint32_t err;
 107
 108         PMD_DRV_LOG(DEBUG, "nfp_net_reconfig: ctrl=%08x update=%08x",
 109                     ctrl, update);
 110
 111         rte_spinlock_lock(&hw->reconfig_lock);
 112
 113         nn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl);
 114         nn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update);
 115
 116         rte_wmb();
 117
 118         err = __nfp_net_reconfig(hw, update);
 119
 120         rte_spinlock_unlock(&hw->reconfig_lock);
 121
 122         if (!err)
 123                 return 0;
 124
 125         /*
 126          * Reconfig errors imply situations where they can be handled.
 127          * Otherwise, rte_panic is called inside __nfp_net_reconfig
 128          */
 129         PMD_INIT_LOG(ERR, "Error nfp_net reconfig for ctrl: %x update: %x",
 130                      ctrl, update);
 131         return -EIO;
 132 }
 133
 134 /*
 135  * Configure an Ethernet device. This function must be invoked first
 136  * before any other function in the Ethernet API. This function can
 137  * also be re-invoked when a device is in the stopped state.
 138  */
 139 int
 140 nfp_net_configure(struct rte_eth_dev *dev)
 141 {
 142         struct rte_eth_conf *dev_conf;
 143         struct rte_eth_rxmode *rxmode;
 144         struct rte_eth_txmode *txmode;
 145         struct nfp_net_hw *hw;
 146
 147         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 148
 149         /*
 150          * A DPDK app sends info about how many queues to use and how
 151          * those queues need to be configured. This is used by the
 152          * DPDK core and it makes sure no more queues than those
 153          * advertised by the driver are requested. This function is
 154          * called after that internal process
 155          */
 156
 157         PMD_INIT_LOG(DEBUG, "Configure");
 158
 159         dev_conf = &dev->data->dev_conf;
 160         rxmode = &dev_conf->rxmode;
 161         txmode = &dev_conf->txmode;
 162
 163         if (rxmode->mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
 164                 rxmode->offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
 165
 166         /* Checking TX mode */
 167         if (txmode->mq_mode) {
 168                 PMD_INIT_LOG(INFO, "TX mq_mode DCB and VMDq not supported");
 169                 return -EINVAL;
 170         }
 171
 172         /* Checking RX mode */
 173         if (rxmode->mq_mode & RTE_ETH_MQ_RX_RSS &&
 174             !(hw->cap & NFP_NET_CFG_CTRL_RSS)) {
 175                 PMD_INIT_LOG(INFO, "RSS not supported");
 176                 return -EINVAL;
 177         }
 178
 179         return 0;
 180 }
 181
 182 void
 183 nfp_net_enable_queues(struct rte_eth_dev *dev)
 184 {
 185         struct nfp_net_hw *hw;
 186         uint64_t enabled_queues = 0;
 187         int i;
 188
 189         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 190
 191         /* Enabling the required TX queues in the device */
 192         for (i = 0; i < dev->data->nb_tx_queues; i++)
 193                 enabled_queues |= (1 << i);
 194
 195         nn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, enabled_queues);
 196
 197         enabled_queues = 0;
 198
 199         /* Enabling the required RX queues in the device */
 200         for (i = 0; i < dev->data->nb_rx_queues; i++)
 201                 enabled_queues |= (1 << i);
 202
 203         nn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, enabled_queues);
 204 }
 205
 206 void
 207 nfp_net_disable_queues(struct rte_eth_dev *dev)
 208 {
 209         struct nfp_net_hw *hw;
 210         uint32_t new_ctrl, update = 0;
 211
 212         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 213
 214         nn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, 0);
 215         nn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, 0);
 216
 217         new_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_ENABLE;
 218         update = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |
 219                  NFP_NET_CFG_UPDATE_MSIX;
 220
 221         if (hw->cap & NFP_NET_CFG_CTRL_RINGCFG)
 222                 new_ctrl &= ~NFP_NET_CFG_CTRL_RINGCFG;
 223
 224         /* If an error when reconfig we avoid to change hw state */
 225         if (nfp_net_reconfig(hw, new_ctrl, update) < 0)
 226                 return;
 227
 228         hw->ctrl = new_ctrl;
 229 }
 230
 231 void
 232 nfp_net_params_setup(struct nfp_net_hw *hw)
 233 {
 234         nn_cfg_writel(hw, NFP_NET_CFG_MTU, hw->mtu);
 235         nn_cfg_writel(hw, NFP_NET_CFG_FLBUFSZ, hw->flbufsz);
 236 }
 237
 238 void
 239 nfp_net_cfg_queue_setup(struct nfp_net_hw *hw)
 240 {
 241         hw->qcp_cfg = hw->tx_bar + NFP_QCP_QUEUE_ADDR_SZ;
 242 }
 243
 244 #define ETH_ADDR_LEN    6
 245
 246 void
 247 nfp_eth_copy_mac(uint8_t *dst, const uint8_t *src)
 248 {
 249         int i;
 250
 251         for (i = 0; i < ETH_ADDR_LEN; i++)
 252                 dst[i] = src[i];
 253 }
 254
 255 void
 256 nfp_net_write_mac(struct nfp_net_hw *hw, uint8_t *mac)
 257 {
 258         uint32_t mac0 = *(uint32_t *)mac;
 259         uint16_t mac1;
 260
 261         nn_writel(rte_cpu_to_be_32(mac0), hw->ctrl_bar + NFP_NET_CFG_MACADDR);
 262
 263         mac += 4;
 264         mac1 = *(uint16_t *)mac;
 265         nn_writew(rte_cpu_to_be_16(mac1),
 266                   hw->ctrl_bar + NFP_NET_CFG_MACADDR + 6);
 267 }
 268
 269 int
 270 nfp_set_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
 271 {
 272         struct nfp_net_hw *hw;
 273         uint32_t update, ctrl;
 274
 275         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 276         if ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) &&
 277             !(hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR)) {
 278                 PMD_INIT_LOG(INFO, "MAC address unable to change when"
 279                                   " port enabled");
 280                 return -EBUSY;
 281         }
 282
 283         /* Writing new MAC to the specific port BAR address */
 284         nfp_net_write_mac(hw, (uint8_t *)mac_addr);
 285
 286         /* Signal the NIC about the change */
 287         update = NFP_NET_CFG_UPDATE_MACADDR;
 288         ctrl = hw->ctrl;
 289         if ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) &&
 290             (hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR))
 291                 ctrl |= NFP_NET_CFG_CTRL_LIVE_ADDR;
 292         if (nfp_net_reconfig(hw, ctrl, update) < 0) {
 293                 PMD_INIT_LOG(INFO, "MAC address update failed");
 294                 return -EIO;
 295         }
 296         return 0;
 297 }
 298
 299 int
 300 nfp_configure_rx_interrupt(struct rte_eth_dev *dev,
 301                            struct rte_intr_handle *intr_handle)
 302 {
 303         struct nfp_net_hw *hw;
 304         int i;
 305
 306         if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
 307                                     dev->data->nb_rx_queues)) {
 308                 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
 309                              " intr_vec", dev->data->nb_rx_queues);
 310                 return -ENOMEM;
 311         }
 312
 313         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 314
 315         if (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) {
 316                 PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with UIO");
 317                 /* UIO just supports one queue and no LSC*/
 318                 nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(0), 0);
 319                 if (rte_intr_vec_list_index_set(intr_handle, 0, 0))
 320                         return -1;
 321         } else {
 322                 PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with VFIO");
 323                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 324                         /*
 325                          * The first msix vector is reserved for non
 326                          * efd interrupts
 327                         */
 328                         nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(i), i + 1);
 329                         if (rte_intr_vec_list_index_set(intr_handle, i,
 330                                                                i + 1))
 331                                 return -1;
 332                         PMD_INIT_LOG(DEBUG, "intr_vec[%d]= %d", i,
 333                                 rte_intr_vec_list_index_get(intr_handle,
 334                                                                    i));
 335                 }
 336         }
 337
 338         /* Avoiding TX interrupts */
 339         hw->ctrl |= NFP_NET_CFG_CTRL_MSIX_TX_OFF;
 340         return 0;
 341 }
 342
 343 uint32_t
 344 nfp_check_offloads(struct rte_eth_dev *dev)
 345 {
 346         struct nfp_net_hw *hw;
 347         struct rte_eth_conf *dev_conf;
 348         struct rte_eth_rxmode *rxmode;
 349         struct rte_eth_txmode *txmode;
 350         uint32_t ctrl = 0;
 351
 352         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 353
 354         dev_conf = &dev->data->dev_conf;
 355         rxmode = &dev_conf->rxmode;
 356         txmode = &dev_conf->txmode;
 357
 358         if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM) {
 359                 if (hw->cap & NFP_NET_CFG_CTRL_RXCSUM)
 360                         ctrl |= NFP_NET_CFG_CTRL_RXCSUM;
 361         }
 362
 363         if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
 364                 if (hw->cap & NFP_NET_CFG_CTRL_RXVLAN)
 365                         ctrl |= NFP_NET_CFG_CTRL_RXVLAN;
 366         }
 367
 368         hw->mtu = dev->data->mtu;
 369
 370         if (txmode->offloads & RTE_ETH_TX_OFFLOAD_VLAN_INSERT)
 371                 ctrl |= NFP_NET_CFG_CTRL_TXVLAN;
 372
 373         /* L2 broadcast */
 374         if (hw->cap & NFP_NET_CFG_CTRL_L2BC)
 375                 ctrl |= NFP_NET_CFG_CTRL_L2BC;
 376
 377         /* L2 multicast */
 378         if (hw->cap & NFP_NET_CFG_CTRL_L2MC)
 379                 ctrl |= NFP_NET_CFG_CTRL_L2MC;
 380
 381         /* TX checksum offload */
 382         if (txmode->offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM ||
 383             txmode->offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM ||
 384             txmode->offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
 385                 ctrl |= NFP_NET_CFG_CTRL_TXCSUM;
 386
 387         /* LSO offload */
 388         if (txmode->offloads & RTE_ETH_TX_OFFLOAD_TCP_TSO) {
 389                 if (hw->cap & NFP_NET_CFG_CTRL_LSO)
 390                         ctrl |= NFP_NET_CFG_CTRL_LSO;
 391                 else
 392                         ctrl |= NFP_NET_CFG_CTRL_LSO2;
 393         }
 394
 395         /* RX gather */
 396         if (txmode->offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
 397                 ctrl |= NFP_NET_CFG_CTRL_GATHER;
 398
 399         return ctrl;
 400 }
 401
 402 int
 403 nfp_net_promisc_enable(struct rte_eth_dev *dev)
 404 {
 405         uint32_t new_ctrl, update = 0;
 406         struct nfp_net_hw *hw;
 407         int ret;
 408
 409         PMD_DRV_LOG(DEBUG, "Promiscuous mode enable");
 410
 411         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 412
 413         if (!(hw->cap & NFP_NET_CFG_CTRL_PROMISC)) {
 414                 PMD_INIT_LOG(INFO, "Promiscuous mode not supported");
 415                 return -ENOTSUP;
 416         }
 417
 418         if (hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) {
 419                 PMD_DRV_LOG(INFO, "Promiscuous mode already enabled");
 420                 return 0;
 421         }
 422
 423         new_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_PROMISC;
 424         update = NFP_NET_CFG_UPDATE_GEN;
 425
 426         /*
 427          * DPDK sets promiscuous mode on just after this call assuming
 428          * it can not fail ...
 429          */
 430         ret = nfp_net_reconfig(hw, new_ctrl, update);
 431         if (ret < 0)
 432                 return ret;
 433
 434         hw->ctrl = new_ctrl;
 435
 436         return 0;
 437 }
 438
 439 int
 440 nfp_net_promisc_disable(struct rte_eth_dev *dev)
 441 {
 442         uint32_t new_ctrl, update = 0;
 443         struct nfp_net_hw *hw;
 444         int ret;
 445
 446         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 447
 448         if ((hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) == 0) {
 449                 PMD_DRV_LOG(INFO, "Promiscuous mode already disabled");
 450                 return 0;
 451         }
 452
 453         new_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_PROMISC;
 454         update = NFP_NET_CFG_UPDATE_GEN;
 455
 456         /*
 457          * DPDK sets promiscuous mode off just before this call
 458          * assuming it can not fail ...
 459          */
 460         ret = nfp_net_reconfig(hw, new_ctrl, update);
 461         if (ret < 0)
 462                 return ret;
 463
 464         hw->ctrl = new_ctrl;
 465
 466         return 0;
 467 }
 468
 469 /*
 470  * return 0 means link status changed, -1 means not changed
 471  *
 472  * Wait to complete is needed as it can take up to 9 seconds to get the Link
 473  * status.
 474  */
 475 int
 476 nfp_net_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
 477 {
 478         struct nfp_net_hw *hw;
 479         struct rte_eth_link link;
 480         uint32_t nn_link_status;
 481         int ret;
 482
 483         static const uint32_t ls_to_ethtool[] = {
 484                 [NFP_NET_CFG_STS_LINK_RATE_UNSUPPORTED] = RTE_ETH_SPEED_NUM_NONE,
 485                 [NFP_NET_CFG_STS_LINK_RATE_UNKNOWN]     = RTE_ETH_SPEED_NUM_NONE,
 486                 [NFP_NET_CFG_STS_LINK_RATE_1G]          = RTE_ETH_SPEED_NUM_1G,
 487                 [NFP_NET_CFG_STS_LINK_RATE_10G]         = RTE_ETH_SPEED_NUM_10G,
 488                 [NFP_NET_CFG_STS_LINK_RATE_25G]         = RTE_ETH_SPEED_NUM_25G,
 489                 [NFP_NET_CFG_STS_LINK_RATE_40G]         = RTE_ETH_SPEED_NUM_40G,
 490                 [NFP_NET_CFG_STS_LINK_RATE_50G]         = RTE_ETH_SPEED_NUM_50G,
 491                 [NFP_NET_CFG_STS_LINK_RATE_100G]        = RTE_ETH_SPEED_NUM_100G,
 492         };
 493
 494         PMD_DRV_LOG(DEBUG, "Link update");
 495
 496         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 497
 498         nn_link_status = nn_cfg_readl(hw, NFP_NET_CFG_STS);
 499
 500         memset(&link, 0, sizeof(struct rte_eth_link));
 501
 502         if (nn_link_status & NFP_NET_CFG_STS_LINK)
 503                 link.link_status = RTE_ETH_LINK_UP;
 504
 505         link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
 506
 507         nn_link_status = (nn_link_status >> NFP_NET_CFG_STS_LINK_RATE_SHIFT) &
 508                          NFP_NET_CFG_STS_LINK_RATE_MASK;
 509
 510         if (nn_link_status >= RTE_DIM(ls_to_ethtool))
 511                 link.link_speed = RTE_ETH_SPEED_NUM_NONE;
 512         else
 513                 link.link_speed = ls_to_ethtool[nn_link_status];
 514
 515         ret = rte_eth_linkstatus_set(dev, &link);
 516         if (ret == 0) {
 517                 if (link.link_status)
 518                         PMD_DRV_LOG(INFO, "NIC Link is Up");
 519                 else
 520                         PMD_DRV_LOG(INFO, "NIC Link is Down");
 521         }
 522         return ret;
 523 }
 524
 525 int
 526 nfp_net_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 527 {
 528         int i;
 529         struct nfp_net_hw *hw;
 530         struct rte_eth_stats nfp_dev_stats;
 531
 532         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 533
 534         /* RTE_ETHDEV_QUEUE_STAT_CNTRS default value is 16 */
 535
 536         memset(&nfp_dev_stats, 0, sizeof(nfp_dev_stats));
 537
 538         /* reading per RX ring stats */
 539         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 540                 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 541                         break;
 542
 543                 nfp_dev_stats.q_ipackets[i] =
 544                         nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i));
 545
 546                 nfp_dev_stats.q_ipackets[i] -=
 547                         hw->eth_stats_base.q_ipackets[i];
 548
 549                 nfp_dev_stats.q_ibytes[i] =
 550                         nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i) + 0x8);
 551
 552                 nfp_dev_stats.q_ibytes[i] -=
 553                         hw->eth_stats_base.q_ibytes[i];
 554         }
 555
 556         /* reading per TX ring stats */
 557         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 558                 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 559                         break;
 560
 561                 nfp_dev_stats.q_opackets[i] =
 562                         nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i));
 563
 564                 nfp_dev_stats.q_opackets[i] -=
 565                         hw->eth_stats_base.q_opackets[i];
 566
 567                 nfp_dev_stats.q_obytes[i] =
 568                         nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i) + 0x8);
 569
 570                 nfp_dev_stats.q_obytes[i] -=
 571                         hw->eth_stats_base.q_obytes[i];
 572         }
 573
 574         nfp_dev_stats.ipackets =
 575                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_FRAMES);
 576
 577         nfp_dev_stats.ipackets -= hw->eth_stats_base.ipackets;
 578
 579         nfp_dev_stats.ibytes =
 580                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_OCTETS);
 581
 582         nfp_dev_stats.ibytes -= hw->eth_stats_base.ibytes;
 583
 584         nfp_dev_stats.opackets =
 585                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_FRAMES);
 586
 587         nfp_dev_stats.opackets -= hw->eth_stats_base.opackets;
 588
 589         nfp_dev_stats.obytes =
 590                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_OCTETS);
 591
 592         nfp_dev_stats.obytes -= hw->eth_stats_base.obytes;
 593
 594         /* reading general device stats */
 595         nfp_dev_stats.ierrors =
 596                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_ERRORS);
 597
 598         nfp_dev_stats.ierrors -= hw->eth_stats_base.ierrors;
 599
 600         nfp_dev_stats.oerrors =
 601                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_ERRORS);
 602
 603         nfp_dev_stats.oerrors -= hw->eth_stats_base.oerrors;
 604
 605         /* RX ring mbuf allocation failures */
 606         nfp_dev_stats.rx_nombuf = dev->data->rx_mbuf_alloc_failed;
 607
 608         nfp_dev_stats.imissed =
 609                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_DISCARDS);
 610
 611         nfp_dev_stats.imissed -= hw->eth_stats_base.imissed;
 612
 613         if (stats) {
 614                 memcpy(stats, &nfp_dev_stats, sizeof(*stats));
 615                 return 0;
 616         }
 617         return -EINVAL;
 618 }
 619
 620 int
 621 nfp_net_stats_reset(struct rte_eth_dev *dev)
 622 {
 623         int i;
 624         struct nfp_net_hw *hw;
 625
 626         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 627
 628         /*
 629          * hw->eth_stats_base records the per counter starting point.
 630          * Lets update it now
 631          */
 632
 633         /* reading per RX ring stats */
 634         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 635                 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 636                         break;
 637
 638                 hw->eth_stats_base.q_ipackets[i] =
 639                         nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i));
 640
 641                 hw->eth_stats_base.q_ibytes[i] =
 642                         nn_cfg_readq(hw, NFP_NET_CFG_RXR_STATS(i) + 0x8);
 643         }
 644
 645         /* reading per TX ring stats */
 646         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 647                 if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 648                         break;
 649
 650                 hw->eth_stats_base.q_opackets[i] =
 651                         nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i));
 652
 653                 hw->eth_stats_base.q_obytes[i] =
 654                         nn_cfg_readq(hw, NFP_NET_CFG_TXR_STATS(i) + 0x8);
 655         }
 656
 657         hw->eth_stats_base.ipackets =
 658                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_FRAMES);
 659
 660         hw->eth_stats_base.ibytes =
 661                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_OCTETS);
 662
 663         hw->eth_stats_base.opackets =
 664                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_FRAMES);
 665
 666         hw->eth_stats_base.obytes =
 667                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_OCTETS);
 668
 669         /* reading general device stats */
 670         hw->eth_stats_base.ierrors =
 671                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_ERRORS);
 672
 673         hw->eth_stats_base.oerrors =
 674                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_TX_ERRORS);
 675
 676         /* RX ring mbuf allocation failures */
 677         dev->data->rx_mbuf_alloc_failed = 0;
 678
 679         hw->eth_stats_base.imissed =
 680                 nn_cfg_readq(hw, NFP_NET_CFG_STATS_RX_DISCARDS);
 681
 682         return 0;
 683 }
 684
 685 int
 686 nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 687 {
 688         struct nfp_net_hw *hw;
 689
 690         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 691
 692         dev_info->max_rx_queues = (uint16_t)hw->max_rx_queues;
 693         dev_info->max_tx_queues = (uint16_t)hw->max_tx_queues;
 694         dev_info->min_rx_bufsize = RTE_ETHER_MIN_MTU;
 695         dev_info->max_rx_pktlen = hw->max_mtu;
 696         /* Next should change when PF support is implemented */
 697         dev_info->max_mac_addrs = 1;
 698
 699         if (hw->cap & NFP_NET_CFG_CTRL_RXVLAN)
 700                 dev_info->rx_offload_capa = RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
 701
 702         if (hw->cap & NFP_NET_CFG_CTRL_RXCSUM)
 703                 dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
 704                                              RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
 705                                              RTE_ETH_RX_OFFLOAD_TCP_CKSUM;
 706
 707         if (hw->cap & NFP_NET_CFG_CTRL_TXVLAN)
 708                 dev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_VLAN_INSERT;
 709
 710         if (hw->cap & NFP_NET_CFG_CTRL_TXCSUM)
 711                 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
 712                                              RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
 713                                              RTE_ETH_TX_OFFLOAD_TCP_CKSUM;
 714
 715         if (hw->cap & NFP_NET_CFG_CTRL_LSO_ANY)
 716                 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_TCP_TSO;
 717
 718         if (hw->cap & NFP_NET_CFG_CTRL_GATHER)
 719                 dev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
 720
 721         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 722                 .rx_thresh = {
 723                         .pthresh = DEFAULT_RX_PTHRESH,
 724                         .hthresh = DEFAULT_RX_HTHRESH,
 725                         .wthresh = DEFAULT_RX_WTHRESH,
 726                 },
 727                 .rx_free_thresh = DEFAULT_RX_FREE_THRESH,
 728                 .rx_drop_en = 0,
 729         };
 730
 731         dev_info->default_txconf = (struct rte_eth_txconf) {
 732                 .tx_thresh = {
 733                         .pthresh = DEFAULT_TX_PTHRESH,
 734                         .hthresh = DEFAULT_TX_HTHRESH,
 735                         .wthresh = DEFAULT_TX_WTHRESH,
 736                 },
 737                 .tx_free_thresh = DEFAULT_TX_FREE_THRESH,
 738                 .tx_rs_thresh = DEFAULT_TX_RSBIT_THRESH,
 739         };
 740
 741         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 742                 .nb_max = NFP_NET_MAX_RX_DESC,
 743                 .nb_min = NFP_NET_MIN_RX_DESC,
 744                 .nb_align = NFP_ALIGN_RING_DESC,
 745         };
 746
 747         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 748                 .nb_max = NFP_NET_MAX_TX_DESC,
 749                 .nb_min = NFP_NET_MIN_TX_DESC,
 750                 .nb_align = NFP_ALIGN_RING_DESC,
 751                 .nb_seg_max = NFP_TX_MAX_SEG,
 752                 .nb_mtu_seg_max = NFP_TX_MAX_MTU_SEG,
 753         };
 754
 755         if (hw->cap & NFP_NET_CFG_CTRL_RSS) {
 756                 dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
 757
 758                 dev_info->flow_type_rss_offloads = RTE_ETH_RSS_IPV4 |
 759                                                    RTE_ETH_RSS_NONFRAG_IPV4_TCP |
 760                                                    RTE_ETH_RSS_NONFRAG_IPV4_UDP |
 761                                                    RTE_ETH_RSS_IPV6 |
 762                                                    RTE_ETH_RSS_NONFRAG_IPV6_TCP |
 763                                                    RTE_ETH_RSS_NONFRAG_IPV6_UDP;
 764
 765                 dev_info->reta_size = NFP_NET_CFG_RSS_ITBL_SZ;
 766                 dev_info->hash_key_size = NFP_NET_CFG_RSS_KEY_SZ;
 767         }
 768
 769         dev_info->speed_capa = RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G |
 770                                RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_40G |
 771                                RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_100G;
 772
 773         return 0;
 774 }
 775
 776 const uint32_t *
 777 nfp_net_supported_ptypes_get(struct rte_eth_dev *dev)
 778 {
 779         static const uint32_t ptypes[] = {
 780                 /* refers to nfp_net_set_hash() */
 781                 RTE_PTYPE_INNER_L3_IPV4,
 782                 RTE_PTYPE_INNER_L3_IPV6,
 783                 RTE_PTYPE_INNER_L3_IPV6_EXT,
 784                 RTE_PTYPE_INNER_L4_MASK,
 785                 RTE_PTYPE_UNKNOWN
 786         };
 787
 788         if (dev->rx_pkt_burst == nfp_net_recv_pkts)
 789                 return ptypes;
 790         return NULL;
 791 }
 792
 793 int
 794 nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 795 {
 796         struct rte_pci_device *pci_dev;
 797         struct nfp_net_hw *hw;
 798         int base = 0;
 799
 800         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 801         pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 802
 803         if (rte_intr_type_get(pci_dev->intr_handle) !=
 804                                                         RTE_INTR_HANDLE_UIO)
 805                 base = 1;
 806
 807         /* Make sure all updates are written before un-masking */
 808         rte_wmb();
 809         nn_cfg_writeb(hw, NFP_NET_CFG_ICR(base + queue_id),
 810                       NFP_NET_CFG_ICR_UNMASKED);
 811         return 0;
 812 }
 813
 814 int
 815 nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
 816 {
 817         struct rte_pci_device *pci_dev;
 818         struct nfp_net_hw *hw;
 819         int base = 0;
 820
 821         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 822         pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 823
 824         if (rte_intr_type_get(pci_dev->intr_handle) !=
 825                                                         RTE_INTR_HANDLE_UIO)
 826                 base = 1;
 827
 828         /* Make sure all updates are written before un-masking */
 829         rte_wmb();
 830         nn_cfg_writeb(hw, NFP_NET_CFG_ICR(base + queue_id), 0x1);
 831         return 0;
 832 }
 833
 834 static void
 835 nfp_net_dev_link_status_print(struct rte_eth_dev *dev)
 836 {
 837         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 838         struct rte_eth_link link;
 839
 840         rte_eth_linkstatus_get(dev, &link);
 841         if (link.link_status)
 842                 PMD_DRV_LOG(INFO, "Port %d: Link Up - speed %u Mbps - %s",
 843                             dev->data->port_id, link.link_speed,
 844                             link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX
 845                             ? "full-duplex" : "half-duplex");
 846         else
 847                 PMD_DRV_LOG(INFO, " Port %d: Link Down",
 848                             dev->data->port_id);
 849
 850         PMD_DRV_LOG(INFO, "PCI Address: " PCI_PRI_FMT,
 851                     pci_dev->addr.domain, pci_dev->addr.bus,
 852                     pci_dev->addr.devid, pci_dev->addr.function);
 853 }
 854
 855 /* Interrupt configuration and handling */
 856
 857 /*
 858  * nfp_net_irq_unmask - Unmask an interrupt
 859  *
 860  * If MSI-X auto-masking is enabled clear the mask bit, otherwise
 861  * clear the ICR for the entry.
 862  */
 863 static void
 864 nfp_net_irq_unmask(struct rte_eth_dev *dev)
 865 {
 866         struct nfp_net_hw *hw;
 867         struct rte_pci_device *pci_dev;
 868
 869         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 870         pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 871
 872         if (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {
 873                 /* If MSI-X auto-masking is used, clear the entry */
 874                 rte_wmb();
 875                 rte_intr_ack(pci_dev->intr_handle);
 876         } else {
 877                 /* Make sure all updates are written before un-masking */
 878                 rte_wmb();
 879                 nn_cfg_writeb(hw, NFP_NET_CFG_ICR(NFP_NET_IRQ_LSC_IDX),
 880                               NFP_NET_CFG_ICR_UNMASKED);
 881         }
 882 }
 883
 884 /*
 885  * Interrupt handler which shall be registered for alarm callback for delayed
 886  * handling specific interrupt to wait for the stable nic state. As the NIC
 887  * interrupt state is not stable for nfp after link is just down, it needs
 888  * to wait 4 seconds to get the stable status.
 889  *
 890  * @param handle   Pointer to interrupt handle.
 891  * @param param    The address of parameter (struct rte_eth_dev *)
 892  *
 893  * @return  void
 894  */
 895 void
 896 nfp_net_dev_interrupt_delayed_handler(void *param)
 897 {
 898         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
 899
 900         nfp_net_link_update(dev, 0);
 901         rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 902
 903         nfp_net_dev_link_status_print(dev);
 904
 905         /* Unmasking */
 906         nfp_net_irq_unmask(dev);
 907 }
 908
 909 void
 910 nfp_net_dev_interrupt_handler(void *param)
 911 {
 912         int64_t timeout;
 913         struct rte_eth_link link;
 914         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
 915
 916         PMD_DRV_LOG(DEBUG, "We got a LSC interrupt!!!");
 917
 918         rte_eth_linkstatus_get(dev, &link);
 919
 920         nfp_net_link_update(dev, 0);
 921
 922         /* likely to up */
 923         if (!link.link_status) {
 924                 /* handle it 1 sec later, wait it being stable */
 925                 timeout = NFP_NET_LINK_UP_CHECK_TIMEOUT;
 926                 /* likely to down */
 927         } else {
 928                 /* handle it 4 sec later, wait it being stable */
 929                 timeout = NFP_NET_LINK_DOWN_CHECK_TIMEOUT;
 930         }
 931
 932         if (rte_eal_alarm_set(timeout * 1000,
 933                               nfp_net_dev_interrupt_delayed_handler,
 934                               (void *)dev) < 0) {
 935                 PMD_INIT_LOG(ERR, "Error setting alarm");
 936                 /* Unmasking */
 937                 nfp_net_irq_unmask(dev);
 938         }
 939 }
 940
 941 int
 942 nfp_net_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 943 {
 944         struct nfp_net_hw *hw;
 945
 946         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 947
 948         /* mtu setting is forbidden if port is started */
 949         if (dev->data->dev_started) {
 950                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
 951                             dev->data->port_id);
 952                 return -EBUSY;
 953         }
 954
 955         /* writing to configuration space */
 956         nn_cfg_writel(hw, NFP_NET_CFG_MTU, mtu);
 957
 958         hw->mtu = mtu;
 959
 960         return 0;
 961 }
 962
 963 int
 964 nfp_net_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 965 {
 966         uint32_t new_ctrl, update;
 967         struct nfp_net_hw *hw;
 968         int ret;
 969
 970         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 971         new_ctrl = 0;
 972
 973         /* Enable vlan strip if it is not configured yet */
 974         if ((mask & RTE_ETH_VLAN_STRIP_OFFLOAD) &&
 975             !(hw->ctrl & NFP_NET_CFG_CTRL_RXVLAN))
 976                 new_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_RXVLAN;
 977
 978         /* Disable vlan strip just if it is configured */
 979         if (!(mask & RTE_ETH_VLAN_STRIP_OFFLOAD) &&
 980             (hw->ctrl & NFP_NET_CFG_CTRL_RXVLAN))
 981                 new_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_RXVLAN;
 982
 983         if (new_ctrl == 0)
 984                 return 0;
 985
 986         update = NFP_NET_CFG_UPDATE_GEN;
 987
 988         ret = nfp_net_reconfig(hw, new_ctrl, update);
 989         if (!ret)
 990                 hw->ctrl = new_ctrl;
 991
 992         return ret;
 993 }
 994
 995 static int
 996 nfp_net_rss_reta_write(struct rte_eth_dev *dev,
 997                     struct rte_eth_rss_reta_entry64 *reta_conf,
 998                     uint16_t reta_size)
 999 {
1000         uint32_t reta, mask;
1001         int i, j;
1002         int idx, shift;
1003         struct nfp_net_hw *hw =
1004                 NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1005
1006         if (reta_size != NFP_NET_CFG_RSS_ITBL_SZ) {
1007                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1008                         "(%d) doesn't match the number hardware can supported "
1009                         "(%d)", reta_size, NFP_NET_CFG_RSS_ITBL_SZ);
1010                 return -EINVAL;
1011         }
1012
1013         /*
1014          * Update Redirection Table. There are 128 8bit-entries which can be
1015          * manage as 32 32bit-entries
1016          */
1017         for (i = 0; i < reta_size; i += 4) {
1018                 /* Handling 4 RSS entries per loop */
1019                 idx = i / RTE_ETH_RETA_GROUP_SIZE;
1020                 shift = i % RTE_ETH_RETA_GROUP_SIZE;
1021                 mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xF);
1022
1023                 if (!mask)
1024                         continue;
1025
1026                 reta = 0;
1027                 /* If all 4 entries were set, don't need read RETA register */
1028                 if (mask != 0xF)
1029                         reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + i);
1030
1031                 for (j = 0; j < 4; j++) {
1032                         if (!(mask & (0x1 << j)))
1033                                 continue;
1034                         if (mask != 0xF)
1035                                 /* Clearing the entry bits */
1036                                 reta &= ~(0xFF << (8 * j));
1037                         reta |= reta_conf[idx].reta[shift + j] << (8 * j);
1038                 }
1039                 nn_cfg_writel(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) + shift,
1040                               reta);
1041         }
1042         return 0;
1043 }
1044
1045 /* Update Redirection Table(RETA) of Receive Side Scaling of Ethernet device */
1046 int
1047 nfp_net_reta_update(struct rte_eth_dev *dev,
1048                     struct rte_eth_rss_reta_entry64 *reta_conf,
1049                     uint16_t reta_size)
1050 {
1051         struct nfp_net_hw *hw =
1052                 NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1053         uint32_t update;
1054         int ret;
1055
1056         if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1057                 return -EINVAL;
1058
1059         ret = nfp_net_rss_reta_write(dev, reta_conf, reta_size);
1060         if (ret != 0)
1061                 return ret;
1062
1063         update = NFP_NET_CFG_UPDATE_RSS;
1064
1065         if (nfp_net_reconfig(hw, hw->ctrl, update) < 0)
1066                 return -EIO;
1067
1068         return 0;
1069 }
1070
1071  /* Query Redirection Table(RETA) of Receive Side Scaling of Ethernet device. */
1072 int
1073 nfp_net_reta_query(struct rte_eth_dev *dev,
1074                    struct rte_eth_rss_reta_entry64 *reta_conf,
1075                    uint16_t reta_size)
1076 {
1077         uint8_t i, j, mask;
1078         int idx, shift;
1079         uint32_t reta;
1080         struct nfp_net_hw *hw;
1081
1082         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1083
1084         if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1085                 return -EINVAL;
1086
1087         if (reta_size != NFP_NET_CFG_RSS_ITBL_SZ) {
1088                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1089                         "(%d) doesn't match the number hardware can supported "
1090                         "(%d)", reta_size, NFP_NET_CFG_RSS_ITBL_SZ);
1091                 return -EINVAL;
1092         }
1093
1094         /*
1095          * Reading Redirection Table. There are 128 8bit-entries which can be
1096          * manage as 32 32bit-entries
1097          */
1098         for (i = 0; i < reta_size; i += 4) {
1099                 /* Handling 4 RSS entries per loop */
1100                 idx = i / RTE_ETH_RETA_GROUP_SIZE;
1101                 shift = i % RTE_ETH_RETA_GROUP_SIZE;
1102                 mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xF);
1103
1104                 if (!mask)
1105                         continue;
1106
1107                 reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) +
1108                                     shift);
1109                 for (j = 0; j < 4; j++) {
1110                         if (!(mask & (0x1 << j)))
1111                                 continue;
1112                         reta_conf[idx].reta[shift + j] =
1113                                 (uint8_t)((reta >> (8 * j)) & 0xF);
1114                 }
1115         }
1116         return 0;
1117 }
1118
1119 static int
1120 nfp_net_rss_hash_write(struct rte_eth_dev *dev,
1121                         struct rte_eth_rss_conf *rss_conf)
1122 {
1123         struct nfp_net_hw *hw;
1124         uint64_t rss_hf;
1125         uint32_t cfg_rss_ctrl = 0;
1126         uint8_t key;
1127         int i;
1128
1129         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1130
1131         /* Writing the key byte a byte */
1132         for (i = 0; i < rss_conf->rss_key_len; i++) {
1133                 memcpy(&key, &rss_conf->rss_key[i], 1);
1134                 nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY + i, key);
1135         }
1136
1137         rss_hf = rss_conf->rss_hf;
1138
1139         if (rss_hf & RTE_ETH_RSS_IPV4)
1140                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4;
1141
1142         if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP)
1143                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4_TCP;
1144
1145         if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP)
1146                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4_UDP;
1147
1148         if (rss_hf & RTE_ETH_RSS_IPV6)
1149                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6;
1150
1151         if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP)
1152                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6_TCP;
1153
1154         if (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP)
1155                 cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV6_UDP;
1156
1157         cfg_rss_ctrl |= NFP_NET_CFG_RSS_MASK;
1158         cfg_rss_ctrl |= NFP_NET_CFG_RSS_TOEPLITZ;
1159
1160         /* configuring where to apply the RSS hash */
1161         nn_cfg_writel(hw, NFP_NET_CFG_RSS_CTRL, cfg_rss_ctrl);
1162
1163         /* Writing the key size */
1164         nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY_SZ, rss_conf->rss_key_len);
1165
1166         return 0;
1167 }
1168
1169 int
1170 nfp_net_rss_hash_update(struct rte_eth_dev *dev,
1171                         struct rte_eth_rss_conf *rss_conf)
1172 {
1173         uint32_t update;
1174         uint64_t rss_hf;
1175         struct nfp_net_hw *hw;
1176
1177         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1178
1179         rss_hf = rss_conf->rss_hf;
1180
1181         /* Checking if RSS is enabled */
1182         if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) {
1183                 if (rss_hf != 0) { /* Enable RSS? */
1184                         PMD_DRV_LOG(ERR, "RSS unsupported");
1185                         return -EINVAL;
1186                 }
1187                 return 0; /* Nothing to do */
1188         }
1189
1190         if (rss_conf->rss_key_len > NFP_NET_CFG_RSS_KEY_SZ) {
1191                 PMD_DRV_LOG(ERR, "hash key too long");
1192                 return -EINVAL;
1193         }
1194
1195         nfp_net_rss_hash_write(dev, rss_conf);
1196
1197         update = NFP_NET_CFG_UPDATE_RSS;
1198
1199         if (nfp_net_reconfig(hw, hw->ctrl, update) < 0)
1200                 return -EIO;
1201
1202         return 0;
1203 }
1204
1205 int
1206 nfp_net_rss_hash_conf_get(struct rte_eth_dev *dev,
1207                           struct rte_eth_rss_conf *rss_conf)
1208 {
1209         uint64_t rss_hf;
1210         uint32_t cfg_rss_ctrl;
1211         uint8_t key;
1212         int i;
1213         struct nfp_net_hw *hw;
1214
1215         hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1216
1217         if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS))
1218                 return -EINVAL;
1219
1220         rss_hf = rss_conf->rss_hf;
1221         cfg_rss_ctrl = nn_cfg_readl(hw, NFP_NET_CFG_RSS_CTRL);
1222
1223         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4)
1224                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_NONFRAG_IPV4_UDP;
1225
1226         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4_TCP)
1227                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP;
1228
1229         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6_TCP)
1230                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_TCP;
1231
1232         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV4_UDP)
1233                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP;
1234
1235         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6_UDP)
1236                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_UDP;
1237
1238         if (cfg_rss_ctrl & NFP_NET_CFG_RSS_IPV6)
1239                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_NONFRAG_IPV6_UDP;
1240
1241         /* Propagate current RSS hash functions to caller */
1242         rss_conf->rss_hf = rss_hf;
1243
1244         /* Reading the key size */
1245         rss_conf->rss_key_len = nn_cfg_readl(hw, NFP_NET_CFG_RSS_KEY_SZ);
1246
1247         /* Reading the key byte a byte */
1248         for (i = 0; i < rss_conf->rss_key_len; i++) {
1249                 key = nn_cfg_readb(hw, NFP_NET_CFG_RSS_KEY + i);
1250                 memcpy(&rss_conf->rss_key[i], &key, 1);
1251         }
1252
1253         return 0;
1254 }
1255
1256 int
1257 nfp_net_rss_config_default(struct rte_eth_dev *dev)
1258 {
1259         struct rte_eth_conf *dev_conf;
1260         struct rte_eth_rss_conf rss_conf;
1261         struct rte_eth_rss_reta_entry64 nfp_reta_conf[2];
1262         uint16_t rx_queues = dev->data->nb_rx_queues;
1263         uint16_t queue;
1264         int i, j, ret;
1265
1266         PMD_DRV_LOG(INFO, "setting default RSS conf for %u queues",
1267                 rx_queues);
1268
1269         nfp_reta_conf[0].mask = ~0x0;
1270         nfp_reta_conf[1].mask = ~0x0;
1271
1272         queue = 0;
1273         for (i = 0; i < 0x40; i += 8) {
1274                 for (j = i; j < (i + 8); j++) {
1275                         nfp_reta_conf[0].reta[j] = queue;
1276                         nfp_reta_conf[1].reta[j] = queue++;
1277                         queue %= rx_queues;
1278                 }
1279         }
1280         ret = nfp_net_rss_reta_write(dev, nfp_reta_conf, 0x80);
1281         if (ret != 0)
1282                 return ret;
1283
1284         dev_conf = &dev->data->dev_conf;
1285         if (!dev_conf) {
1286                 PMD_DRV_LOG(INFO, "wrong rss conf");
1287                 return -EINVAL;
1288         }
1289         rss_conf = dev_conf->rx_adv_conf.rss_conf;
1290
1291         ret = nfp_net_rss_hash_write(dev, &rss_conf);
1292
1293         return ret;
1294 }
1295
1296 RTE_LOG_REGISTER_SUFFIX(nfp_logtype_init, init, NOTICE);
1297 RTE_LOG_REGISTER_SUFFIX(nfp_logtype_driver, driver, NOTICE);
1298 /*
1299  * Local variables:
1300  * c-file-style: "Linux"
1301  * indent-tabs-mode: t
1302  * End:
1303  */