2 * Copyright (c) 2014, 2015 Netronome Systems, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * vim:shiftwidth=8:noexpandtab
35 * @file dpdk/pmd/nfp_net_pmd.h
37 * Netronome NFP_NET PDM driver
40 #ifndef _NFP_NET_PMD_H_
41 #define _NFP_NET_PMD_H_
43 #define NFP_NET_PMD_VERSION "0.1"
44 #define PCI_VENDOR_ID_NETRONOME 0x19ee
45 #define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000
46 #define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000
47 #define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003
49 /* Forward declaration */
50 struct nfp_net_adapter;
53 * The maximum number of descriptors is limited by design as
54 * DPDK uses uint16_t variables for these values
56 #define NFP_NET_MAX_TX_DESC (32 * 1024)
57 #define NFP_NET_MIN_TX_DESC 64
59 #define NFP_NET_MAX_RX_DESC (32 * 1024)
60 #define NFP_NET_MIN_RX_DESC 64
63 #define NFP_NET_CRTL_BAR 0
64 #define NFP_NET_TX_BAR 2
65 #define NFP_NET_RX_BAR 2
67 /* Macros for accessing the Queue Controller Peripheral 'CSRs' */
68 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800)
69 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000
70 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004
71 #define NFP_QCP_QUEUE_STS_LO 0x0008
72 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask (0x3ffff)
73 #define NFP_QCP_QUEUE_STS_HI 0x000c
74 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask (0x3ffff)
76 /* Interrupt definitions */
77 #define NFP_NET_IRQ_LSC_IDX 0
79 /* Default values for RX/TX configuration */
80 #define DEFAULT_RX_FREE_THRESH 32
81 #define DEFAULT_RX_PTHRESH 8
82 #define DEFAULT_RX_HTHRESH 8
83 #define DEFAULT_RX_WTHRESH 0
85 #define DEFAULT_TX_RS_THRESH 32
86 #define DEFAULT_TX_FREE_THRESH 32
87 #define DEFAULT_TX_PTHRESH 32
88 #define DEFAULT_TX_HTHRESH 0
89 #define DEFAULT_TX_WTHRESH 0
90 #define DEFAULT_TX_RSBIT_THRESH 32
92 /* Alignment for dma zones */
93 #define NFP_MEMZONE_ALIGN 128
96 * This is used by the reconfig protocol. It sets the maximum time waiting in
97 * milliseconds before a reconfig timeout happens.
99 #define NFP_NET_POLL_TIMEOUT 5000
101 #define NFP_QCP_QUEUE_ADDR_SZ (0x800)
103 #define NFP_NET_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
104 #define NFP_NET_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
106 /* Version number helper defines */
107 #define NFD_CFG_CLASS_VER_msk 0xff
108 #define NFD_CFG_CLASS_VER_shf 24
109 #define NFD_CFG_CLASS_VER(x) (((x) & 0xff) << 24)
110 #define NFD_CFG_CLASS_VER_of(x) (((x) >> 24) & 0xff)
111 #define NFD_CFG_CLASS_TYPE_msk 0xff
112 #define NFD_CFG_CLASS_TYPE_shf 16
113 #define NFD_CFG_CLASS_TYPE(x) (((x) & 0xff) << 16)
114 #define NFD_CFG_CLASS_TYPE_of(x) (((x) >> 16) & 0xff)
115 #define NFD_CFG_MAJOR_VERSION_msk 0xff
116 #define NFD_CFG_MAJOR_VERSION_shf 8
117 #define NFD_CFG_MAJOR_VERSION(x) (((x) & 0xff) << 8)
118 #define NFD_CFG_MAJOR_VERSION_of(x) (((x) >> 8) & 0xff)
119 #define NFD_CFG_MINOR_VERSION_msk 0xff
120 #define NFD_CFG_MINOR_VERSION_shf 0
121 #define NFD_CFG_MINOR_VERSION(x) (((x) & 0xff) << 0)
122 #define NFD_CFG_MINOR_VERSION_of(x) (((x) >> 0) & 0xff)
124 #include <linux/types.h>
127 static inline uint8_t nn_readb(volatile const void *addr)
129 return rte_read8(addr);
132 static inline void nn_writeb(uint8_t val, volatile void *addr)
134 rte_write8(val, addr);
137 static inline uint32_t nn_readl(volatile const void *addr)
139 return rte_read32(addr);
142 static inline void nn_writel(uint32_t val, volatile void *addr)
144 rte_write32(val, addr);
147 static inline void nn_writew(uint16_t val, volatile void *addr)
149 rte_write16(val, addr);
152 static inline uint64_t nn_readq(volatile void *addr)
154 const volatile uint32_t *p = addr;
157 high = nn_readl((volatile const void *)(p + 1));
158 low = nn_readl((volatile const void *)p);
160 return low + ((uint64_t)high << 32);
163 static inline void nn_writeq(uint64_t val, volatile void *addr)
165 nn_writel(val >> 32, (volatile char *)addr + 4);
166 nn_writel(val, addr);
169 /* TX descriptor format */
170 #define PCIE_DESC_TX_EOP (1 << 7)
171 #define PCIE_DESC_TX_OFFSET_MASK (0x7f)
173 /* Flags in the host TX descriptor */
174 #define PCIE_DESC_TX_CSUM (1 << 7)
175 #define PCIE_DESC_TX_IP4_CSUM (1 << 6)
176 #define PCIE_DESC_TX_TCP_CSUM (1 << 5)
177 #define PCIE_DESC_TX_UDP_CSUM (1 << 4)
178 #define PCIE_DESC_TX_VLAN (1 << 3)
179 #define PCIE_DESC_TX_LSO (1 << 2)
180 #define PCIE_DESC_TX_ENCAP_NONE (0)
181 #define PCIE_DESC_TX_ENCAP_VXLAN (1 << 1)
182 #define PCIE_DESC_TX_ENCAP_GRE (1 << 0)
184 struct nfp_net_tx_desc {
187 uint8_t dma_addr_hi; /* High bits of host buf address */
188 __le16 dma_len; /* Length to DMA for this desc */
189 uint8_t offset_eop; /* Offset in buf where pkt starts +
190 * highest bit is eop flag.
192 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
194 __le16 lso; /* MSS to be used for LSO */
195 uint8_t l4_offset; /* LSO, where the L4 data starts */
196 uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
198 __le16 vlan; /* VLAN tag to add if indicated */
199 __le16 data_len; /* Length of frame + meta data */
200 } __attribute__((__packed__));
206 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
209 * Queue information: @qidx is the queue index from Linux's
210 * perspective. @tx_qcidx is the index of the Queue
211 * Controller Peripheral queue relative to the TX queue BAR.
212 * @cnt is the size of the queue in number of
213 * descriptors. @qcp_q is a pointer to the base of the queue
214 * structure on the NFP
219 * Read and Write pointers. @wr_p and @rd_p are host side pointer,
220 * they are free running and have little relation to the QCP pointers *
221 * @qcp_rd_p is a local copy queue controller peripheral read pointer
229 uint32_t tx_free_thresh;
232 * For each descriptor keep a reference to the mbuff and
233 * DMA address used until completion is signalled.
236 struct rte_mbuf *mbuf;
240 * Information about the host side queue location. @txds is
241 * the virtual address for the queue, @dma is the DMA address
242 * of the queue and @size is the size in bytes for the queue
245 struct nfp_net_tx_desc *txds;
248 * At this point 48 bytes have been used for all the fields in the
249 * TX critical path. We have room for 8 bytes and still all placed
250 * in a cache line. We are not using the threshold values below nor
251 * the txq_flags but if we need to, we can add the most used in the
254 uint32_t tx_rs_thresh; /* not used by now. Future? */
255 uint32_t tx_pthresh; /* not used by now. Future? */
256 uint32_t tx_hthresh; /* not used by now. Future? */
257 uint32_t tx_wthresh; /* not used by now. Future? */
258 uint32_t txq_flags; /* not used by now. Future? */
263 } __attribute__ ((__aligned__(64)));
265 /* RX and freelist descriptor format */
266 #define PCIE_DESC_RX_DD (1 << 7)
267 #define PCIE_DESC_RX_META_LEN_MASK (0x7f)
269 /* Flags in the RX descriptor */
270 #define PCIE_DESC_RX_RSS (1 << 15)
271 #define PCIE_DESC_RX_I_IP4_CSUM (1 << 14)
272 #define PCIE_DESC_RX_I_IP4_CSUM_OK (1 << 13)
273 #define PCIE_DESC_RX_I_TCP_CSUM (1 << 12)
274 #define PCIE_DESC_RX_I_TCP_CSUM_OK (1 << 11)
275 #define PCIE_DESC_RX_I_UDP_CSUM (1 << 10)
276 #define PCIE_DESC_RX_I_UDP_CSUM_OK (1 << 9)
277 #define PCIE_DESC_RX_SPARE (1 << 8)
278 #define PCIE_DESC_RX_EOP (1 << 7)
279 #define PCIE_DESC_RX_IP4_CSUM (1 << 6)
280 #define PCIE_DESC_RX_IP4_CSUM_OK (1 << 5)
281 #define PCIE_DESC_RX_TCP_CSUM (1 << 4)
282 #define PCIE_DESC_RX_TCP_CSUM_OK (1 << 3)
283 #define PCIE_DESC_RX_UDP_CSUM (1 << 2)
284 #define PCIE_DESC_RX_UDP_CSUM_OK (1 << 1)
285 #define PCIE_DESC_RX_VLAN (1 << 0)
287 struct nfp_net_rx_desc {
289 /* Freelist descriptor */
296 } __attribute__((__packed__)) fld;
306 } __attribute__((__packed__)) rxd;
312 struct nfp_net_rx_buff {
313 struct rte_mbuf *mbuf;
317 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
320 * @qcp_fl and @qcp_rx are pointers to the base addresses of the
321 * freelist and RX queue controller peripheral queue structures on the
328 * Read and Write pointers. @wr_p and @rd_p are host side
329 * pointer, they are free running and have little relation to
330 * the QCP pointers. @wr_p is where the driver adds new
331 * freelist descriptors and @rd_p is where the driver start
332 * reading descriptors for newly arrive packets from.
337 * For each buffer placed on the freelist, record the
340 struct nfp_net_rx_buff *rxbufs;
343 * Information about the host side queue location. @rxds is
344 * the virtual address for the queue
346 struct nfp_net_rx_desc *rxds;
349 * The mempool is created by the user specifying a mbuf size.
350 * We save here the reference of the mempool needed in the RX
351 * path and the mbuf size for checking received packets can be
352 * safely copied to the mbuf using the NFP_NET_RX_OFFSET
354 struct rte_mempool *mem_pool;
358 * Next two fields are used for giving more free descriptors
361 uint16_t rx_free_thresh;
364 /* the size of the queue in number of descriptors */
368 * Fields above this point fit in a single cache line and are all used
369 * in the RX critical path. Fields below this point are just used
370 * during queue configuration or not used at all (yet)
373 /* referencing dev->data->port_id */
376 uint8_t crc_len; /* Not used by now */
377 uint8_t drop_en; /* Not used by now */
379 /* DMA address of the queue */
383 * Queue information: @qidx is the queue index from Linux's
384 * perspective. @fl_qcidx is the index of the Queue
385 * Controller peripheral queue relative to the RX queue BAR
386 * used for the freelist and @rx_qcidx is the Queue Controller
387 * Peripheral index for the RX queue.
392 } __attribute__ ((__aligned__(64)));
395 /* Info from the firmware */
402 /* Current values for control */
413 rte_spinlock_t reconfig_lock;
415 uint32_t max_tx_queues;
416 uint32_t max_rx_queues;
420 uint16_t subsystem_device_id;
421 uint16_t subsystem_vendor_id;
422 #if defined(DSTQ_SELECTION)
424 uint16_t device_function;
428 uint8_t mac_addr[ETHER_ADDR_LEN];
430 /* Records starting point for counters */
431 struct rte_eth_stats eth_stats_base;
433 #ifdef NFP_NET_LIBNFP
435 struct nfp_cpp_area *ctrl_area;
436 struct nfp_cpp_area *tx_area;
437 struct nfp_cpp_area *rx_area;
438 struct nfp_cpp_area *msix_area;
443 uint8_t pf_multiport_enabled;
444 union eth_table_entry *eth_table;
445 nspu_desc_t *nspu_desc;
446 nfpu_desc_t *nfpu_desc;
449 struct nfp_net_adapter {
450 struct nfp_net_hw hw;
453 #define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\
454 (&((struct nfp_net_adapter *)adapter)->hw)
456 #endif /* _NFP_NET_PMD_H_ */
459 * c-file-style: "Linux"
460 * indent-tabs-mode: t