1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2014-2018 Netronome Systems, Inc.
7 * vim:shiftwidth=8:noexpandtab
9 * @file dpdk/pmd/nfp_net_pmd.h
11 * Netronome NFP_NET PMD driver
14 #ifndef _NFP_NET_PMD_H_
15 #define _NFP_NET_PMD_H_
17 #define NFP_NET_PMD_VERSION "0.1"
18 #define PCI_VENDOR_ID_NETRONOME 0x19ee
19 #define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000
20 #define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000
21 #define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003
23 /* Forward declaration */
24 struct nfp_net_adapter;
27 * The maximum number of descriptors is limited by design as
28 * DPDK uses uint16_t variables for these values
30 #define NFP_NET_MAX_TX_DESC (32 * 1024)
31 #define NFP_NET_MIN_TX_DESC 64
33 #define NFP_NET_MAX_RX_DESC (32 * 1024)
34 #define NFP_NET_MIN_RX_DESC 64
36 /* Descriptor alignment */
37 #define NFP_ALIGN_RING_DESC 128
39 #define NFP_TX_MAX_SEG UINT8_MAX
40 #define NFP_TX_MAX_MTU_SEG 8
43 #define NFP_NET_CRTL_BAR 0
44 #define NFP_NET_TX_BAR 2
45 #define NFP_NET_RX_BAR 2
46 #define NFP_QCP_QUEUE_AREA_SZ 0x80000
48 /* Macros for accessing the Queue Controller Peripheral 'CSRs' */
49 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800)
50 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000
51 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004
52 #define NFP_QCP_QUEUE_STS_LO 0x0008
53 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask (0x3ffff)
54 #define NFP_QCP_QUEUE_STS_HI 0x000c
55 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask (0x3ffff)
57 /* Interrupt definitions */
58 #define NFP_NET_IRQ_LSC_IDX 0
60 /* Default values for RX/TX configuration */
61 #define DEFAULT_RX_FREE_THRESH 32
62 #define DEFAULT_RX_PTHRESH 8
63 #define DEFAULT_RX_HTHRESH 8
64 #define DEFAULT_RX_WTHRESH 0
66 #define DEFAULT_TX_RS_THRESH 32
67 #define DEFAULT_TX_FREE_THRESH 32
68 #define DEFAULT_TX_PTHRESH 32
69 #define DEFAULT_TX_HTHRESH 0
70 #define DEFAULT_TX_WTHRESH 0
71 #define DEFAULT_TX_RSBIT_THRESH 32
73 /* Alignment for dma zones */
74 #define NFP_MEMZONE_ALIGN 128
77 * This is used by the reconfig protocol. It sets the maximum time waiting in
78 * milliseconds before a reconfig timeout happens.
80 #define NFP_NET_POLL_TIMEOUT 5000
82 #define NFP_QCP_QUEUE_ADDR_SZ (0x800)
84 #define NFP_NET_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
85 #define NFP_NET_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
87 /* Version number helper defines */
88 #define NFD_CFG_CLASS_VER_msk 0xff
89 #define NFD_CFG_CLASS_VER_shf 24
90 #define NFD_CFG_CLASS_VER(x) (((x) & 0xff) << 24)
91 #define NFD_CFG_CLASS_VER_of(x) (((x) >> 24) & 0xff)
92 #define NFD_CFG_CLASS_TYPE_msk 0xff
93 #define NFD_CFG_CLASS_TYPE_shf 16
94 #define NFD_CFG_CLASS_TYPE(x) (((x) & 0xff) << 16)
95 #define NFD_CFG_CLASS_TYPE_of(x) (((x) >> 16) & 0xff)
96 #define NFD_CFG_MAJOR_VERSION_msk 0xff
97 #define NFD_CFG_MAJOR_VERSION_shf 8
98 #define NFD_CFG_MAJOR_VERSION(x) (((x) & 0xff) << 8)
99 #define NFD_CFG_MAJOR_VERSION_of(x) (((x) >> 8) & 0xff)
100 #define NFD_CFG_MINOR_VERSION_msk 0xff
101 #define NFD_CFG_MINOR_VERSION_shf 0
102 #define NFD_CFG_MINOR_VERSION(x) (((x) & 0xff) << 0)
103 #define NFD_CFG_MINOR_VERSION_of(x) (((x) >> 0) & 0xff)
105 /* Number of supported physical ports */
106 #define NFP_MAX_PHYPORTS 12
108 #include <linux/types.h>
111 static inline uint8_t nn_readb(volatile const void *addr)
113 return rte_read8(addr);
116 static inline void nn_writeb(uint8_t val, volatile void *addr)
118 rte_write8(val, addr);
121 static inline uint32_t nn_readl(volatile const void *addr)
123 return rte_read32(addr);
126 static inline void nn_writel(uint32_t val, volatile void *addr)
128 rte_write32(val, addr);
131 static inline void nn_writew(uint16_t val, volatile void *addr)
133 rte_write16(val, addr);
136 static inline uint64_t nn_readq(volatile void *addr)
138 const volatile uint32_t *p = addr;
141 high = nn_readl((volatile const void *)(p + 1));
142 low = nn_readl((volatile const void *)p);
144 return low + ((uint64_t)high << 32);
147 static inline void nn_writeq(uint64_t val, volatile void *addr)
149 nn_writel(val >> 32, (volatile char *)addr + 4);
150 nn_writel(val, addr);
153 /* TX descriptor format */
154 #define PCIE_DESC_TX_EOP (1 << 7)
155 #define PCIE_DESC_TX_OFFSET_MASK (0x7f)
157 /* Flags in the host TX descriptor */
158 #define PCIE_DESC_TX_CSUM (1 << 7)
159 #define PCIE_DESC_TX_IP4_CSUM (1 << 6)
160 #define PCIE_DESC_TX_TCP_CSUM (1 << 5)
161 #define PCIE_DESC_TX_UDP_CSUM (1 << 4)
162 #define PCIE_DESC_TX_VLAN (1 << 3)
163 #define PCIE_DESC_TX_LSO (1 << 2)
164 #define PCIE_DESC_TX_ENCAP_NONE (0)
165 #define PCIE_DESC_TX_ENCAP_VXLAN (1 << 1)
166 #define PCIE_DESC_TX_ENCAP_GRE (1 << 0)
168 struct nfp_net_tx_desc {
171 uint8_t dma_addr_hi; /* High bits of host buf address */
172 __le16 dma_len; /* Length to DMA for this desc */
173 uint8_t offset_eop; /* Offset in buf where pkt starts +
174 * highest bit is eop flag.
176 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
178 __le16 mss; /* MSS to be used for LSO */
179 uint8_t lso_hdrlen; /* LSO, where the data starts */
180 uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
185 * L3 and L4 header offsets required
191 __le16 vlan; /* VLAN tag to add if indicated */
193 __le16 data_len; /* Length of frame + meta data */
200 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
203 * Queue information: @qidx is the queue index from Linux's
204 * perspective. @tx_qcidx is the index of the Queue
205 * Controller Peripheral queue relative to the TX queue BAR.
206 * @cnt is the size of the queue in number of
207 * descriptors. @qcp_q is a pointer to the base of the queue
208 * structure on the NFP
213 * Read and Write pointers. @wr_p and @rd_p are host side pointer,
214 * they are free running and have little relation to the QCP pointers *
215 * @qcp_rd_p is a local copy queue controller peripheral read pointer
223 uint32_t tx_free_thresh;
226 * For each descriptor keep a reference to the mbuf and
227 * DMA address used until completion is signalled.
230 struct rte_mbuf *mbuf;
234 * Information about the host side queue location. @txds is
235 * the virtual address for the queue, @dma is the DMA address
236 * of the queue and @size is the size in bytes for the queue
239 struct nfp_net_tx_desc *txds;
242 * At this point 48 bytes have been used for all the fields in the
243 * TX critical path. We have room for 8 bytes and still all placed
244 * in a cache line. We are not using the threshold values below but
245 * if we need to, we can add the most used in the remaining bytes.
247 uint32_t tx_rs_thresh; /* not used by now. Future? */
248 uint32_t tx_pthresh; /* not used by now. Future? */
249 uint32_t tx_hthresh; /* not used by now. Future? */
250 uint32_t tx_wthresh; /* not used by now. Future? */
257 /* RX and freelist descriptor format */
258 #define PCIE_DESC_RX_DD (1 << 7)
259 #define PCIE_DESC_RX_META_LEN_MASK (0x7f)
261 /* Flags in the RX descriptor */
262 #define PCIE_DESC_RX_RSS (1 << 15)
263 #define PCIE_DESC_RX_I_IP4_CSUM (1 << 14)
264 #define PCIE_DESC_RX_I_IP4_CSUM_OK (1 << 13)
265 #define PCIE_DESC_RX_I_TCP_CSUM (1 << 12)
266 #define PCIE_DESC_RX_I_TCP_CSUM_OK (1 << 11)
267 #define PCIE_DESC_RX_I_UDP_CSUM (1 << 10)
268 #define PCIE_DESC_RX_I_UDP_CSUM_OK (1 << 9)
269 #define PCIE_DESC_RX_SPARE (1 << 8)
270 #define PCIE_DESC_RX_EOP (1 << 7)
271 #define PCIE_DESC_RX_IP4_CSUM (1 << 6)
272 #define PCIE_DESC_RX_IP4_CSUM_OK (1 << 5)
273 #define PCIE_DESC_RX_TCP_CSUM (1 << 4)
274 #define PCIE_DESC_RX_TCP_CSUM_OK (1 << 3)
275 #define PCIE_DESC_RX_UDP_CSUM (1 << 2)
276 #define PCIE_DESC_RX_UDP_CSUM_OK (1 << 1)
277 #define PCIE_DESC_RX_VLAN (1 << 0)
279 #define PCIE_DESC_RX_L4_CSUM_OK (PCIE_DESC_RX_TCP_CSUM_OK | \
280 PCIE_DESC_RX_UDP_CSUM_OK)
281 struct nfp_net_rx_desc {
283 /* Freelist descriptor */
306 struct nfp_net_rx_buff {
307 struct rte_mbuf *mbuf;
311 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
314 * @qcp_fl and @qcp_rx are pointers to the base addresses of the
315 * freelist and RX queue controller peripheral queue structures on the
322 * Read and Write pointers. @wr_p and @rd_p are host side
323 * pointer, they are free running and have little relation to
324 * the QCP pointers. @wr_p is where the driver adds new
325 * freelist descriptors and @rd_p is where the driver start
326 * reading descriptors for newly arrive packets from.
331 * For each buffer placed on the freelist, record the
334 struct nfp_net_rx_buff *rxbufs;
337 * Information about the host side queue location. @rxds is
338 * the virtual address for the queue
340 struct nfp_net_rx_desc *rxds;
343 * The mempool is created by the user specifying a mbuf size.
344 * We save here the reference of the mempool needed in the RX
345 * path and the mbuf size for checking received packets can be
346 * safely copied to the mbuf using the NFP_NET_RX_OFFSET
348 struct rte_mempool *mem_pool;
352 * Next two fields are used for giving more free descriptors
355 uint16_t rx_free_thresh;
358 /* the size of the queue in number of descriptors */
362 * Fields above this point fit in a single cache line and are all used
363 * in the RX critical path. Fields below this point are just used
364 * during queue configuration or not used at all (yet)
367 /* referencing dev->data->port_id */
370 uint8_t crc_len; /* Not used by now */
371 uint8_t drop_en; /* Not used by now */
373 /* DMA address of the queue */
377 * Queue information: @qidx is the queue index from Linux's
378 * perspective. @fl_qcidx is the index of the Queue
379 * Controller peripheral queue relative to the RX queue BAR
380 * used for the freelist and @rx_qcidx is the Queue Controller
381 * Peripheral index for the RX queue.
389 /* Backpointer to associated pci device */
390 struct rte_pci_device *pci_dev;
392 /* First physical port's eth device */
393 struct rte_eth_dev *eth_dev;
395 /* Array of physical ports belonging to this PF */
396 struct nfp_net_hw *ports[NFP_MAX_PHYPORTS];
398 /* Current values for control */
406 rte_spinlock_t reconfig_lock;
411 uint16_t subsystem_device_id;
412 uint16_t subsystem_vendor_id;
413 #if defined(DSTQ_SELECTION)
415 uint16_t device_function;
420 struct nfp_cpp_area *ctrl_area;
421 struct nfp_cpp_area *hwqueues_area;
422 struct nfp_cpp_area *msix_area;
425 uint8_t total_phyports;
428 union eth_table_entry *eth_table;
430 struct nfp_hwinfo *hwinfo;
431 struct nfp_rtsym_table *sym_tbl;
432 uint32_t nfp_cpp_service_id;
436 /* Backpointer to the PF this port belongs to */
437 struct nfp_pf_dev *pf_dev;
439 /* Backpointer to the eth_dev of this port*/
440 struct rte_eth_dev *eth_dev;
442 /* Info from the firmware */
449 /* Current values for control */
460 rte_spinlock_t reconfig_lock;
462 uint32_t max_tx_queues;
463 uint32_t max_rx_queues;
467 uint16_t subsystem_device_id;
468 uint16_t subsystem_vendor_id;
469 #if defined(DSTQ_SELECTION)
471 uint16_t device_function;
475 uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
477 /* Records starting point for counters */
478 struct rte_eth_stats eth_stats_base;
481 struct nfp_cpp_area *ctrl_area;
482 struct nfp_cpp_area *hwqueues_area;
483 struct nfp_cpp_area *msix_area;
489 union eth_table_entry *eth_table;
491 uint32_t nfp_cpp_service_id;
494 struct nfp_net_adapter {
495 struct nfp_net_hw hw;
498 #define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\
499 (&((struct nfp_net_adapter *)adapter)->hw)
501 #define NFP_NET_DEV_PRIVATE_TO_PF(dev_priv)\
502 (((struct nfp_net_hw *)dev_priv)->pf_dev)
504 #endif /* _NFP_NET_PMD_H_ */
507 * c-file-style: "Linux"
508 * indent-tabs-mode: t