2 * Copyright (c) 2014-2018 Netronome Systems, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
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19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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29 * POSSIBILITY OF SUCH DAMAGE.
33 * vim:shiftwidth=8:noexpandtab
35 * @file dpdk/pmd/nfp_net_pmd.h
37 * Netronome NFP_NET PDM driver
40 #ifndef _NFP_NET_PMD_H_
41 #define _NFP_NET_PMD_H_
43 #define NFP_NET_PMD_VERSION "0.1"
44 #define PCI_VENDOR_ID_NETRONOME 0x19ee
45 #define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000
46 #define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000
47 #define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003
49 /* Forward declaration */
50 struct nfp_net_adapter;
53 * The maximum number of descriptors is limited by design as
54 * DPDK uses uint16_t variables for these values
56 #define NFP_NET_MAX_TX_DESC (32 * 1024)
57 #define NFP_NET_MIN_TX_DESC 64
59 #define NFP_NET_MAX_RX_DESC (32 * 1024)
60 #define NFP_NET_MIN_RX_DESC 64
63 #define NFP_NET_CRTL_BAR 0
64 #define NFP_NET_TX_BAR 2
65 #define NFP_NET_RX_BAR 2
66 #define NFP_QCP_QUEUE_AREA_SZ 0x80000
68 /* Macros for accessing the Queue Controller Peripheral 'CSRs' */
69 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800)
70 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000
71 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004
72 #define NFP_QCP_QUEUE_STS_LO 0x0008
73 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask (0x3ffff)
74 #define NFP_QCP_QUEUE_STS_HI 0x000c
75 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask (0x3ffff)
77 /* Interrupt definitions */
78 #define NFP_NET_IRQ_LSC_IDX 0
80 /* Default values for RX/TX configuration */
81 #define DEFAULT_RX_FREE_THRESH 32
82 #define DEFAULT_RX_PTHRESH 8
83 #define DEFAULT_RX_HTHRESH 8
84 #define DEFAULT_RX_WTHRESH 0
86 #define DEFAULT_TX_RS_THRESH 32
87 #define DEFAULT_TX_FREE_THRESH 32
88 #define DEFAULT_TX_PTHRESH 32
89 #define DEFAULT_TX_HTHRESH 0
90 #define DEFAULT_TX_WTHRESH 0
91 #define DEFAULT_TX_RSBIT_THRESH 32
93 /* Alignment for dma zones */
94 #define NFP_MEMZONE_ALIGN 128
97 * This is used by the reconfig protocol. It sets the maximum time waiting in
98 * milliseconds before a reconfig timeout happens.
100 #define NFP_NET_POLL_TIMEOUT 5000
102 #define NFP_QCP_QUEUE_ADDR_SZ (0x800)
104 #define NFP_NET_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
105 #define NFP_NET_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
107 /* Version number helper defines */
108 #define NFD_CFG_CLASS_VER_msk 0xff
109 #define NFD_CFG_CLASS_VER_shf 24
110 #define NFD_CFG_CLASS_VER(x) (((x) & 0xff) << 24)
111 #define NFD_CFG_CLASS_VER_of(x) (((x) >> 24) & 0xff)
112 #define NFD_CFG_CLASS_TYPE_msk 0xff
113 #define NFD_CFG_CLASS_TYPE_shf 16
114 #define NFD_CFG_CLASS_TYPE(x) (((x) & 0xff) << 16)
115 #define NFD_CFG_CLASS_TYPE_of(x) (((x) >> 16) & 0xff)
116 #define NFD_CFG_MAJOR_VERSION_msk 0xff
117 #define NFD_CFG_MAJOR_VERSION_shf 8
118 #define NFD_CFG_MAJOR_VERSION(x) (((x) & 0xff) << 8)
119 #define NFD_CFG_MAJOR_VERSION_of(x) (((x) >> 8) & 0xff)
120 #define NFD_CFG_MINOR_VERSION_msk 0xff
121 #define NFD_CFG_MINOR_VERSION_shf 0
122 #define NFD_CFG_MINOR_VERSION(x) (((x) & 0xff) << 0)
123 #define NFD_CFG_MINOR_VERSION_of(x) (((x) >> 0) & 0xff)
125 #include <linux/types.h>
128 static inline uint8_t nn_readb(volatile const void *addr)
130 return rte_read8(addr);
133 static inline void nn_writeb(uint8_t val, volatile void *addr)
135 rte_write8(val, addr);
138 static inline uint32_t nn_readl(volatile const void *addr)
140 return rte_read32(addr);
143 static inline void nn_writel(uint32_t val, volatile void *addr)
145 rte_write32(val, addr);
148 static inline void nn_writew(uint16_t val, volatile void *addr)
150 rte_write16(val, addr);
153 static inline uint64_t nn_readq(volatile void *addr)
155 const volatile uint32_t *p = addr;
158 high = nn_readl((volatile const void *)(p + 1));
159 low = nn_readl((volatile const void *)p);
161 return low + ((uint64_t)high << 32);
164 static inline void nn_writeq(uint64_t val, volatile void *addr)
166 nn_writel(val >> 32, (volatile char *)addr + 4);
167 nn_writel(val, addr);
170 /* TX descriptor format */
171 #define PCIE_DESC_TX_EOP (1 << 7)
172 #define PCIE_DESC_TX_OFFSET_MASK (0x7f)
174 /* Flags in the host TX descriptor */
175 #define PCIE_DESC_TX_CSUM (1 << 7)
176 #define PCIE_DESC_TX_IP4_CSUM (1 << 6)
177 #define PCIE_DESC_TX_TCP_CSUM (1 << 5)
178 #define PCIE_DESC_TX_UDP_CSUM (1 << 4)
179 #define PCIE_DESC_TX_VLAN (1 << 3)
180 #define PCIE_DESC_TX_LSO (1 << 2)
181 #define PCIE_DESC_TX_ENCAP_NONE (0)
182 #define PCIE_DESC_TX_ENCAP_VXLAN (1 << 1)
183 #define PCIE_DESC_TX_ENCAP_GRE (1 << 0)
185 struct nfp_net_tx_desc {
188 uint8_t dma_addr_hi; /* High bits of host buf address */
189 __le16 dma_len; /* Length to DMA for this desc */
190 uint8_t offset_eop; /* Offset in buf where pkt starts +
191 * highest bit is eop flag.
193 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
195 __le16 mss; /* MSS to be used for LSO */
196 uint8_t lso_hdrlen; /* LSO, where the data starts */
197 uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
202 * L3 and L4 header offsets required
208 __le16 vlan; /* VLAN tag to add if indicated */
210 __le16 data_len; /* Length of frame + meta data */
211 } __attribute__((__packed__));
217 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
220 * Queue information: @qidx is the queue index from Linux's
221 * perspective. @tx_qcidx is the index of the Queue
222 * Controller Peripheral queue relative to the TX queue BAR.
223 * @cnt is the size of the queue in number of
224 * descriptors. @qcp_q is a pointer to the base of the queue
225 * structure on the NFP
230 * Read and Write pointers. @wr_p and @rd_p are host side pointer,
231 * they are free running and have little relation to the QCP pointers *
232 * @qcp_rd_p is a local copy queue controller peripheral read pointer
240 uint32_t tx_free_thresh;
243 * For each descriptor keep a reference to the mbuff and
244 * DMA address used until completion is signalled.
247 struct rte_mbuf *mbuf;
251 * Information about the host side queue location. @txds is
252 * the virtual address for the queue, @dma is the DMA address
253 * of the queue and @size is the size in bytes for the queue
256 struct nfp_net_tx_desc *txds;
259 * At this point 48 bytes have been used for all the fields in the
260 * TX critical path. We have room for 8 bytes and still all placed
261 * in a cache line. We are not using the threshold values below but
262 * if we need to, we can add the most used in the remaining bytes.
264 uint32_t tx_rs_thresh; /* not used by now. Future? */
265 uint32_t tx_pthresh; /* not used by now. Future? */
266 uint32_t tx_hthresh; /* not used by now. Future? */
267 uint32_t tx_wthresh; /* not used by now. Future? */
272 } __attribute__ ((__aligned__(64)));
274 /* RX and freelist descriptor format */
275 #define PCIE_DESC_RX_DD (1 << 7)
276 #define PCIE_DESC_RX_META_LEN_MASK (0x7f)
278 /* Flags in the RX descriptor */
279 #define PCIE_DESC_RX_RSS (1 << 15)
280 #define PCIE_DESC_RX_I_IP4_CSUM (1 << 14)
281 #define PCIE_DESC_RX_I_IP4_CSUM_OK (1 << 13)
282 #define PCIE_DESC_RX_I_TCP_CSUM (1 << 12)
283 #define PCIE_DESC_RX_I_TCP_CSUM_OK (1 << 11)
284 #define PCIE_DESC_RX_I_UDP_CSUM (1 << 10)
285 #define PCIE_DESC_RX_I_UDP_CSUM_OK (1 << 9)
286 #define PCIE_DESC_RX_SPARE (1 << 8)
287 #define PCIE_DESC_RX_EOP (1 << 7)
288 #define PCIE_DESC_RX_IP4_CSUM (1 << 6)
289 #define PCIE_DESC_RX_IP4_CSUM_OK (1 << 5)
290 #define PCIE_DESC_RX_TCP_CSUM (1 << 4)
291 #define PCIE_DESC_RX_TCP_CSUM_OK (1 << 3)
292 #define PCIE_DESC_RX_UDP_CSUM (1 << 2)
293 #define PCIE_DESC_RX_UDP_CSUM_OK (1 << 1)
294 #define PCIE_DESC_RX_VLAN (1 << 0)
296 struct nfp_net_rx_desc {
298 /* Freelist descriptor */
305 } __attribute__((__packed__)) fld;
315 } __attribute__((__packed__)) rxd;
321 struct nfp_net_rx_buff {
322 struct rte_mbuf *mbuf;
326 struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
329 * @qcp_fl and @qcp_rx are pointers to the base addresses of the
330 * freelist and RX queue controller peripheral queue structures on the
337 * Read and Write pointers. @wr_p and @rd_p are host side
338 * pointer, they are free running and have little relation to
339 * the QCP pointers. @wr_p is where the driver adds new
340 * freelist descriptors and @rd_p is where the driver start
341 * reading descriptors for newly arrive packets from.
346 * For each buffer placed on the freelist, record the
349 struct nfp_net_rx_buff *rxbufs;
352 * Information about the host side queue location. @rxds is
353 * the virtual address for the queue
355 struct nfp_net_rx_desc *rxds;
358 * The mempool is created by the user specifying a mbuf size.
359 * We save here the reference of the mempool needed in the RX
360 * path and the mbuf size for checking received packets can be
361 * safely copied to the mbuf using the NFP_NET_RX_OFFSET
363 struct rte_mempool *mem_pool;
367 * Next two fields are used for giving more free descriptors
370 uint16_t rx_free_thresh;
373 /* the size of the queue in number of descriptors */
377 * Fields above this point fit in a single cache line and are all used
378 * in the RX critical path. Fields below this point are just used
379 * during queue configuration or not used at all (yet)
382 /* referencing dev->data->port_id */
385 uint8_t crc_len; /* Not used by now */
386 uint8_t drop_en; /* Not used by now */
388 /* DMA address of the queue */
392 * Queue information: @qidx is the queue index from Linux's
393 * perspective. @fl_qcidx is the index of the Queue
394 * Controller peripheral queue relative to the RX queue BAR
395 * used for the freelist and @rx_qcidx is the Queue Controller
396 * Peripheral index for the RX queue.
401 } __attribute__ ((__aligned__(64)));
404 /* Info from the firmware */
411 /* Current values for control */
422 rte_spinlock_t reconfig_lock;
424 uint32_t max_tx_queues;
425 uint32_t max_rx_queues;
429 uint16_t subsystem_device_id;
430 uint16_t subsystem_vendor_id;
431 #if defined(DSTQ_SELECTION)
433 uint16_t device_function;
437 uint8_t mac_addr[ETHER_ADDR_LEN];
439 /* Records starting point for counters */
440 struct rte_eth_stats eth_stats_base;
443 struct nfp_cpp_area *ctrl_area;
444 struct nfp_cpp_area *hwqueues_area;
445 struct nfp_cpp_area *msix_area;
450 uint8_t pf_multiport_enabled;
453 union eth_table_entry *eth_table;
455 struct nfp_hwinfo *hwinfo;
456 struct nfp_rtsym_table *sym_tbl;
459 struct nfp_net_adapter {
460 struct nfp_net_hw hw;
463 #define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\
464 (&((struct nfp_net_adapter *)adapter)->hw)
466 #endif /* _NFP_NET_PMD_H_ */
469 * c-file-style: "Linux"
470 * indent-tabs-mode: t