14 #define CFG_EXP_BAR_ADDR_SZ 1
15 #define CFG_EXP_BAR_MAP_TYPE 1
17 #define EXP_BAR_TARGET_SHIFT 23
18 #define EXP_BAR_LENGTH_SHIFT 27 /* 0=32, 1=64 bit increment */
19 #define EXP_BAR_MAP_TYPE_SHIFT 29 /* Bulk BAR map */
21 /* NFP target for NSP access */
22 #define NFP_NSP_TARGET 7
24 /* Expansion BARs for mapping PF vnic BARs */
25 #define NFP_NET_PF_CFG_EXP_BAR 6
28 * This is an NFP internal address used for configuring properly an NFP
31 #define MEM_CMD_BASE_ADDR 0x8100000000
33 /* NSP interface registers */
34 #define NSP_BASE (MEM_CMD_BASE_ADDR + 0x22100)
35 #define NSP_STATUS 0x00
36 #define NSP_COMMAND 0x08
37 #define NSP_BUFFER 0x10
38 #define NSP_DEFAULT_BUF 0x18
39 #define NSP_DEFAULT_BUF_CFG 0x20
41 #define NSP_MAGIC 0xab10
42 #define NSP_STATUS_MAGIC(x) (((x) >> 48) & 0xffff)
43 #define NSP_STATUS_MAJOR(x) (int)(((x) >> 44) & 0xf)
44 #define NSP_STATUS_MINOR(x) (int)(((x) >> 32) & 0xfff)
47 #define NSP_CMD_RESET 1
48 #define NSP_CMD_FW_LOAD 6
49 #define NSP_CMD_GET_SYMBOL 14
51 #define NSP_BUFFER_CFG_SIZE_MASK (0xff)
53 #define NSP_REG_ADDR(d, off, reg) ((uint8_t *)(d)->mem_base + (off) + (reg))
54 #define NSP_REG_VAL(p) (*(uint64_t *)(p))
57 * An NFP expansion BAR is configured for allowing access to a specific NFP
61 * desc: struct with basic NSP addresses to work with
62 * expbar: NFP PF expansion BAR index to configure
63 * tgt: NFP target to configure access
64 * addr: NFP target address
67 * pcie_offset: NFP PCI BAR offset to work with
70 nfp_nspu_mem_bar_cfg(nspu_desc_t *desc, int expbar, int tgt,
71 uint64_t addr, uint64_t *pcie_offset)
79 * NFP CPP address to configure. This comes from NFP 6000
80 * datasheet document based on Bulk mapping.
82 x = (addr >> (barsz - 3)) << (21 - (40 - (barsz - 3)));
83 x |= CFG_EXP_BAR_MAP_TYPE << EXP_BAR_MAP_TYPE_SHIFT;
84 x |= CFG_EXP_BAR_ADDR_SZ << EXP_BAR_LENGTH_SHIFT;
85 x |= tgt << EXP_BAR_TARGET_SHIFT;
87 /* Getting expansion bar configuration register address */
88 expbar_ptr = (uint32_t *)desc->cfg_base;
89 /* Each physical PCI BAR has 8 NFP expansion BARs */
90 expbar_ptr += (desc->pcie_bar * 8) + expbar;
92 /* Writing to the expansion BAR register */
93 *expbar_ptr = (uint32_t)x;
95 /* Getting the pcie offset to work with from userspace */
96 y = addr & ((uint64_t)(1 << (barsz - 3)) - 1);
101 * Configuring an expansion bar for accessing NSP userspace interface. This
102 * function configures always the same expansion bar, which implies access to
103 * previously configured NFP target is lost.
106 nspu_xlate(nspu_desc_t *desc, uint64_t addr, uint64_t *pcie_offset)
108 nfp_nspu_mem_bar_cfg(desc, desc->exp_bar, NFP_NSP_TARGET, addr,
113 nfp_nsp_get_abi_version(nspu_desc_t *desc, int *major, int *minor)
115 uint64_t pcie_offset;
118 nspu_xlate(desc, NSP_BASE, &pcie_offset);
119 nsp_reg = NSP_REG_VAL(NSP_REG_ADDR(desc, pcie_offset, NSP_STATUS));
121 if (NSP_STATUS_MAGIC(nsp_reg) != NSP_MAGIC)
124 *major = NSP_STATUS_MAJOR(nsp_reg);
125 *minor = NSP_STATUS_MINOR(nsp_reg);
131 nfp_nspu_init(nspu_desc_t *desc, int nfp, int pcie_bar, size_t pcie_barsz,
132 int exp_bar, void *exp_bar_cfg_base, void *exp_bar_mmap)
134 uint64_t offset, buffaddr;
138 desc->pcie_bar = pcie_bar;
139 desc->exp_bar = exp_bar;
140 desc->barsz = pcie_barsz;
141 desc->windowsz = 1 << (desc->barsz - 3);
142 desc->cfg_base = exp_bar_cfg_base;
143 desc->mem_base = exp_bar_mmap;
145 nspu_xlate(desc, NSP_BASE, &offset);
148 * Other NSPU clients can use other buffers. Let's tell NSPU we use the
151 buffaddr = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_DEFAULT_BUF));
152 NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_BUFFER)) = buffaddr;
154 /* NFP internal addresses are 40 bits. Clean all other bits here */
155 buffaddr = buffaddr & (((uint64_t)1 << 40) - 1);
156 desc->bufaddr = buffaddr;
158 /* Lets get information about the buffer */
159 nsp_reg = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_DEFAULT_BUF_CFG));
161 /* Buffer size comes in MBs. Coversion to bytes */
162 desc->buf_size = ((size_t)nsp_reg & NSP_BUFFER_CFG_SIZE_MASK) << 20;
167 #define NSPU_NFP_BUF(addr, base, off) \
168 (*(uint64_t *)((uint8_t *)(addr)->mem_base + ((base) | (off))))
170 #define NSPU_HOST_BUF(base, off) (*(uint64_t *)((uint8_t *)(base) + (off)))
173 nspu_buff_write(nspu_desc_t *desc, void *buffer, size_t size)
175 uint64_t pcie_offset, pcie_window_base, pcie_window_offset;
176 uint64_t windowsz = desc->windowsz;
177 uint64_t buffaddr, j, i = 0;
180 if (size > desc->buf_size)
183 buffaddr = desc->bufaddr;
184 windowsz = desc->windowsz;
187 /* Expansion bar reconfiguration per window size */
188 nspu_xlate(desc, buffaddr + i, &pcie_offset);
189 pcie_window_base = pcie_offset & (~(windowsz - 1));
190 pcie_window_offset = pcie_offset & (windowsz - 1);
191 for (j = pcie_window_offset; ((j < windowsz) && (i < size));
193 NSPU_NFP_BUF(desc, pcie_window_base, j) =
194 NSPU_HOST_BUF(buffer, i);
203 nspu_buff_read(nspu_desc_t *desc, void *buffer, size_t size)
205 uint64_t pcie_offset, pcie_window_base, pcie_window_offset;
206 uint64_t windowsz, i = 0, j;
210 if (size > desc->buf_size)
213 buffaddr = desc->bufaddr;
214 windowsz = desc->windowsz;
217 /* Expansion bar reconfiguration per window size */
218 nspu_xlate(desc, buffaddr + i, &pcie_offset);
219 pcie_window_base = pcie_offset & (~(windowsz - 1));
220 pcie_window_offset = pcie_offset & (windowsz - 1);
221 for (j = pcie_window_offset; ((j < windowsz) && (i < size));
223 NSPU_HOST_BUF(buffer, i) =
224 NSPU_NFP_BUF(desc, pcie_window_base, j);
233 nspu_command(nspu_desc_t *desc, uint16_t cmd, int read, int write,
234 void *buffer, size_t rsize, size_t wsize)
236 uint64_t status, cmd_reg;
242 /* Same expansion BAR is used for different things */
243 nspu_xlate(desc, NSP_BASE, &offset);
245 status = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_STATUS));
247 while ((status & 0x1) && (retry < retries)) {
248 status = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_STATUS));
253 if (retry == retries)
257 ret = nspu_buff_write(desc, buffer, wsize);
261 /* Expansion BAR changes when writing the buffer */
262 nspu_xlate(desc, NSP_BASE, &offset);
265 NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_COMMAND)) =
266 (uint64_t)wsize << 32 | (uint64_t)cmd << 16 | 1;
270 cmd_reg = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_COMMAND));
271 while ((cmd_reg & 0x1) && (retry < retries)) {
272 cmd_reg = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_COMMAND));
276 if (retry == retries)
280 status = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_STATUS));
281 while ((status & 0x1) && (retry < retries)) {
282 status = NSP_REG_VAL(NSP_REG_ADDR(desc, offset, NSP_STATUS));
287 if (retry == retries)
290 ret = status & (0xff << 8);
295 ret = nspu_buff_read(desc, buffer, rsize);
304 nfp_fw_reset(nspu_desc_t *nspu_desc)
308 res = nspu_command(nspu_desc, NSP_CMD_RESET, 0, 0, 0, 0, 0);
311 RTE_LOG(INFO, PMD, "fw reset failed: error %d", res);
316 #define DEFAULT_FW_PATH "/lib/firmware/netronome"
317 #define DEFAULT_FW_FILENAME "nic_dpdk_default.nffw"
320 nfp_fw_upload(nspu_desc_t *nspu_desc)
325 struct stat file_stat;
330 size = nspu_desc->buf_size;
332 sprintf(filename, "%s/%s", DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
333 fw_f = open(filename, O_RDONLY);
335 RTE_LOG(INFO, PMD, "Firmware file %s/%s not found.",
336 DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
340 fstat(fw_f, &file_stat);
342 fsize = file_stat.st_size;
343 RTE_LOG(DEBUG, PMD, "Firmware file with size: %" PRIu64 "\n",
346 if (fsize > (off_t)size) {
347 RTE_LOG(INFO, PMD, "fw file too big: %" PRIu64
348 " bytes (%" PRIu64 " max)",
349 (uint64_t)fsize, (uint64_t)size);
353 fw_buf = malloc((size_t)size);
355 RTE_LOG(INFO, PMD, "malloc failed for fw buffer");
358 memset(fw_buf, 0, size);
360 bytes = read(fw_f, fw_buf, fsize);
361 if (bytes != fsize) {
362 RTE_LOG(INFO, PMD, "Reading fw to buffer failed.\n"
363 "Just %" PRIu64 " of %" PRIu64 " bytes read.",
364 (uint64_t)bytes, (uint64_t)fsize);
369 ret = nspu_command(nspu_desc, NSP_CMD_FW_LOAD, 0, 1, fw_buf, 0, bytes);
376 /* Firmware symbol descriptor size */
377 #define NFP_SYM_DESC_LEN 40
379 #define SYMBOL_DATA(b, off) (*(int64_t *)((b) + (off)))
380 #define SYMBOL_UDATA(b, off) (*(uint64_t *)((b) + (off)))
382 /* Firmware symbols contain information about how to access what they
383 * represent. It can be as simple as an numeric variable declared at a
384 * specific NFP memory, but it can also be more complex structures and
385 * related to specific hardware functionalities or components. Target,
386 * domain and address allow to create the BAR window for accessing such
387 * hw object and size defines the length to map.
389 * A vNIC is a network interface implemented inside the NFP and using a
390 * subset of device PCI BARs. Specific firmware symbols allow to map those
391 * vNIC bars by host drivers like the NFP PMD.
393 * Accessing what the symbol represents implies to map the access through
394 * a PCI BAR window. NFP expansion BARs are used in this regard through
395 * the NSPU interface.
398 nfp_nspu_set_bar_from_symbl(nspu_desc_t *desc, const char *symbl,
399 uint32_t expbar, uint64_t *pcie_offset,
409 sym_buf = malloc(desc->buf_size);
410 strncpy(sym_buf, symbl, strlen(symbl));
411 ret = nspu_command(desc, NSP_CMD_GET_SYMBOL, 1, 1, sym_buf,
412 NFP_SYM_DESC_LEN, strlen(symbl));
414 RTE_LOG(DEBUG, PMD, "symbol resolution (%s) failed\n", symbl);
418 /* Reading symbol information */
419 type = SYMBOL_DATA(sym_buf, 0);
420 target = SYMBOL_DATA(sym_buf, 8);
421 domain = SYMBOL_DATA(sym_buf, 16);
422 addr = SYMBOL_UDATA(sym_buf, 24);
423 *size = (ssize_t)SYMBOL_UDATA(sym_buf, 32);
426 RTE_LOG(INFO, PMD, "wrong symbol type\n");
430 if (!(target == 7 || target == -7)) {
431 RTE_LOG(INFO, PMD, "wrong symbol target\n");
435 if (domain == 8 || domain == 9) {
436 RTE_LOG(INFO, PMD, "wrong symbol domain\n");
441 /* Adjusting address based on symbol location */
442 if ((domain >= 24) && (domain < 28) && (target == 7)) {
443 addr = 1ULL << 37 | addr | ((uint64_t)domain & 0x3) << 35;
445 addr = 1ULL << 39 | addr | ((uint64_t)domain & 0x3f) << 32;
450 /* Configuring NFP expansion bar for mapping specific PCI BAR window */
451 nfp_nspu_mem_bar_cfg(desc, expbar, target, addr, pcie_offset);
453 /* This is the PCI BAR offset to use by the host */
454 *pcie_offset |= ((expbar & 0x7) << (desc->barsz - 3));
462 nfp_nsp_fw_setup(nspu_desc_t *desc, const char *sym, uint64_t *pcie_offset)
464 ssize_t bar0_sym_size;
466 /* If the symbol resolution works, it implies a firmware app
469 if (!nfp_nspu_set_bar_from_symbl(desc, sym, NFP_NET_PF_CFG_EXP_BAR,
470 pcie_offset, &bar0_sym_size))
473 /* No firmware app detected or not the right one */
474 RTE_LOG(INFO, PMD, "No firmware detected. Resetting NFP...\n");
475 if (nfp_fw_reset(desc) < 0) {
476 RTE_LOG(ERR, PMD, "nfp fw reset failed\n");
480 RTE_LOG(INFO, PMD, "Reset done.\n");
481 RTE_LOG(INFO, PMD, "Uploading firmware...\n");
483 if (nfp_fw_upload(desc) < 0) {
484 RTE_LOG(ERR, PMD, "nfp fw upload failed\n");
488 RTE_LOG(INFO, PMD, "Done.\n");
490 /* Now the symbol should be there */
491 if (nfp_nspu_set_bar_from_symbl(desc, sym, NFP_NET_PF_CFG_EXP_BAR,
492 pcie_offset, &bar0_sym_size)) {
493 RTE_LOG(ERR, PMD, "nfp PF BAR symbol resolution failed\n");