1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
8 #include "ngbe_eeprom.h"
13 * ngbe_init_hw - Generic hardware initialization
14 * @hw: pointer to hardware structure
16 * Initialize the hardware by resetting the hardware, filling the bus info
17 * structure and media type, clears all on chip counters, initializes receive
18 * address registers, multicast table, VLAN filter table, calls routine to set
19 * up link and flow control settings, and leaves transmit and receive units
20 * disabled and uninitialized
22 s32 ngbe_init_hw(struct ngbe_hw *hw)
26 DEBUGFUNC("ngbe_init_hw");
28 /* Reset the hardware */
29 status = hw->mac.reset_hw(hw);
32 DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
38 ngbe_reset_misc_em(struct ngbe_hw *hw)
42 wr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0xFFFFFFFF);
43 wr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);
45 /* receive packets that size > 2048 */
46 wr32m(hw, NGBE_MACRXCFG,
47 NGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);
49 wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
50 NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
52 /* clear counters on read */
53 wr32m(hw, NGBE_MACCNTCTL,
54 NGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);
56 wr32m(hw, NGBE_RXFCCFG,
57 NGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);
58 wr32m(hw, NGBE_TXFCCFG,
59 NGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);
61 wr32m(hw, NGBE_MACRXFLT,
62 NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);
64 wr32m(hw, NGBE_RSTSTAT,
65 NGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));
67 /* errata 4: initialize mng flex tbl and wakeup flex tbl*/
68 wr32(hw, NGBE_MNGFLEXSEL, 0);
69 for (i = 0; i < 16; i++) {
70 wr32(hw, NGBE_MNGFLEXDWL(i), 0);
71 wr32(hw, NGBE_MNGFLEXDWH(i), 0);
72 wr32(hw, NGBE_MNGFLEXMSK(i), 0);
74 wr32(hw, NGBE_LANFLEXSEL, 0);
75 for (i = 0; i < 16; i++) {
76 wr32(hw, NGBE_LANFLEXDWL(i), 0);
77 wr32(hw, NGBE_LANFLEXDWH(i), 0);
78 wr32(hw, NGBE_LANFLEXMSK(i), 0);
81 /* set pause frame dst mac addr */
82 wr32(hw, NGBE_RXPBPFCDMACL, 0xC2000001);
83 wr32(hw, NGBE_RXPBPFCDMACH, 0x0180);
85 wr32(hw, NGBE_MDIOMODE, 0xF);
87 wr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);
89 if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
90 (hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
91 /* gpio0 is used to power on/off control*/
92 wr32(hw, NGBE_GPIODIR, NGBE_GPIODIR_DDR(1));
93 wr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);
96 hw->mac.init_thermal_sensor_thresh(hw);
98 /* enable mac transmitter */
99 wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_TE, NGBE_MACTXCFG_TE);
102 wr32m(hw, NGBE_MACTXCFG,
103 NGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G);
105 for (i = 0; i < 4; i++)
106 wr32m(hw, NGBE_IVAR(i), 0x80808080, 0);
110 * ngbe_reset_hw_em - Perform hardware reset
111 * @hw: pointer to hardware structure
113 * Resets the hardware by resetting the transmit and receive units, masks
114 * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
117 s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
121 DEBUGFUNC("ngbe_reset_hw_em");
123 /* Call adapter stop to disable tx/rx and clear interrupts */
124 status = hw->mac.stop_hw(hw);
128 /* Identify PHY and related function pointers */
129 status = ngbe_init_phy(hw);
134 if (!hw->phy.reset_disable)
135 hw->phy.reset_hw(hw);
137 wr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));
141 ngbe_reset_misc_em(hw);
145 /* Store the permanent mac address */
146 hw->mac.get_mac_addr(hw, hw->mac.perm_addr);
149 * Store MAC address from RAR0, clear receive address registers, and
150 * clear the multicast table.
152 hw->mac.num_rar_entries = NGBE_EM_RAR_ENTRIES;
153 hw->mac.init_rx_addrs(hw);
159 * ngbe_get_mac_addr - Generic get MAC address
160 * @hw: pointer to hardware structure
161 * @mac_addr: Adapter MAC address
163 * Reads the adapter's MAC address from first Receive Address Register (RAR0)
164 * A reset of the adapter must be performed prior to calling this function
165 * in order for the MAC address to have been loaded from the EEPROM into RAR0
167 s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr)
173 DEBUGFUNC("ngbe_get_mac_addr");
175 wr32(hw, NGBE_ETHADDRIDX, 0);
176 rar_high = rd32(hw, NGBE_ETHADDRH);
177 rar_low = rd32(hw, NGBE_ETHADDRL);
179 for (i = 0; i < 2; i++)
180 mac_addr[i] = (u8)(rar_high >> (1 - i) * 8);
182 for (i = 0; i < 4; i++)
183 mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8);
189 * ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
190 * @hw: pointer to the HW structure
192 * Determines the LAN function id by reading memory-mapped registers and swaps
193 * the port value if requested, and set MAC instance for devices.
195 void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)
197 struct ngbe_bus_info *bus = &hw->bus;
200 DEBUGFUNC("ngbe_set_lan_id_multi_port");
202 reg = rd32(hw, NGBE_PORTSTAT);
203 bus->lan_id = NGBE_PORTSTAT_ID(reg);
204 bus->func = bus->lan_id;
208 * ngbe_stop_hw - Generic stop Tx/Rx units
209 * @hw: pointer to hardware structure
211 * Sets the adapter_stopped flag within ngbe_hw struct. Clears interrupts,
212 * disables transmit and receive units. The adapter_stopped flag is used by
213 * the shared code and drivers to determine if the adapter is in a stopped
214 * state and should not touch the hardware.
216 s32 ngbe_stop_hw(struct ngbe_hw *hw)
221 DEBUGFUNC("ngbe_stop_hw");
224 * Set the adapter_stopped flag so other driver functions stop touching
227 hw->adapter_stopped = true;
229 /* Disable the receive unit */
232 /* Clear interrupt mask to stop interrupts from being generated */
233 wr32(hw, NGBE_IENMISC, 0);
234 wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
236 /* Clear any pending interrupts, flush previous writes */
237 wr32(hw, NGBE_ICRMISC, NGBE_ICRMISC_MASK);
238 wr32(hw, NGBE_ICR(0), NGBE_ICR_MASK);
240 /* Disable the transmit unit. Each queue must be disabled. */
241 for (i = 0; i < hw->mac.max_tx_queues; i++)
242 wr32(hw, NGBE_TXCFG(i), NGBE_TXCFG_FLUSH);
244 /* Disable the receive unit by stopping each queue */
245 for (i = 0; i < hw->mac.max_rx_queues; i++) {
246 reg_val = rd32(hw, NGBE_RXCFG(i));
247 reg_val &= ~NGBE_RXCFG_ENA;
248 wr32(hw, NGBE_RXCFG(i), reg_val);
251 /* flush all queues disables */
259 * ngbe_validate_mac_addr - Validate MAC address
260 * @mac_addr: pointer to MAC address.
262 * Tests a MAC address to ensure it is a valid Individual Address.
264 s32 ngbe_validate_mac_addr(u8 *mac_addr)
268 DEBUGFUNC("ngbe_validate_mac_addr");
270 /* Make sure it is not a multicast address */
271 if (NGBE_IS_MULTICAST((struct rte_ether_addr *)mac_addr)) {
272 status = NGBE_ERR_INVALID_MAC_ADDR;
273 /* Not a broadcast address */
274 } else if (NGBE_IS_BROADCAST((struct rte_ether_addr *)mac_addr)) {
275 status = NGBE_ERR_INVALID_MAC_ADDR;
276 /* Reject the zero address */
277 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
278 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
279 status = NGBE_ERR_INVALID_MAC_ADDR;
285 * ngbe_set_rar - Set Rx address register
286 * @hw: pointer to hardware structure
287 * @index: Receive address register to write
288 * @addr: Address to put into receive address register
289 * @vmdq: VMDq "set" or "pool" index
290 * @enable_addr: set flag that address is active
292 * Puts an ethernet address into a receive address register.
294 s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
297 u32 rar_low, rar_high;
298 u32 rar_entries = hw->mac.num_rar_entries;
300 DEBUGFUNC("ngbe_set_rar");
302 /* Make sure we are using a valid rar index range */
303 if (index >= rar_entries) {
304 DEBUGOUT("RAR index %d is out of range.\n", index);
305 return NGBE_ERR_INVALID_ARGUMENT;
308 /* setup VMDq pool selection before this RAR gets enabled */
309 hw->mac.set_vmdq(hw, index, vmdq);
312 * HW expects these in little endian so we reverse the byte
313 * order from network order (big endian) to little endian
315 rar_low = NGBE_ETHADDRL_AD0(addr[5]) |
316 NGBE_ETHADDRL_AD1(addr[4]) |
317 NGBE_ETHADDRL_AD2(addr[3]) |
318 NGBE_ETHADDRL_AD3(addr[2]);
320 * Some parts put the VMDq setting in the extra RAH bits,
321 * so save everything except the lower 16 bits that hold part
322 * of the address and the address valid bit.
324 rar_high = rd32(hw, NGBE_ETHADDRH);
325 rar_high &= ~NGBE_ETHADDRH_AD_MASK;
326 rar_high |= (NGBE_ETHADDRH_AD4(addr[1]) |
327 NGBE_ETHADDRH_AD5(addr[0]));
329 rar_high &= ~NGBE_ETHADDRH_VLD;
330 if (enable_addr != 0)
331 rar_high |= NGBE_ETHADDRH_VLD;
333 wr32(hw, NGBE_ETHADDRIDX, index);
334 wr32(hw, NGBE_ETHADDRL, rar_low);
335 wr32(hw, NGBE_ETHADDRH, rar_high);
341 * ngbe_clear_rar - Remove Rx address register
342 * @hw: pointer to hardware structure
343 * @index: Receive address register to write
345 * Clears an ethernet address from a receive address register.
347 s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index)
350 u32 rar_entries = hw->mac.num_rar_entries;
352 DEBUGFUNC("ngbe_clear_rar");
354 /* Make sure we are using a valid rar index range */
355 if (index >= rar_entries) {
356 DEBUGOUT("RAR index %d is out of range.\n", index);
357 return NGBE_ERR_INVALID_ARGUMENT;
361 * Some parts put the VMDq setting in the extra RAH bits,
362 * so save everything except the lower 16 bits that hold part
363 * of the address and the address valid bit.
365 wr32(hw, NGBE_ETHADDRIDX, index);
366 rar_high = rd32(hw, NGBE_ETHADDRH);
367 rar_high &= ~(NGBE_ETHADDRH_AD_MASK | NGBE_ETHADDRH_VLD);
369 wr32(hw, NGBE_ETHADDRL, 0);
370 wr32(hw, NGBE_ETHADDRH, rar_high);
372 /* clear VMDq pool/queue selection for this RAR */
373 hw->mac.clear_vmdq(hw, index, BIT_MASK32);
379 * ngbe_init_rx_addrs - Initializes receive address filters.
380 * @hw: pointer to hardware structure
382 * Places the MAC address in receive address register 0 and clears the rest
383 * of the receive address registers. Clears the multicast table. Assumes
384 * the receiver is in reset when the routine is called.
386 s32 ngbe_init_rx_addrs(struct ngbe_hw *hw)
390 u32 rar_entries = hw->mac.num_rar_entries;
392 DEBUGFUNC("ngbe_init_rx_addrs");
395 * If the current mac address is valid, assume it is a software override
396 * to the permanent address.
397 * Otherwise, use the permanent address from the eeprom.
399 if (ngbe_validate_mac_addr(hw->mac.addr) ==
400 NGBE_ERR_INVALID_MAC_ADDR) {
401 /* Get the MAC address from the RAR0 for later reference */
402 hw->mac.get_mac_addr(hw, hw->mac.addr);
404 DEBUGOUT(" Keeping Current RAR0 Addr =%.2X %.2X %.2X ",
405 hw->mac.addr[0], hw->mac.addr[1],
407 DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
408 hw->mac.addr[4], hw->mac.addr[5]);
410 /* Setup the receive address. */
411 DEBUGOUT("Overriding MAC Address in RAR[0]\n");
412 DEBUGOUT(" New MAC Addr =%.2X %.2X %.2X ",
413 hw->mac.addr[0], hw->mac.addr[1],
415 DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
416 hw->mac.addr[4], hw->mac.addr[5]);
418 hw->mac.set_rar(hw, 0, hw->mac.addr, 0, true);
421 /* clear VMDq pool/queue selection for RAR 0 */
422 hw->mac.clear_vmdq(hw, 0, BIT_MASK32);
424 /* Zero out the other receive addresses. */
425 DEBUGOUT("Clearing RAR[1-%d]\n", rar_entries - 1);
426 for (i = 1; i < rar_entries; i++) {
427 wr32(hw, NGBE_ETHADDRIDX, i);
428 wr32(hw, NGBE_ETHADDRL, 0);
429 wr32(hw, NGBE_ETHADDRH, 0);
433 hw->addr_ctrl.mta_in_use = 0;
434 psrctl = rd32(hw, NGBE_PSRCTL);
435 psrctl &= ~(NGBE_PSRCTL_ADHF12_MASK | NGBE_PSRCTL_MCHFENA);
436 psrctl |= NGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type);
437 wr32(hw, NGBE_PSRCTL, psrctl);
439 DEBUGOUT(" Clearing MTA\n");
440 for (i = 0; i < hw->mac.mcft_size; i++)
441 wr32(hw, NGBE_MCADDRTBL(i), 0);
443 ngbe_init_uta_tables(hw);
449 * ngbe_acquire_swfw_sync - Acquire SWFW semaphore
450 * @hw: pointer to hardware structure
451 * @mask: Mask to specify which semaphore to acquire
453 * Acquires the SWFW semaphore through the MNGSEM register for the specified
454 * function (CSR, PHY0, PHY1, EEPROM, Flash)
456 s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask)
459 u32 swmask = NGBE_MNGSEM_SW(mask);
460 u32 fwmask = NGBE_MNGSEM_FW(mask);
464 DEBUGFUNC("ngbe_acquire_swfw_sync");
466 for (i = 0; i < timeout; i++) {
468 * SW NVM semaphore bit is used for access to all
469 * SW_FW_SYNC bits (not just NVM)
471 if (ngbe_get_eeprom_semaphore(hw))
472 return NGBE_ERR_SWFW_SYNC;
474 mngsem = rd32(hw, NGBE_MNGSEM);
475 if (mngsem & (fwmask | swmask)) {
476 /* Resource is currently in use by FW or SW */
477 ngbe_release_eeprom_semaphore(hw);
481 wr32(hw, NGBE_MNGSEM, mngsem);
482 ngbe_release_eeprom_semaphore(hw);
487 /* If time expired clear the bits holding the lock and retry */
488 if (mngsem & (fwmask | swmask))
489 ngbe_release_swfw_sync(hw, mngsem & (fwmask | swmask));
492 return NGBE_ERR_SWFW_SYNC;
496 * ngbe_release_swfw_sync - Release SWFW semaphore
497 * @hw: pointer to hardware structure
498 * @mask: Mask to specify which semaphore to release
500 * Releases the SWFW semaphore through the MNGSEM register for the specified
501 * function (CSR, PHY0, PHY1, EEPROM, Flash)
503 void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)
508 DEBUGFUNC("ngbe_release_swfw_sync");
510 ngbe_get_eeprom_semaphore(hw);
512 mngsem = rd32(hw, NGBE_MNGSEM);
514 wr32(hw, NGBE_MNGSEM, mngsem);
516 ngbe_release_eeprom_semaphore(hw);
520 * ngbe_clear_vmdq - Disassociate a VMDq pool index from a rx address
521 * @hw: pointer to hardware struct
522 * @rar: receive address register index to disassociate
523 * @vmdq: VMDq pool index to remove from the rar
525 s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)
528 u32 rar_entries = hw->mac.num_rar_entries;
530 DEBUGFUNC("ngbe_clear_vmdq");
532 /* Make sure we are using a valid rar index range */
533 if (rar >= rar_entries) {
534 DEBUGOUT("RAR index %d is out of range.\n", rar);
535 return NGBE_ERR_INVALID_ARGUMENT;
538 wr32(hw, NGBE_ETHADDRIDX, rar);
539 mpsar = rd32(hw, NGBE_ETHADDRASS);
541 if (NGBE_REMOVED(hw->hw_addr))
547 mpsar &= ~(1 << vmdq);
548 wr32(hw, NGBE_ETHADDRASS, mpsar);
550 /* was that the last pool using this rar? */
551 if (mpsar == 0 && rar != 0)
552 hw->mac.clear_rar(hw, rar);
558 * ngbe_set_vmdq - Associate a VMDq pool index with a rx address
559 * @hw: pointer to hardware struct
560 * @rar: receive address register index to associate with a VMDq index
561 * @vmdq: VMDq pool index
563 s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)
566 u32 rar_entries = hw->mac.num_rar_entries;
568 DEBUGFUNC("ngbe_set_vmdq");
570 /* Make sure we are using a valid rar index range */
571 if (rar >= rar_entries) {
572 DEBUGOUT("RAR index %d is out of range.\n", rar);
573 return NGBE_ERR_INVALID_ARGUMENT;
576 wr32(hw, NGBE_ETHADDRIDX, rar);
578 mpsar = rd32(hw, NGBE_ETHADDRASS);
580 wr32(hw, NGBE_ETHADDRASS, mpsar);
586 * ngbe_init_uta_tables - Initialize the Unicast Table Array
587 * @hw: pointer to hardware structure
589 s32 ngbe_init_uta_tables(struct ngbe_hw *hw)
593 DEBUGFUNC("ngbe_init_uta_tables");
594 DEBUGOUT(" Clearing UTA\n");
596 for (i = 0; i < 128; i++)
597 wr32(hw, NGBE_UCADDRTBL(i), 0);
603 * ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
604 * @hw: pointer to hardware structure
606 * Inits the thermal sensor thresholds according to the NVM map
607 * and save off the threshold and location values into mac.thermal_sensor_data
609 s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)
611 struct ngbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
613 DEBUGFUNC("ngbe_init_thermal_sensor_thresh");
615 memset(data, 0, sizeof(struct ngbe_thermal_sensor_data));
617 if (hw->bus.lan_id != 0)
618 return NGBE_NOT_IMPLEMENTED;
620 wr32(hw, NGBE_TSINTR,
621 NGBE_TSINTR_AEN | NGBE_TSINTR_DEN);
622 wr32(hw, NGBE_TSEN, NGBE_TSEN_ENA);
625 data->sensor[0].alarm_thresh = 115;
626 wr32(hw, NGBE_TSATHRE, 0x344);
627 data->sensor[0].dalarm_thresh = 110;
628 wr32(hw, NGBE_TSDTHRE, 0x330);
633 s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw)
638 DEBUGFUNC("ngbe_mac_check_overtemp");
640 /* Check that the LASI temp alarm status was triggered */
641 ts_state = rd32(hw, NGBE_TSALM);
643 if (ts_state & NGBE_TSALM_HI)
644 status = NGBE_ERR_UNDERTEMP;
645 else if (ts_state & NGBE_TSALM_LO)
646 status = NGBE_ERR_OVERTEMP;
651 void ngbe_disable_rx(struct ngbe_hw *hw)
655 pfdtxgswc = rd32(hw, NGBE_PSRCTL);
656 if (pfdtxgswc & NGBE_PSRCTL_LBENA) {
657 pfdtxgswc &= ~NGBE_PSRCTL_LBENA;
658 wr32(hw, NGBE_PSRCTL, pfdtxgswc);
659 hw->mac.set_lben = true;
661 hw->mac.set_lben = false;
664 wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
665 wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
669 * ngbe_set_mac_type - Sets MAC type
670 * @hw: pointer to the HW structure
672 * This function sets the mac type of the adapter based on the
673 * vendor ID and device ID stored in the hw structure.
675 s32 ngbe_set_mac_type(struct ngbe_hw *hw)
679 DEBUGFUNC("ngbe_set_mac_type");
681 if (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {
682 DEBUGOUT("Unsupported vendor id: %x", hw->vendor_id);
683 return NGBE_ERR_DEVICE_NOT_SUPPORTED;
686 switch (hw->sub_device_id) {
687 case NGBE_SUB_DEV_ID_EM_RTL_SGMII:
688 case NGBE_SUB_DEV_ID_EM_MVL_RGMII:
689 hw->phy.media_type = ngbe_media_type_copper;
690 hw->mac.type = ngbe_mac_em;
692 case NGBE_SUB_DEV_ID_EM_MVL_SFP:
693 case NGBE_SUB_DEV_ID_EM_YT8521S_SFP:
694 hw->phy.media_type = ngbe_media_type_fiber;
695 hw->mac.type = ngbe_mac_em;
697 case NGBE_SUB_DEV_ID_EM_VF:
698 hw->phy.media_type = ngbe_media_type_virtual;
699 hw->mac.type = ngbe_mac_em_vf;
702 err = NGBE_ERR_DEVICE_NOT_SUPPORTED;
703 hw->phy.media_type = ngbe_media_type_unknown;
704 hw->mac.type = ngbe_mac_unknown;
705 DEBUGOUT("Unsupported device id: %x", hw->device_id);
709 DEBUGOUT("found mac: %d media: %d, returns: %d\n",
710 hw->mac.type, hw->phy.media_type, err);
714 void ngbe_map_device_id(struct ngbe_hw *hw)
716 u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
717 u16 internal = hw->sub_system_id & NGBE_INTERNAL_MASK;
720 /* move subsystem_device_id to device_id */
721 switch (hw->device_id) {
722 case NGBE_DEV_ID_EM_WX1860AL_W_VF:
723 case NGBE_DEV_ID_EM_WX1860A2_VF:
724 case NGBE_DEV_ID_EM_WX1860A2S_VF:
725 case NGBE_DEV_ID_EM_WX1860A4_VF:
726 case NGBE_DEV_ID_EM_WX1860A4S_VF:
727 case NGBE_DEV_ID_EM_WX1860AL2_VF:
728 case NGBE_DEV_ID_EM_WX1860AL2S_VF:
729 case NGBE_DEV_ID_EM_WX1860AL4_VF:
730 case NGBE_DEV_ID_EM_WX1860AL4S_VF:
731 case NGBE_DEV_ID_EM_WX1860NCSI_VF:
732 case NGBE_DEV_ID_EM_WX1860A1_VF:
733 case NGBE_DEV_ID_EM_WX1860A1L_VF:
734 hw->device_id = NGBE_DEV_ID_EM_VF;
735 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_VF;
738 case NGBE_DEV_ID_EM_WX1860AL_W:
739 case NGBE_DEV_ID_EM_WX1860A2:
740 case NGBE_DEV_ID_EM_WX1860A2S:
741 case NGBE_DEV_ID_EM_WX1860A4:
742 case NGBE_DEV_ID_EM_WX1860A4S:
743 case NGBE_DEV_ID_EM_WX1860AL2:
744 case NGBE_DEV_ID_EM_WX1860AL2S:
745 case NGBE_DEV_ID_EM_WX1860AL4:
746 case NGBE_DEV_ID_EM_WX1860AL4S:
747 case NGBE_DEV_ID_EM_WX1860NCSI:
748 case NGBE_DEV_ID_EM_WX1860A1:
749 case NGBE_DEV_ID_EM_WX1860A1L:
750 hw->device_id = NGBE_DEV_ID_EM;
751 if (oem == NGBE_LY_M88E1512_SFP ||
752 internal == NGBE_INTERNAL_SFP)
753 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_SFP;
754 else if (hw->sub_system_id == NGBE_SUB_DEV_ID_EM_M88E1512_RJ45)
755 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_RGMII;
756 else if (oem == NGBE_YT8521S_SFP ||
757 oem == NGBE_LY_YT8521S_SFP)
758 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_YT8521S_SFP;
760 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_RTL_SGMII;
768 * ngbe_init_ops_pf - Inits func ptrs and MAC type
769 * @hw: pointer to hardware structure
771 * Initialize the function pointers and assign the MAC type.
772 * Does not touch the hardware.
774 s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
776 struct ngbe_bus_info *bus = &hw->bus;
777 struct ngbe_mac_info *mac = &hw->mac;
778 struct ngbe_phy_info *phy = &hw->phy;
779 struct ngbe_rom_info *rom = &hw->rom;
781 DEBUGFUNC("ngbe_init_ops_pf");
784 bus->set_lan_id = ngbe_set_lan_id_multi_port;
787 phy->identify = ngbe_identify_phy;
788 phy->read_reg = ngbe_read_phy_reg;
789 phy->write_reg = ngbe_write_phy_reg;
790 phy->read_reg_unlocked = ngbe_read_phy_reg_mdi;
791 phy->write_reg_unlocked = ngbe_write_phy_reg_mdi;
792 phy->reset_hw = ngbe_reset_phy;
795 mac->init_hw = ngbe_init_hw;
796 mac->reset_hw = ngbe_reset_hw_em;
797 mac->get_mac_addr = ngbe_get_mac_addr;
798 mac->stop_hw = ngbe_stop_hw;
799 mac->acquire_swfw_sync = ngbe_acquire_swfw_sync;
800 mac->release_swfw_sync = ngbe_release_swfw_sync;
803 mac->set_rar = ngbe_set_rar;
804 mac->clear_rar = ngbe_clear_rar;
805 mac->init_rx_addrs = ngbe_init_rx_addrs;
806 mac->set_vmdq = ngbe_set_vmdq;
807 mac->clear_vmdq = ngbe_clear_vmdq;
809 /* Manageability interface */
810 mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;
811 mac->check_overtemp = ngbe_mac_check_overtemp;
814 rom->init_params = ngbe_init_eeprom_params;
815 rom->validate_checksum = ngbe_validate_eeprom_checksum_em;
817 mac->mcft_size = NGBE_EM_MC_TBL_SIZE;
818 mac->num_rar_entries = NGBE_EM_RAR_ENTRIES;
819 mac->max_rx_queues = NGBE_EM_MAX_RX_QUEUES;
820 mac->max_tx_queues = NGBE_EM_MAX_TX_QUEUES;
826 * ngbe_init_shared_code - Initialize the shared code
827 * @hw: pointer to hardware structure
829 * This will assign function pointers and assign the MAC type and PHY code.
830 * Does not touch the hardware. This function must be called prior to any
831 * other function in the shared code. The ngbe_hw structure should be
832 * memset to 0 prior to calling this function. The following fields in
833 * hw structure should be filled in prior to calling this function:
834 * hw_addr, back, device_id, vendor_id, subsystem_device_id
836 s32 ngbe_init_shared_code(struct ngbe_hw *hw)
840 DEBUGFUNC("ngbe_init_shared_code");
845 ngbe_set_mac_type(hw);
847 ngbe_init_ops_dummy(hw);
848 switch (hw->mac.type) {
850 ngbe_init_ops_pf(hw);
853 status = NGBE_ERR_DEVICE_NOT_SUPPORTED;
857 hw->bus.set_lan_id(hw);