1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
8 #include "ngbe_eeprom.h"
13 * ngbe_start_hw - Prepare hardware for Tx/Rx
14 * @hw: pointer to hardware structure
16 * Starts the hardware.
18 s32 ngbe_start_hw(struct ngbe_hw *hw)
20 DEBUGFUNC("ngbe_start_hw");
22 /* Clear the VLAN filter table */
23 hw->mac.clear_vfta(hw);
25 /* Clear adapter stopped flag */
26 hw->adapter_stopped = false;
32 * ngbe_init_hw - Generic hardware initialization
33 * @hw: pointer to hardware structure
35 * Initialize the hardware by resetting the hardware, filling the bus info
36 * structure and media type, clears all on chip counters, initializes receive
37 * address registers, multicast table, VLAN filter table, calls routine to set
38 * up link and flow control settings, and leaves transmit and receive units
39 * disabled and uninitialized
41 s32 ngbe_init_hw(struct ngbe_hw *hw)
45 DEBUGFUNC("ngbe_init_hw");
47 /* Reset the hardware */
48 status = hw->mac.reset_hw(hw);
51 status = hw->mac.start_hw(hw);
55 DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
61 ngbe_reset_misc_em(struct ngbe_hw *hw)
65 wr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0xFFFFFFFF);
66 wr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);
68 /* receive packets that size > 2048 */
69 wr32m(hw, NGBE_MACRXCFG,
70 NGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);
72 wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
73 NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
75 /* clear counters on read */
76 wr32m(hw, NGBE_MACCNTCTL,
77 NGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);
79 wr32m(hw, NGBE_RXFCCFG,
80 NGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);
81 wr32m(hw, NGBE_TXFCCFG,
82 NGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);
84 wr32m(hw, NGBE_MACRXFLT,
85 NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);
87 wr32m(hw, NGBE_RSTSTAT,
88 NGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));
90 /* errata 4: initialize mng flex tbl and wakeup flex tbl*/
91 wr32(hw, NGBE_MNGFLEXSEL, 0);
92 for (i = 0; i < 16; i++) {
93 wr32(hw, NGBE_MNGFLEXDWL(i), 0);
94 wr32(hw, NGBE_MNGFLEXDWH(i), 0);
95 wr32(hw, NGBE_MNGFLEXMSK(i), 0);
97 wr32(hw, NGBE_LANFLEXSEL, 0);
98 for (i = 0; i < 16; i++) {
99 wr32(hw, NGBE_LANFLEXDWL(i), 0);
100 wr32(hw, NGBE_LANFLEXDWH(i), 0);
101 wr32(hw, NGBE_LANFLEXMSK(i), 0);
104 /* set pause frame dst mac addr */
105 wr32(hw, NGBE_RXPBPFCDMACL, 0xC2000001);
106 wr32(hw, NGBE_RXPBPFCDMACH, 0x0180);
108 wr32(hw, NGBE_MDIOMODE, 0xF);
110 wr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);
112 if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
113 (hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
114 /* gpio0 is used to power on/off control*/
115 wr32(hw, NGBE_GPIODIR, NGBE_GPIODIR_DDR(1));
116 wr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);
119 hw->mac.init_thermal_sensor_thresh(hw);
121 /* enable mac transmitter */
122 wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_TE, NGBE_MACTXCFG_TE);
125 wr32m(hw, NGBE_MACTXCFG,
126 NGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G);
128 for (i = 0; i < 4; i++)
129 wr32m(hw, NGBE_IVAR(i), 0x80808080, 0);
133 * ngbe_reset_hw_em - Perform hardware reset
134 * @hw: pointer to hardware structure
136 * Resets the hardware by resetting the transmit and receive units, masks
137 * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
140 s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
144 DEBUGFUNC("ngbe_reset_hw_em");
146 /* Call adapter stop to disable tx/rx and clear interrupts */
147 status = hw->mac.stop_hw(hw);
151 /* Identify PHY and related function pointers */
152 status = ngbe_init_phy(hw);
157 if (!hw->phy.reset_disable)
158 hw->phy.reset_hw(hw);
160 wr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));
164 ngbe_reset_misc_em(hw);
168 /* Store the permanent mac address */
169 hw->mac.get_mac_addr(hw, hw->mac.perm_addr);
172 * Store MAC address from RAR0, clear receive address registers, and
173 * clear the multicast table.
175 hw->mac.num_rar_entries = NGBE_EM_RAR_ENTRIES;
176 hw->mac.init_rx_addrs(hw);
182 * ngbe_get_mac_addr - Generic get MAC address
183 * @hw: pointer to hardware structure
184 * @mac_addr: Adapter MAC address
186 * Reads the adapter's MAC address from first Receive Address Register (RAR0)
187 * A reset of the adapter must be performed prior to calling this function
188 * in order for the MAC address to have been loaded from the EEPROM into RAR0
190 s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr)
196 DEBUGFUNC("ngbe_get_mac_addr");
198 wr32(hw, NGBE_ETHADDRIDX, 0);
199 rar_high = rd32(hw, NGBE_ETHADDRH);
200 rar_low = rd32(hw, NGBE_ETHADDRL);
202 for (i = 0; i < 2; i++)
203 mac_addr[i] = (u8)(rar_high >> (1 - i) * 8);
205 for (i = 0; i < 4; i++)
206 mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8);
212 * ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
213 * @hw: pointer to the HW structure
215 * Determines the LAN function id by reading memory-mapped registers and swaps
216 * the port value if requested, and set MAC instance for devices.
218 void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)
220 struct ngbe_bus_info *bus = &hw->bus;
223 DEBUGFUNC("ngbe_set_lan_id_multi_port");
225 reg = rd32(hw, NGBE_PORTSTAT);
226 bus->lan_id = NGBE_PORTSTAT_ID(reg);
227 bus->func = bus->lan_id;
231 * ngbe_stop_hw - Generic stop Tx/Rx units
232 * @hw: pointer to hardware structure
234 * Sets the adapter_stopped flag within ngbe_hw struct. Clears interrupts,
235 * disables transmit and receive units. The adapter_stopped flag is used by
236 * the shared code and drivers to determine if the adapter is in a stopped
237 * state and should not touch the hardware.
239 s32 ngbe_stop_hw(struct ngbe_hw *hw)
244 DEBUGFUNC("ngbe_stop_hw");
247 * Set the adapter_stopped flag so other driver functions stop touching
250 hw->adapter_stopped = true;
252 /* Disable the receive unit */
255 /* Clear interrupt mask to stop interrupts from being generated */
256 wr32(hw, NGBE_IENMISC, 0);
257 wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
259 /* Clear any pending interrupts, flush previous writes */
260 wr32(hw, NGBE_ICRMISC, NGBE_ICRMISC_MASK);
261 wr32(hw, NGBE_ICR(0), NGBE_ICR_MASK);
263 /* Disable the transmit unit. Each queue must be disabled. */
264 for (i = 0; i < hw->mac.max_tx_queues; i++)
265 wr32(hw, NGBE_TXCFG(i), NGBE_TXCFG_FLUSH);
267 /* Disable the receive unit by stopping each queue */
268 for (i = 0; i < hw->mac.max_rx_queues; i++) {
269 reg_val = rd32(hw, NGBE_RXCFG(i));
270 reg_val &= ~NGBE_RXCFG_ENA;
271 wr32(hw, NGBE_RXCFG(i), reg_val);
274 /* flush all queues disables */
282 * ngbe_validate_mac_addr - Validate MAC address
283 * @mac_addr: pointer to MAC address.
285 * Tests a MAC address to ensure it is a valid Individual Address.
287 s32 ngbe_validate_mac_addr(u8 *mac_addr)
291 DEBUGFUNC("ngbe_validate_mac_addr");
293 /* Make sure it is not a multicast address */
294 if (NGBE_IS_MULTICAST((struct rte_ether_addr *)mac_addr)) {
295 status = NGBE_ERR_INVALID_MAC_ADDR;
296 /* Not a broadcast address */
297 } else if (NGBE_IS_BROADCAST((struct rte_ether_addr *)mac_addr)) {
298 status = NGBE_ERR_INVALID_MAC_ADDR;
299 /* Reject the zero address */
300 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
301 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
302 status = NGBE_ERR_INVALID_MAC_ADDR;
308 * ngbe_set_rar - Set Rx address register
309 * @hw: pointer to hardware structure
310 * @index: Receive address register to write
311 * @addr: Address to put into receive address register
312 * @vmdq: VMDq "set" or "pool" index
313 * @enable_addr: set flag that address is active
315 * Puts an ethernet address into a receive address register.
317 s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
320 u32 rar_low, rar_high;
321 u32 rar_entries = hw->mac.num_rar_entries;
323 DEBUGFUNC("ngbe_set_rar");
325 /* Make sure we are using a valid rar index range */
326 if (index >= rar_entries) {
327 DEBUGOUT("RAR index %d is out of range.\n", index);
328 return NGBE_ERR_INVALID_ARGUMENT;
331 /* setup VMDq pool selection before this RAR gets enabled */
332 hw->mac.set_vmdq(hw, index, vmdq);
335 * HW expects these in little endian so we reverse the byte
336 * order from network order (big endian) to little endian
338 rar_low = NGBE_ETHADDRL_AD0(addr[5]) |
339 NGBE_ETHADDRL_AD1(addr[4]) |
340 NGBE_ETHADDRL_AD2(addr[3]) |
341 NGBE_ETHADDRL_AD3(addr[2]);
343 * Some parts put the VMDq setting in the extra RAH bits,
344 * so save everything except the lower 16 bits that hold part
345 * of the address and the address valid bit.
347 rar_high = rd32(hw, NGBE_ETHADDRH);
348 rar_high &= ~NGBE_ETHADDRH_AD_MASK;
349 rar_high |= (NGBE_ETHADDRH_AD4(addr[1]) |
350 NGBE_ETHADDRH_AD5(addr[0]));
352 rar_high &= ~NGBE_ETHADDRH_VLD;
353 if (enable_addr != 0)
354 rar_high |= NGBE_ETHADDRH_VLD;
356 wr32(hw, NGBE_ETHADDRIDX, index);
357 wr32(hw, NGBE_ETHADDRL, rar_low);
358 wr32(hw, NGBE_ETHADDRH, rar_high);
364 * ngbe_clear_rar - Remove Rx address register
365 * @hw: pointer to hardware structure
366 * @index: Receive address register to write
368 * Clears an ethernet address from a receive address register.
370 s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index)
373 u32 rar_entries = hw->mac.num_rar_entries;
375 DEBUGFUNC("ngbe_clear_rar");
377 /* Make sure we are using a valid rar index range */
378 if (index >= rar_entries) {
379 DEBUGOUT("RAR index %d is out of range.\n", index);
380 return NGBE_ERR_INVALID_ARGUMENT;
384 * Some parts put the VMDq setting in the extra RAH bits,
385 * so save everything except the lower 16 bits that hold part
386 * of the address and the address valid bit.
388 wr32(hw, NGBE_ETHADDRIDX, index);
389 rar_high = rd32(hw, NGBE_ETHADDRH);
390 rar_high &= ~(NGBE_ETHADDRH_AD_MASK | NGBE_ETHADDRH_VLD);
392 wr32(hw, NGBE_ETHADDRL, 0);
393 wr32(hw, NGBE_ETHADDRH, rar_high);
395 /* clear VMDq pool/queue selection for this RAR */
396 hw->mac.clear_vmdq(hw, index, BIT_MASK32);
402 * ngbe_init_rx_addrs - Initializes receive address filters.
403 * @hw: pointer to hardware structure
405 * Places the MAC address in receive address register 0 and clears the rest
406 * of the receive address registers. Clears the multicast table. Assumes
407 * the receiver is in reset when the routine is called.
409 s32 ngbe_init_rx_addrs(struct ngbe_hw *hw)
413 u32 rar_entries = hw->mac.num_rar_entries;
415 DEBUGFUNC("ngbe_init_rx_addrs");
418 * If the current mac address is valid, assume it is a software override
419 * to the permanent address.
420 * Otherwise, use the permanent address from the eeprom.
422 if (ngbe_validate_mac_addr(hw->mac.addr) ==
423 NGBE_ERR_INVALID_MAC_ADDR) {
424 /* Get the MAC address from the RAR0 for later reference */
425 hw->mac.get_mac_addr(hw, hw->mac.addr);
427 DEBUGOUT(" Keeping Current RAR0 Addr =%.2X %.2X %.2X ",
428 hw->mac.addr[0], hw->mac.addr[1],
430 DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
431 hw->mac.addr[4], hw->mac.addr[5]);
433 /* Setup the receive address. */
434 DEBUGOUT("Overriding MAC Address in RAR[0]\n");
435 DEBUGOUT(" New MAC Addr =%.2X %.2X %.2X ",
436 hw->mac.addr[0], hw->mac.addr[1],
438 DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
439 hw->mac.addr[4], hw->mac.addr[5]);
441 hw->mac.set_rar(hw, 0, hw->mac.addr, 0, true);
444 /* clear VMDq pool/queue selection for RAR 0 */
445 hw->mac.clear_vmdq(hw, 0, BIT_MASK32);
447 /* Zero out the other receive addresses. */
448 DEBUGOUT("Clearing RAR[1-%d]\n", rar_entries - 1);
449 for (i = 1; i < rar_entries; i++) {
450 wr32(hw, NGBE_ETHADDRIDX, i);
451 wr32(hw, NGBE_ETHADDRL, 0);
452 wr32(hw, NGBE_ETHADDRH, 0);
456 hw->addr_ctrl.mta_in_use = 0;
457 psrctl = rd32(hw, NGBE_PSRCTL);
458 psrctl &= ~(NGBE_PSRCTL_ADHF12_MASK | NGBE_PSRCTL_MCHFENA);
459 psrctl |= NGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type);
460 wr32(hw, NGBE_PSRCTL, psrctl);
462 DEBUGOUT(" Clearing MTA\n");
463 for (i = 0; i < hw->mac.mcft_size; i++)
464 wr32(hw, NGBE_MCADDRTBL(i), 0);
466 ngbe_init_uta_tables(hw);
472 * ngbe_acquire_swfw_sync - Acquire SWFW semaphore
473 * @hw: pointer to hardware structure
474 * @mask: Mask to specify which semaphore to acquire
476 * Acquires the SWFW semaphore through the MNGSEM register for the specified
477 * function (CSR, PHY0, PHY1, EEPROM, Flash)
479 s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask)
482 u32 swmask = NGBE_MNGSEM_SW(mask);
483 u32 fwmask = NGBE_MNGSEM_FW(mask);
487 DEBUGFUNC("ngbe_acquire_swfw_sync");
489 for (i = 0; i < timeout; i++) {
491 * SW NVM semaphore bit is used for access to all
492 * SW_FW_SYNC bits (not just NVM)
494 if (ngbe_get_eeprom_semaphore(hw))
495 return NGBE_ERR_SWFW_SYNC;
497 mngsem = rd32(hw, NGBE_MNGSEM);
498 if (mngsem & (fwmask | swmask)) {
499 /* Resource is currently in use by FW or SW */
500 ngbe_release_eeprom_semaphore(hw);
504 wr32(hw, NGBE_MNGSEM, mngsem);
505 ngbe_release_eeprom_semaphore(hw);
510 /* If time expired clear the bits holding the lock and retry */
511 if (mngsem & (fwmask | swmask))
512 ngbe_release_swfw_sync(hw, mngsem & (fwmask | swmask));
515 return NGBE_ERR_SWFW_SYNC;
519 * ngbe_release_swfw_sync - Release SWFW semaphore
520 * @hw: pointer to hardware structure
521 * @mask: Mask to specify which semaphore to release
523 * Releases the SWFW semaphore through the MNGSEM register for the specified
524 * function (CSR, PHY0, PHY1, EEPROM, Flash)
526 void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)
531 DEBUGFUNC("ngbe_release_swfw_sync");
533 ngbe_get_eeprom_semaphore(hw);
535 mngsem = rd32(hw, NGBE_MNGSEM);
537 wr32(hw, NGBE_MNGSEM, mngsem);
539 ngbe_release_eeprom_semaphore(hw);
543 * ngbe_disable_sec_rx_path - Stops the receive data path
544 * @hw: pointer to hardware structure
546 * Stops the receive data path and waits for the HW to internally empty
547 * the Rx security block
549 s32 ngbe_disable_sec_rx_path(struct ngbe_hw *hw)
551 #define NGBE_MAX_SECRX_POLL 4000
556 DEBUGFUNC("ngbe_disable_sec_rx_path");
559 secrxreg = rd32(hw, NGBE_SECRXCTL);
560 secrxreg |= NGBE_SECRXCTL_XDSA;
561 wr32(hw, NGBE_SECRXCTL, secrxreg);
562 for (i = 0; i < NGBE_MAX_SECRX_POLL; i++) {
563 secrxreg = rd32(hw, NGBE_SECRXSTAT);
564 if (!(secrxreg & NGBE_SECRXSTAT_RDY))
565 /* Use interrupt-safe sleep just in case */
571 /* For informational purposes only */
572 if (i >= NGBE_MAX_SECRX_POLL)
573 DEBUGOUT("Rx unit being enabled before security "
574 "path fully disabled. Continuing with init.\n");
580 * ngbe_enable_sec_rx_path - Enables the receive data path
581 * @hw: pointer to hardware structure
583 * Enables the receive data path.
585 s32 ngbe_enable_sec_rx_path(struct ngbe_hw *hw)
589 DEBUGFUNC("ngbe_enable_sec_rx_path");
591 secrxreg = rd32(hw, NGBE_SECRXCTL);
592 secrxreg &= ~NGBE_SECRXCTL_XDSA;
593 wr32(hw, NGBE_SECRXCTL, secrxreg);
600 * ngbe_clear_vmdq - Disassociate a VMDq pool index from a rx address
601 * @hw: pointer to hardware struct
602 * @rar: receive address register index to disassociate
603 * @vmdq: VMDq pool index to remove from the rar
605 s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)
608 u32 rar_entries = hw->mac.num_rar_entries;
610 DEBUGFUNC("ngbe_clear_vmdq");
612 /* Make sure we are using a valid rar index range */
613 if (rar >= rar_entries) {
614 DEBUGOUT("RAR index %d is out of range.\n", rar);
615 return NGBE_ERR_INVALID_ARGUMENT;
618 wr32(hw, NGBE_ETHADDRIDX, rar);
619 mpsar = rd32(hw, NGBE_ETHADDRASS);
621 if (NGBE_REMOVED(hw->hw_addr))
627 mpsar &= ~(1 << vmdq);
628 wr32(hw, NGBE_ETHADDRASS, mpsar);
630 /* was that the last pool using this rar? */
631 if (mpsar == 0 && rar != 0)
632 hw->mac.clear_rar(hw, rar);
638 * ngbe_set_vmdq - Associate a VMDq pool index with a rx address
639 * @hw: pointer to hardware struct
640 * @rar: receive address register index to associate with a VMDq index
641 * @vmdq: VMDq pool index
643 s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)
646 u32 rar_entries = hw->mac.num_rar_entries;
648 DEBUGFUNC("ngbe_set_vmdq");
650 /* Make sure we are using a valid rar index range */
651 if (rar >= rar_entries) {
652 DEBUGOUT("RAR index %d is out of range.\n", rar);
653 return NGBE_ERR_INVALID_ARGUMENT;
656 wr32(hw, NGBE_ETHADDRIDX, rar);
658 mpsar = rd32(hw, NGBE_ETHADDRASS);
660 wr32(hw, NGBE_ETHADDRASS, mpsar);
666 * ngbe_init_uta_tables - Initialize the Unicast Table Array
667 * @hw: pointer to hardware structure
669 s32 ngbe_init_uta_tables(struct ngbe_hw *hw)
673 DEBUGFUNC("ngbe_init_uta_tables");
674 DEBUGOUT(" Clearing UTA\n");
676 for (i = 0; i < 128; i++)
677 wr32(hw, NGBE_UCADDRTBL(i), 0);
683 * ngbe_clear_vfta - Clear VLAN filter table
684 * @hw: pointer to hardware structure
686 * Clears the VLAN filer table, and the VMDq index associated with the filter
688 s32 ngbe_clear_vfta(struct ngbe_hw *hw)
692 DEBUGFUNC("ngbe_clear_vfta");
694 for (offset = 0; offset < hw->mac.vft_size; offset++)
695 wr32(hw, NGBE_VLANTBL(offset), 0);
697 for (offset = 0; offset < NGBE_NUM_POOL; offset++) {
698 wr32(hw, NGBE_PSRVLANIDX, offset);
699 wr32(hw, NGBE_PSRVLAN, 0);
700 wr32(hw, NGBE_PSRVLANPLM(0), 0);
707 * ngbe_check_mac_link_em - Determine link and speed status
708 * @hw: pointer to hardware structure
709 * @speed: pointer to link speed
710 * @link_up: true when link is up
711 * @link_up_wait_to_complete: bool used to wait for link up or not
713 * Reads the links register to determine if link is up and the current speed
715 s32 ngbe_check_mac_link_em(struct ngbe_hw *hw, u32 *speed,
716 bool *link_up, bool link_up_wait_to_complete)
721 DEBUGFUNC("ngbe_check_mac_link_em");
723 reg = rd32(hw, NGBE_GPIOINTSTAT);
724 wr32(hw, NGBE_GPIOEOI, reg);
726 if (link_up_wait_to_complete) {
727 for (i = 0; i < hw->mac.max_link_up_time; i++) {
728 status = hw->phy.check_link(hw, speed, link_up);
734 status = hw->phy.check_link(hw, speed, link_up);
740 s32 ngbe_get_link_capabilities_em(struct ngbe_hw *hw,
748 hw->mac.autoneg = *autoneg;
750 switch (hw->sub_device_id) {
751 case NGBE_SUB_DEV_ID_EM_RTL_SGMII:
752 *speed = NGBE_LINK_SPEED_1GB_FULL |
753 NGBE_LINK_SPEED_100M_FULL |
754 NGBE_LINK_SPEED_10M_FULL;
763 s32 ngbe_setup_mac_link_em(struct ngbe_hw *hw,
765 bool autoneg_wait_to_complete)
771 /* Setup the PHY according to input speed */
772 status = hw->phy.setup_link(hw, speed, autoneg_wait_to_complete);
778 * ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
779 * @hw: pointer to hardware structure
781 * Inits the thermal sensor thresholds according to the NVM map
782 * and save off the threshold and location values into mac.thermal_sensor_data
784 s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)
786 struct ngbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
788 DEBUGFUNC("ngbe_init_thermal_sensor_thresh");
790 memset(data, 0, sizeof(struct ngbe_thermal_sensor_data));
792 if (hw->bus.lan_id != 0)
793 return NGBE_NOT_IMPLEMENTED;
795 wr32(hw, NGBE_TSINTR,
796 NGBE_TSINTR_AEN | NGBE_TSINTR_DEN);
797 wr32(hw, NGBE_TSEN, NGBE_TSEN_ENA);
800 data->sensor[0].alarm_thresh = 115;
801 wr32(hw, NGBE_TSATHRE, 0x344);
802 data->sensor[0].dalarm_thresh = 110;
803 wr32(hw, NGBE_TSDTHRE, 0x330);
808 s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw)
813 DEBUGFUNC("ngbe_mac_check_overtemp");
815 /* Check that the LASI temp alarm status was triggered */
816 ts_state = rd32(hw, NGBE_TSALM);
818 if (ts_state & NGBE_TSALM_HI)
819 status = NGBE_ERR_UNDERTEMP;
820 else if (ts_state & NGBE_TSALM_LO)
821 status = NGBE_ERR_OVERTEMP;
826 void ngbe_disable_rx(struct ngbe_hw *hw)
830 pfdtxgswc = rd32(hw, NGBE_PSRCTL);
831 if (pfdtxgswc & NGBE_PSRCTL_LBENA) {
832 pfdtxgswc &= ~NGBE_PSRCTL_LBENA;
833 wr32(hw, NGBE_PSRCTL, pfdtxgswc);
834 hw->mac.set_lben = true;
836 hw->mac.set_lben = false;
839 wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
840 wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
843 void ngbe_enable_rx(struct ngbe_hw *hw)
847 wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, NGBE_MACRXCFG_ENA);
848 wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, NGBE_PBRXCTL_ENA);
850 if (hw->mac.set_lben) {
851 pfdtxgswc = rd32(hw, NGBE_PSRCTL);
852 pfdtxgswc |= NGBE_PSRCTL_LBENA;
853 wr32(hw, NGBE_PSRCTL, pfdtxgswc);
854 hw->mac.set_lben = false;
859 * ngbe_set_mac_type - Sets MAC type
860 * @hw: pointer to the HW structure
862 * This function sets the mac type of the adapter based on the
863 * vendor ID and device ID stored in the hw structure.
865 s32 ngbe_set_mac_type(struct ngbe_hw *hw)
869 DEBUGFUNC("ngbe_set_mac_type");
871 if (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {
872 DEBUGOUT("Unsupported vendor id: %x", hw->vendor_id);
873 return NGBE_ERR_DEVICE_NOT_SUPPORTED;
876 switch (hw->sub_device_id) {
877 case NGBE_SUB_DEV_ID_EM_RTL_SGMII:
878 case NGBE_SUB_DEV_ID_EM_MVL_RGMII:
879 hw->phy.media_type = ngbe_media_type_copper;
880 hw->mac.type = ngbe_mac_em;
882 case NGBE_SUB_DEV_ID_EM_MVL_SFP:
883 case NGBE_SUB_DEV_ID_EM_YT8521S_SFP:
884 hw->phy.media_type = ngbe_media_type_fiber;
885 hw->mac.type = ngbe_mac_em;
887 case NGBE_SUB_DEV_ID_EM_VF:
888 hw->phy.media_type = ngbe_media_type_virtual;
889 hw->mac.type = ngbe_mac_em_vf;
892 err = NGBE_ERR_DEVICE_NOT_SUPPORTED;
893 hw->phy.media_type = ngbe_media_type_unknown;
894 hw->mac.type = ngbe_mac_unknown;
895 DEBUGOUT("Unsupported device id: %x", hw->device_id);
899 DEBUGOUT("found mac: %d media: %d, returns: %d\n",
900 hw->mac.type, hw->phy.media_type, err);
905 * ngbe_enable_rx_dma - Enable the Rx DMA unit
906 * @hw: pointer to hardware structure
907 * @regval: register value to write to RXCTRL
909 * Enables the Rx DMA unit
911 s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval)
913 DEBUGFUNC("ngbe_enable_rx_dma");
916 * Workaround silicon errata when enabling the Rx datapath.
917 * If traffic is incoming before we enable the Rx unit, it could hang
918 * the Rx DMA unit. Therefore, make sure the security engine is
919 * completely disabled prior to enabling the Rx unit.
922 hw->mac.disable_sec_rx_path(hw);
924 if (regval & NGBE_PBRXCTL_ENA)
929 hw->mac.enable_sec_rx_path(hw);
934 void ngbe_map_device_id(struct ngbe_hw *hw)
936 u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
937 u16 internal = hw->sub_system_id & NGBE_INTERNAL_MASK;
940 /* move subsystem_device_id to device_id */
941 switch (hw->device_id) {
942 case NGBE_DEV_ID_EM_WX1860AL_W_VF:
943 case NGBE_DEV_ID_EM_WX1860A2_VF:
944 case NGBE_DEV_ID_EM_WX1860A2S_VF:
945 case NGBE_DEV_ID_EM_WX1860A4_VF:
946 case NGBE_DEV_ID_EM_WX1860A4S_VF:
947 case NGBE_DEV_ID_EM_WX1860AL2_VF:
948 case NGBE_DEV_ID_EM_WX1860AL2S_VF:
949 case NGBE_DEV_ID_EM_WX1860AL4_VF:
950 case NGBE_DEV_ID_EM_WX1860AL4S_VF:
951 case NGBE_DEV_ID_EM_WX1860NCSI_VF:
952 case NGBE_DEV_ID_EM_WX1860A1_VF:
953 case NGBE_DEV_ID_EM_WX1860A1L_VF:
954 hw->device_id = NGBE_DEV_ID_EM_VF;
955 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_VF;
958 case NGBE_DEV_ID_EM_WX1860AL_W:
959 case NGBE_DEV_ID_EM_WX1860A2:
960 case NGBE_DEV_ID_EM_WX1860A2S:
961 case NGBE_DEV_ID_EM_WX1860A4:
962 case NGBE_DEV_ID_EM_WX1860A4S:
963 case NGBE_DEV_ID_EM_WX1860AL2:
964 case NGBE_DEV_ID_EM_WX1860AL2S:
965 case NGBE_DEV_ID_EM_WX1860AL4:
966 case NGBE_DEV_ID_EM_WX1860AL4S:
967 case NGBE_DEV_ID_EM_WX1860NCSI:
968 case NGBE_DEV_ID_EM_WX1860A1:
969 case NGBE_DEV_ID_EM_WX1860A1L:
970 hw->device_id = NGBE_DEV_ID_EM;
971 if (oem == NGBE_LY_M88E1512_SFP ||
972 internal == NGBE_INTERNAL_SFP)
973 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_SFP;
974 else if (hw->sub_system_id == NGBE_SUB_DEV_ID_EM_M88E1512_RJ45)
975 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_RGMII;
976 else if (oem == NGBE_YT8521S_SFP ||
977 oem == NGBE_LY_YT8521S_SFP)
978 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_YT8521S_SFP;
980 hw->sub_device_id = NGBE_SUB_DEV_ID_EM_RTL_SGMII;
988 * ngbe_init_ops_pf - Inits func ptrs and MAC type
989 * @hw: pointer to hardware structure
991 * Initialize the function pointers and assign the MAC type.
992 * Does not touch the hardware.
994 s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
996 struct ngbe_bus_info *bus = &hw->bus;
997 struct ngbe_mac_info *mac = &hw->mac;
998 struct ngbe_phy_info *phy = &hw->phy;
999 struct ngbe_rom_info *rom = &hw->rom;
1001 DEBUGFUNC("ngbe_init_ops_pf");
1004 bus->set_lan_id = ngbe_set_lan_id_multi_port;
1007 phy->identify = ngbe_identify_phy;
1008 phy->read_reg = ngbe_read_phy_reg;
1009 phy->write_reg = ngbe_write_phy_reg;
1010 phy->read_reg_unlocked = ngbe_read_phy_reg_mdi;
1011 phy->write_reg_unlocked = ngbe_write_phy_reg_mdi;
1012 phy->reset_hw = ngbe_reset_phy;
1015 mac->init_hw = ngbe_init_hw;
1016 mac->reset_hw = ngbe_reset_hw_em;
1017 mac->start_hw = ngbe_start_hw;
1018 mac->enable_rx_dma = ngbe_enable_rx_dma;
1019 mac->get_mac_addr = ngbe_get_mac_addr;
1020 mac->stop_hw = ngbe_stop_hw;
1021 mac->acquire_swfw_sync = ngbe_acquire_swfw_sync;
1022 mac->release_swfw_sync = ngbe_release_swfw_sync;
1024 mac->disable_sec_rx_path = ngbe_disable_sec_rx_path;
1025 mac->enable_sec_rx_path = ngbe_enable_sec_rx_path;
1027 mac->set_rar = ngbe_set_rar;
1028 mac->clear_rar = ngbe_clear_rar;
1029 mac->init_rx_addrs = ngbe_init_rx_addrs;
1030 mac->set_vmdq = ngbe_set_vmdq;
1031 mac->clear_vmdq = ngbe_clear_vmdq;
1032 mac->clear_vfta = ngbe_clear_vfta;
1035 mac->get_link_capabilities = ngbe_get_link_capabilities_em;
1036 mac->check_link = ngbe_check_mac_link_em;
1037 mac->setup_link = ngbe_setup_mac_link_em;
1039 /* Manageability interface */
1040 mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;
1041 mac->check_overtemp = ngbe_mac_check_overtemp;
1044 rom->init_params = ngbe_init_eeprom_params;
1045 rom->validate_checksum = ngbe_validate_eeprom_checksum_em;
1047 mac->mcft_size = NGBE_EM_MC_TBL_SIZE;
1048 mac->vft_size = NGBE_EM_VFT_TBL_SIZE;
1049 mac->num_rar_entries = NGBE_EM_RAR_ENTRIES;
1050 mac->max_rx_queues = NGBE_EM_MAX_RX_QUEUES;
1051 mac->max_tx_queues = NGBE_EM_MAX_TX_QUEUES;
1053 mac->default_speeds = NGBE_LINK_SPEED_10M_FULL |
1054 NGBE_LINK_SPEED_100M_FULL |
1055 NGBE_LINK_SPEED_1GB_FULL;
1061 * ngbe_init_shared_code - Initialize the shared code
1062 * @hw: pointer to hardware structure
1064 * This will assign function pointers and assign the MAC type and PHY code.
1065 * Does not touch the hardware. This function must be called prior to any
1066 * other function in the shared code. The ngbe_hw structure should be
1067 * memset to 0 prior to calling this function. The following fields in
1068 * hw structure should be filled in prior to calling this function:
1069 * hw_addr, back, device_id, vendor_id, subsystem_device_id
1071 s32 ngbe_init_shared_code(struct ngbe_hw *hw)
1075 DEBUGFUNC("ngbe_init_shared_code");
1080 ngbe_set_mac_type(hw);
1082 ngbe_init_ops_dummy(hw);
1083 switch (hw->mac.type) {
1085 ngbe_init_ops_pf(hw);
1088 status = NGBE_ERR_DEVICE_NOT_SUPPORTED;
1091 hw->mac.max_link_up_time = NGBE_LINK_UP_TIME;
1093 hw->bus.set_lan_id(hw);