1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
7 #ifndef _NGBE_PHY_YT_H_
8 #define _NGBE_PHY_YT_H_
10 #define NGBE_PHYID_YT 0x00000110U
13 #define YT_SMI_PHY 0xA000
14 #define YT_SMI_PHY_SW_RST MS16(15, 0x1)
15 #define YT_SMI_PHY_SDS MS16(1, 0x1) /* 0 for UTP */
16 #define YT_CHIP 0xA001
17 #define YT_CHIP_SW_RST MS16(15, 0x1)
18 #define YT_CHIP_SW_LDO_EN MS16(6, 0x1)
19 #define YT_CHIP_MODE_MASK MS16(0, 0x7)
20 #define YT_CHIP_MODE_SEL(v) LS16(v, 0, 0x7)
21 #define YT_RGMII_CONF1 0xA003
22 #define YT_RGMII_CONF1_MODE MS16(15, 0x1)
23 #define YT_RGMII_CONF1_RXDELAY MS16(10, 0xF)
24 #define YT_RGMII_CONF1_TXDELAY_FE MS16(4, 0xF)
25 #define YT_RGMII_CONF1_TXDELAY MS16(0, 0x1)
26 #define YT_RGMII_CONF2 0xA004
27 #define YT_RGMII_CONF2_SPEED_MASK MS16(6, 0x3)
28 #define YT_RGMII_CONF2_SPEED(v) LS16(v, 6, 0x3)
29 #define YT_RGMII_CONF2_DUPLEX MS16(5, 0x1)
30 #define YT_RGMII_CONF2_LINKUP MS16(4, 0x1)
31 #define YT_MISC 0xA006
32 #define YT_MISC_FIBER_PRIO MS16(8, 0x1) /* 0 for UTP */
34 /* MII common registers in UTP and SDS */
36 #define YT_BCR_RESET MS16(15, 0x1)
37 #define YT_BCR_SPEED_SELECT0 MS16(13, 0x1)
38 #define YT_BCR_ANE MS16(12, 0x1)
39 #define YT_BCR_PWDN MS16(11, 0x1)
40 #define YT_BCR_RESTART_AN MS16(9, 0x1)
41 #define YT_BCR_DUPLEX MS16(8, 0x1)
42 #define YT_BCR_SPEED_SELECT1 MS16(6, 0x1)
45 #define YT_ANA_100BASET_FULL MS16(8, 0x1)
46 #define YT_ANA_100BASET_HALF MS16(7, 0x1)
47 #define YT_ANA_10BASET_FULL MS16(6, 0x1)
48 #define YT_ANA_10BASET_HALF MS16(5, 0x1)
50 #define YT_FANA_PAUSE_MASK MS16(7, 0x3)
53 #define YT_CLPAR_ASM_PAUSE MS(11, 0x1)
54 #define YT_CLPAR_PAUSE MS(10, 0x1)
55 #define YT_FLPAR_PAUSE_MASK MS(7, 0x3)
57 #define YT_MS_CTRL 0x9
58 #define YT_MS_1000BASET_FULL MS16(9, 0x1)
59 #define YT_MS_1000BASET_HALF MS16(8, 0x1)
61 #define YT_SPST_SPEED_MASK MS16(14, 0x3)
62 #define YT_SPST_SPEED_1000M LS16(2, 14, 0x3)
63 #define YT_SPST_SPEED_100M LS16(1, 14, 0x3)
64 #define YT_SPST_SPEED_10M LS16(0, 14, 0x3)
65 #define YT_SPST_LINK MS16(10, 0x1)
69 #define YT_INTR_ENA_MASK MS16(10, 0x3)
70 #define YT_SDS_INTR_ENA_MASK MS16(2, 0x3)
71 #define YT_INTR_STATUS 0x13
73 s32 ngbe_read_phy_reg_yt(struct ngbe_hw *hw, u32 reg_addr, u32 device_type,
75 s32 ngbe_write_phy_reg_yt(struct ngbe_hw *hw, u32 reg_addr, u32 device_type,
77 s32 ngbe_read_phy_reg_ext_yt(struct ngbe_hw *hw,
78 u32 reg_addr, u32 device_type, u16 *phy_data);
79 s32 ngbe_write_phy_reg_ext_yt(struct ngbe_hw *hw,
80 u32 reg_addr, u32 device_type, u16 phy_data);
81 s32 ngbe_read_phy_reg_sds_ext_yt(struct ngbe_hw *hw,
82 u32 reg_addr, u32 device_type, u16 *phy_data);
83 s32 ngbe_write_phy_reg_sds_ext_yt(struct ngbe_hw *hw,
84 u32 reg_addr, u32 device_type, u16 phy_data);
85 s32 ngbe_init_phy_yt(struct ngbe_hw *hw);
87 s32 ngbe_reset_phy_yt(struct ngbe_hw *hw);
89 s32 ngbe_check_phy_link_yt(struct ngbe_hw *hw,
90 u32 *speed, bool *link_up);
91 s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw,
92 u32 speed, bool autoneg_wait_to_complete);
93 s32 ngbe_get_phy_advertised_pause_yt(struct ngbe_hw *hw,
95 s32 ngbe_get_phy_lp_advertised_pause_yt(struct ngbe_hw *hw,
97 s32 ngbe_set_phy_pause_adv_yt(struct ngbe_hw *hw, u16 pause_bit);
99 #endif /* _NGBE_PHY_YT_H_ */