1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
9 #define NGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
11 #define NGBE_FRAME_SIZE_DFT (1522) /* Default frame size, +FCS */
12 #define NGBE_NUM_POOL (32)
13 #define NGBE_MAX_QP (8)
15 #define NGBE_ALIGN 128 /* as intel did */
16 #define NGBE_ISB_SIZE 16
18 #include "ngbe_status.h"
19 #include "ngbe_osdep.h"
20 #include "ngbe_devids.h"
22 struct ngbe_thermal_diode_data {
28 struct ngbe_thermal_sensor_data {
29 struct ngbe_thermal_diode_data sensor[1];
32 enum ngbe_eeprom_type {
33 ngbe_eeprom_unknown = 0,
36 ngbe_eeprom_none /* No NVM support */
58 enum ngbe_media_type {
59 ngbe_media_type_unknown = 0,
60 ngbe_media_type_fiber,
61 ngbe_media_type_fiber_qsfp,
62 ngbe_media_type_copper,
63 ngbe_media_type_backplane,
65 ngbe_media_type_virtual
70 struct ngbe_addr_filter_info {
75 struct ngbe_bus_info {
76 void (*set_lan_id)(struct ngbe_hw *hw);
82 /* Statistics counters collected by the MAC */
84 struct ngbe_pb_stats {
85 u64 tx_pb_xon_packets;
86 u64 rx_pb_xon_packets;
87 u64 tx_pb_xoff_packets;
88 u64 rx_pb_xoff_packets;
90 u64 rx_pb_mbuf_alloc_errors;
91 u64 tx_pb_xon2off_packets;
95 struct ngbe_qp_stats {
100 u64 rx_qp_mc_packets;
103 struct ngbe_hw_stats {
105 u64 mng_bmc2host_packets;
106 u64 mng_host2bmc_packets;
111 u64 tx_secdrp_packets;
117 u64 rx_total_packets;
118 u64 tx_total_packets;
119 u64 rx_total_missed_packets;
120 u64 rx_broadcast_packets;
121 u64 tx_broadcast_packets;
122 u64 rx_multicast_packets;
123 u64 tx_multicast_packets;
124 u64 rx_management_packets;
125 u64 tx_management_packets;
126 u64 rx_management_dropped;
130 u64 rx_illegal_byte_errors;
132 u64 rx_mac_short_packet_dropped;
133 u64 rx_length_errors;
134 u64 rx_undersize_errors;
135 u64 rx_fragment_errors;
136 u64 rx_oversize_errors;
137 u64 rx_jabber_errors;
138 u64 rx_l3_l4_xsum_error;
139 u64 mac_local_errors;
140 u64 mac_remote_errors;
143 u64 tx_macsec_pkts_untagged;
144 u64 tx_macsec_pkts_encrypted;
145 u64 tx_macsec_pkts_protected;
146 u64 tx_macsec_octets_encrypted;
147 u64 tx_macsec_octets_protected;
148 u64 rx_macsec_pkts_untagged;
149 u64 rx_macsec_pkts_badtag;
150 u64 rx_macsec_pkts_nosci;
151 u64 rx_macsec_pkts_unknownsci;
152 u64 rx_macsec_octets_decrypted;
153 u64 rx_macsec_octets_validated;
154 u64 rx_macsec_sc_pkts_unchecked;
155 u64 rx_macsec_sc_pkts_delayed;
156 u64 rx_macsec_sc_pkts_late;
157 u64 rx_macsec_sa_pkts_ok;
158 u64 rx_macsec_sa_pkts_invalid;
159 u64 rx_macsec_sa_pkts_notvalid;
160 u64 rx_macsec_sa_pkts_unusedsa;
161 u64 rx_macsec_sa_pkts_notusingsa;
164 u64 rx_size_64_packets;
165 u64 rx_size_65_to_127_packets;
166 u64 rx_size_128_to_255_packets;
167 u64 rx_size_256_to_511_packets;
168 u64 rx_size_512_to_1023_packets;
169 u64 rx_size_1024_to_max_packets;
170 u64 tx_size_64_packets;
171 u64 tx_size_65_to_127_packets;
172 u64 tx_size_128_to_255_packets;
173 u64 tx_size_256_to_511_packets;
174 u64 tx_size_512_to_1023_packets;
175 u64 tx_size_1024_to_max_packets;
195 u64 rx_qp_mc_packets;
196 u64 tx_qp_mc_packets;
197 u64 rx_qp_bc_packets;
198 u64 tx_qp_bc_packets;
203 struct ngbe_rom_info {
204 s32 (*init_params)(struct ngbe_hw *hw);
205 s32 (*validate_checksum)(struct ngbe_hw *hw, u16 *checksum_val);
207 enum ngbe_eeprom_type type;
217 struct ngbe_mac_info {
218 s32 (*init_hw)(struct ngbe_hw *hw);
219 s32 (*reset_hw)(struct ngbe_hw *hw);
220 s32 (*start_hw)(struct ngbe_hw *hw);
221 s32 (*stop_hw)(struct ngbe_hw *hw);
222 s32 (*clear_hw_cntrs)(struct ngbe_hw *hw);
223 s32 (*get_mac_addr)(struct ngbe_hw *hw, u8 *mac_addr);
224 s32 (*enable_rx_dma)(struct ngbe_hw *hw, u32 regval);
225 s32 (*disable_sec_rx_path)(struct ngbe_hw *hw);
226 s32 (*enable_sec_rx_path)(struct ngbe_hw *hw);
227 s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
228 void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
231 s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
232 bool autoneg_wait_to_complete);
233 s32 (*check_link)(struct ngbe_hw *hw, u32 *speed,
234 bool *link_up, bool link_up_wait_to_complete);
235 s32 (*get_link_capabilities)(struct ngbe_hw *hw,
236 u32 *speed, bool *autoneg);
239 s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
241 s32 (*clear_rar)(struct ngbe_hw *hw, u32 index);
242 s32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
243 s32 (*clear_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
244 s32 (*init_rx_addrs)(struct ngbe_hw *hw);
245 s32 (*clear_vfta)(struct ngbe_hw *hw);
247 /* Manageability interface */
248 s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
249 s32 (*check_overtemp)(struct ngbe_hw *hw);
251 enum ngbe_mac_type type;
252 u8 addr[ETH_ADDR_LEN];
253 u8 perm_addr[ETH_ADDR_LEN];
260 bool get_link_status;
261 struct ngbe_thermal_sensor_data thermal_sensor_data;
263 u32 max_link_up_time;
269 struct ngbe_phy_info {
270 s32 (*identify)(struct ngbe_hw *hw);
271 s32 (*init_hw)(struct ngbe_hw *hw);
272 s32 (*reset_hw)(struct ngbe_hw *hw);
273 s32 (*read_reg)(struct ngbe_hw *hw, u32 reg_addr,
274 u32 device_type, u16 *phy_data);
275 s32 (*write_reg)(struct ngbe_hw *hw, u32 reg_addr,
276 u32 device_type, u16 phy_data);
277 s32 (*read_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
278 u32 device_type, u16 *phy_data);
279 s32 (*write_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
280 u32 device_type, u16 phy_data);
281 s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
282 bool autoneg_wait_to_complete);
283 s32 (*check_link)(struct ngbe_hw *hw, u32 *speed, bool *link_up);
285 enum ngbe_media_type media_type;
286 enum ngbe_phy_type type;
290 u32 phy_semaphore_mask;
292 u32 autoneg_advertised;
306 struct ngbe_mac_info mac;
307 struct ngbe_addr_filter_info addr_ctrl;
308 struct ngbe_phy_info phy;
309 struct ngbe_rom_info rom;
310 struct ngbe_bus_info bus;
315 bool adapter_stopped;
322 u32 q_rx_regs[8 * 4];
323 u32 q_tx_regs[8 * 4];
331 u64 rx_qp_mc_packets;
332 u64 tx_qp_mc_packets;
333 u64 rx_qp_bc_packets;
334 u64 tx_qp_bc_packets;
335 } qp_last[NGBE_MAX_QP];
338 #include "ngbe_regs.h"
339 #include "ngbe_dummy.h"
341 #endif /* _NGBE_TYPE_H_ */