1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
6 #ifndef _NGBE_ETHDEV_H_
7 #define _NGBE_ETHDEV_H_
9 /* need update link, bit flag */
10 #define NGBE_FLAG_NEED_LINK_UPDATE ((uint32_t)(1 << 0))
11 #define NGBE_FLAG_MAILBOX ((uint32_t)(1 << 1))
12 #define NGBE_FLAG_PHY_INTERRUPT ((uint32_t)(1 << 2))
13 #define NGBE_FLAG_MACSEC ((uint32_t)(1 << 3))
14 #define NGBE_FLAG_NEED_LINK_CONFIG ((uint32_t)(1 << 4))
16 #define NGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
18 /* structure for interrupt relative data */
19 struct ngbe_interrupt {
22 uint32_t mask_misc_orig; /* save mask during delayed handler */
24 uint64_t mask_orig; /* save mask during delayed handler */
28 * Structure to store private data for each driver instance (for each port).
32 struct ngbe_interrupt intr;
33 bool rx_bulk_alloc_allowed;
36 static inline struct ngbe_adapter *
37 ngbe_dev_adapter(struct rte_eth_dev *dev)
39 struct ngbe_adapter *ad = dev->data->dev_private;
44 static inline struct ngbe_hw *
45 ngbe_dev_hw(struct rte_eth_dev *dev)
47 struct ngbe_adapter *ad = ngbe_dev_adapter(dev);
48 struct ngbe_hw *hw = &ad->hw;
53 static inline struct ngbe_interrupt *
54 ngbe_dev_intr(struct rte_eth_dev *dev)
56 struct ngbe_adapter *ad = ngbe_dev_adapter(dev);
57 struct ngbe_interrupt *intr = &ad->intr;
62 void ngbe_dev_rx_queue_release(void *rxq);
64 void ngbe_dev_tx_queue_release(void *txq);
66 int ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
67 uint16_t nb_rx_desc, unsigned int socket_id,
68 const struct rte_eth_rxconf *rx_conf,
69 struct rte_mempool *mb_pool);
71 int ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
72 uint16_t nb_tx_desc, unsigned int socket_id,
73 const struct rte_eth_txconf *tx_conf);
76 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
77 int wait_to_complete);
79 #define NGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
80 #define NGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
81 #define NGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
84 * Default values for Rx/Tx configuration
86 #define NGBE_DEFAULT_RX_FREE_THRESH 32
87 #define NGBE_DEFAULT_RX_PTHRESH 8
88 #define NGBE_DEFAULT_RX_HTHRESH 8
89 #define NGBE_DEFAULT_RX_WTHRESH 0
91 #define NGBE_DEFAULT_TX_FREE_THRESH 32
92 #define NGBE_DEFAULT_TX_PTHRESH 32
93 #define NGBE_DEFAULT_TX_HTHRESH 0
94 #define NGBE_DEFAULT_TX_WTHRESH 0
96 #endif /* _NGBE_ETHDEV_H_ */