1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_bus_vdev.h>
15 #include <rte_cycles.h>
16 #include <rte_debug.h>
17 #include <rte_devargs.h>
19 #include <rte_kvargs.h>
20 #include <rte_malloc.h>
21 #include <rte_mbuf_pool_ops.h>
22 #include <rte_prefetch.h>
24 #include "octeontx_ethdev.h"
25 #include "octeontx_rxtx.h"
26 #include "octeontx_logs.h"
28 struct evdev_priv_data {
29 OFFLOAD_FLAGS; /*Sequence should not be changed */
30 } __rte_cache_aligned;
32 struct octeontx_vdev_init_params {
37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
39 enum octeontx_link_speed {
40 OCTEONTX_LINK_SPEED_SGMII,
41 OCTEONTX_LINK_SPEED_XAUI,
42 OCTEONTX_LINK_SPEED_RXAUI,
43 OCTEONTX_LINK_SPEED_10G_R,
44 OCTEONTX_LINK_SPEED_40G_R,
45 OCTEONTX_LINK_SPEED_RESERVE1,
46 OCTEONTX_LINK_SPEED_QSGMII,
47 OCTEONTX_LINK_SPEED_RESERVE2
50 int otx_net_logtype_mbox;
51 int otx_net_logtype_init;
52 int otx_net_logtype_driver;
54 RTE_INIT(otx_net_init_log)
56 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
57 if (otx_net_logtype_mbox >= 0)
58 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
60 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
61 if (otx_net_logtype_init >= 0)
62 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
64 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
65 if (otx_net_logtype_driver >= 0)
66 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
69 /* Parse integer from integer argument */
71 parse_integer_arg(const char *key __rte_unused,
72 const char *value, void *extra_args)
74 int *i = (int *)extra_args;
78 octeontx_log_err("argument has to be positive.");
86 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
87 struct rte_vdev_device *dev)
89 struct rte_kvargs *kvlist = NULL;
92 static const char * const octeontx_vdev_valid_params[] = {
93 OCTEONTX_VDEV_NR_PORT_ARG,
97 const char *input_args = rte_vdev_device_args(dev);
103 kvlist = rte_kvargs_parse(input_args,
104 octeontx_vdev_valid_params);
108 ret = rte_kvargs_process(kvlist,
109 OCTEONTX_VDEV_NR_PORT_ARG,
117 rte_kvargs_free(kvlist);
122 octeontx_port_open(struct octeontx_nic *nic)
124 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
128 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
129 PMD_INIT_FUNC_TRACE();
131 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
133 octeontx_log_err("failed to open port %d", res);
137 nic->node = bgx_port_conf.node;
138 nic->port_ena = bgx_port_conf.enable;
139 nic->base_ichan = bgx_port_conf.base_chan;
140 nic->base_ochan = bgx_port_conf.base_chan;
141 nic->num_ichans = bgx_port_conf.num_chans;
142 nic->num_ochans = bgx_port_conf.num_chans;
143 nic->bgx_mtu = bgx_port_conf.mtu;
144 nic->bpen = bgx_port_conf.bpen;
145 nic->fcs_strip = bgx_port_conf.fcs_strip;
146 nic->bcast_mode = bgx_port_conf.bcast_mode;
147 nic->mcast_mode = bgx_port_conf.mcast_mode;
148 nic->speed = bgx_port_conf.mode;
150 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
153 octeontx_log_dbg("port opened %d", nic->port_id);
158 octeontx_link_status_print(struct rte_eth_dev *eth_dev,
159 struct rte_eth_link *link)
161 if (link && link->link_status)
162 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s",
163 (eth_dev->data->port_id),
165 link->link_duplex == ETH_LINK_FULL_DUPLEX ?
166 "full-duplex" : "half-duplex");
168 octeontx_log_info("Port %d: Link Down",
169 (int)(eth_dev->data->port_id));
173 octeontx_link_status_update(struct octeontx_nic *nic,
174 struct rte_eth_link *link)
176 memset(link, 0, sizeof(*link));
178 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
180 switch (nic->speed) {
181 case OCTEONTX_LINK_SPEED_SGMII:
182 link->link_speed = ETH_SPEED_NUM_1G;
185 case OCTEONTX_LINK_SPEED_XAUI:
186 link->link_speed = ETH_SPEED_NUM_10G;
189 case OCTEONTX_LINK_SPEED_RXAUI:
190 case OCTEONTX_LINK_SPEED_10G_R:
191 link->link_speed = ETH_SPEED_NUM_10G;
193 case OCTEONTX_LINK_SPEED_QSGMII:
194 link->link_speed = ETH_SPEED_NUM_5G;
196 case OCTEONTX_LINK_SPEED_40G_R:
197 link->link_speed = ETH_SPEED_NUM_40G;
200 case OCTEONTX_LINK_SPEED_RESERVE1:
201 case OCTEONTX_LINK_SPEED_RESERVE2:
203 link->link_speed = ETH_SPEED_NUM_NONE;
204 octeontx_log_err("incorrect link speed %d", nic->speed);
208 link->link_duplex = ETH_LINK_FULL_DUPLEX;
209 link->link_autoneg = ETH_LINK_AUTONEG;
213 octeontx_link_status_poll(void *arg)
215 struct octeontx_nic *nic = arg;
216 struct rte_eth_link link;
217 struct rte_eth_dev *dev;
220 PMD_INIT_FUNC_TRACE();
224 res = octeontx_bgx_port_link_status(nic->port_id);
226 octeontx_log_err("Failed to get port %d link status",
229 if (nic->link_up != (uint8_t)res) {
230 nic->link_up = (uint8_t)res;
231 octeontx_link_status_update(nic, &link);
232 octeontx_link_status_print(dev, &link);
233 rte_eth_linkstatus_set(dev, &link);
234 _rte_eth_dev_callback_process(dev,
235 RTE_ETH_EVENT_INTR_LSC,
240 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
241 octeontx_link_status_poll, nic);
243 octeontx_log_err("Failed to restart alarm for port %d, err: %d",
248 octeontx_port_close(struct octeontx_nic *nic)
250 PMD_INIT_FUNC_TRACE();
252 rte_eal_alarm_cancel(octeontx_link_status_poll, nic);
253 octeontx_bgx_port_close(nic->port_id);
254 octeontx_log_dbg("port closed %d", nic->port_id);
258 octeontx_port_start(struct octeontx_nic *nic)
260 PMD_INIT_FUNC_TRACE();
262 return octeontx_bgx_port_start(nic->port_id);
266 octeontx_port_stop(struct octeontx_nic *nic)
268 PMD_INIT_FUNC_TRACE();
270 return octeontx_bgx_port_stop(nic->port_id);
274 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
276 struct rte_eth_dev *dev;
280 PMD_INIT_FUNC_TRACE();
283 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
285 octeontx_log_err("failed to set promiscuous mode %d",
290 /* Set proper flag for the mode */
291 dev->data->promiscuous = (en != 0) ? 1 : 0;
293 octeontx_log_dbg("port %d : promiscuous mode %s",
294 nic->port_id, en ? "set" : "unset");
300 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
302 octeontx_mbox_bgx_port_stats_t bgx_stats;
305 PMD_INIT_FUNC_TRACE();
307 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
309 octeontx_log_err("failed to get port stats %d", nic->port_id);
313 stats->ipackets = bgx_stats.rx_packets;
314 stats->ibytes = bgx_stats.rx_bytes;
315 stats->imissed = bgx_stats.rx_dropped;
316 stats->ierrors = bgx_stats.rx_errors;
317 stats->opackets = bgx_stats.tx_packets;
318 stats->obytes = bgx_stats.tx_bytes;
319 stats->oerrors = bgx_stats.tx_errors;
321 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
322 nic->port_id, stats->ipackets, stats->opackets);
328 octeontx_port_stats_clr(struct octeontx_nic *nic)
330 PMD_INIT_FUNC_TRACE();
332 return octeontx_bgx_port_stats_clr(nic->port_id);
336 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
337 struct rte_event_dev_info *info)
339 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
340 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
342 dev_conf->nb_event_ports = info->max_event_ports;
343 dev_conf->nb_event_queues = info->max_event_queues;
345 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
346 dev_conf->nb_event_port_dequeue_depth =
347 info->max_event_port_dequeue_depth;
348 dev_conf->nb_event_port_enqueue_depth =
349 info->max_event_port_enqueue_depth;
350 dev_conf->nb_event_port_enqueue_depth =
351 info->max_event_port_enqueue_depth;
352 dev_conf->nb_events_limit =
353 info->max_num_events;
357 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
359 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
362 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
363 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
365 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
366 flags |= OCCTX_TX_MULTI_SEG_F;
372 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
374 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
375 struct rte_eth_dev_data *data = eth_dev->data;
376 struct rte_eth_conf *conf = &data->dev_conf;
377 struct rte_eth_rxmode *rxmode = &conf->rxmode;
380 if (rxmode->mq_mode == ETH_MQ_RX_RSS)
381 flags |= OCCTX_RX_OFFLOAD_RSS_F;
383 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
384 flags |= OCCTX_RX_MULTI_SEG_F;
385 eth_dev->data->scattered_rx = 1;
386 /* If scatter mode is enabled, TX should also be in multi
387 * seg mode, else memory leak will occur
389 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
396 octeontx_dev_configure(struct rte_eth_dev *dev)
398 struct rte_eth_dev_data *data = dev->data;
399 struct rte_eth_conf *conf = &data->dev_conf;
400 struct rte_eth_rxmode *rxmode = &conf->rxmode;
401 struct rte_eth_txmode *txmode = &conf->txmode;
402 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
405 PMD_INIT_FUNC_TRACE();
408 if (!rte_eal_has_hugepages()) {
409 octeontx_log_err("huge page is not configured");
413 if (txmode->mq_mode) {
414 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
418 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
419 rxmode->mq_mode != ETH_MQ_RX_RSS) {
420 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
424 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
425 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
426 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
429 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
430 octeontx_log_err("setting link speed/duplex not supported");
434 if (conf->dcb_capability_en) {
435 octeontx_log_err("DCB enable not supported");
439 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
440 octeontx_log_err("flow director not supported");
444 nic->num_tx_queues = dev->data->nb_tx_queues;
446 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
450 octeontx_log_err("failed to open channel %d no-of-txq %d",
451 nic->base_ochan, nic->num_tx_queues);
455 ret = octeontx_dev_vlan_offload_init(dev);
457 octeontx_log_err("failed to initialize vlan offload");
461 nic->pki.classifier_enable = false;
462 nic->pki.hash_enable = true;
463 nic->pki.initialized = false;
465 nic->rx_offloads |= rxmode->offloads;
466 nic->tx_offloads |= txmode->offloads;
467 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
468 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
474 octeontx_dev_close(struct rte_eth_dev *dev)
476 struct octeontx_txq *txq = NULL;
477 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
481 PMD_INIT_FUNC_TRACE();
483 rte_event_dev_close(nic->evdev);
485 octeontx_dev_vlan_offload_fini(dev);
487 ret = octeontx_pko_channel_close(nic->base_ochan);
489 octeontx_log_err("failed to close channel %d VF%d %d %d",
490 nic->base_ochan, nic->port_id, nic->num_tx_queues,
493 /* Free txq resources for this port */
494 for (i = 0; i < nic->num_tx_queues; i++) {
495 txq = dev->data->tx_queues[i];
502 /* Free MAC address table */
503 rte_free(dev->data->mac_addrs);
504 dev->data->mac_addrs = NULL;
506 octeontx_port_close(nic);
508 dev->tx_pkt_burst = NULL;
509 dev->rx_pkt_burst = NULL;
513 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
515 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
516 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
517 struct rte_eth_dev_data *data = eth_dev->data;
520 /* Check if MTU is within the allowed range */
521 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)
524 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
526 /* Refuse MTU that requires the support of scattered packets
527 * when this feature has not been enabled before.
529 if (data->dev_started && frame_size > buffsz &&
530 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {
531 octeontx_log_err("Scatter mode is disabled");
535 /* Check <seg size> * <max_seg> >= max_frame */
536 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
537 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
540 rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
544 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
548 if (frame_size > RTE_ETHER_MAX_LEN)
549 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
551 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
553 /* Update max_rx_pkt_len */
554 data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
555 octeontx_log_info("Received pkt beyond maxlen %d will be dropped",
562 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
564 struct rte_eth_dev *eth_dev = rxq->eth_dev;
565 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
566 struct rte_eth_dev_data *data = eth_dev->data;
567 struct rte_pktmbuf_pool_private *mbp_priv;
568 struct evdev_priv_data *evdev_priv;
569 struct rte_eventdev *dev;
572 /* Get rx buffer size */
573 mbp_priv = rte_mempool_get_priv(rxq->pool);
574 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
576 /* Setup scatter mode if needed by jumbo */
577 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
578 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
579 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
580 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
583 /* Sharing offload flags via eventdev priv region */
584 dev = &rte_eventdevs[rxq->evdev];
585 evdev_priv = dev->data->dev_private;
586 evdev_priv->rx_offload_flags = nic->rx_offload_flags;
587 evdev_priv->tx_offload_flags = nic->tx_offload_flags;
589 /* Setup MTU based on max_rx_pkt_len */
590 nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;
596 octeontx_dev_start(struct rte_eth_dev *dev)
598 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
599 struct octeontx_rxq *rxq;
602 PMD_INIT_FUNC_TRACE();
603 /* Rechecking if any new offload set to update
604 * rx/tx burst function pointer accordingly.
606 for (i = 0; i < dev->data->nb_rx_queues; i++) {
607 rxq = dev->data->rx_queues[i];
608 octeontx_recheck_rx_offloads(rxq);
611 /* Setting up the mtu based on max_rx_pkt_len */
612 ret = octeontx_dev_mtu_set(dev, nic->mtu);
614 octeontx_log_err("Failed to set default MTU size %d", ret);
621 octeontx_set_tx_function(dev);
622 ret = octeontx_pko_channel_start(nic->base_ochan);
624 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
625 nic->port_id, nic->num_tx_queues, nic->base_ochan,
633 dev->rx_pkt_burst = octeontx_recv_pkts;
634 ret = octeontx_pki_port_start(nic->port_id);
636 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
637 goto channel_stop_error;
643 ret = octeontx_port_start(nic);
645 octeontx_log_err("failed start port %d", ret);
646 goto pki_port_stop_error;
649 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
650 nic->base_ochan, nic->num_tx_queues, nic->port_id);
652 ret = rte_event_dev_start(nic->evdev);
654 octeontx_log_err("failed to start evdev: ret (%d)", ret);
655 goto pki_port_stop_error;
662 octeontx_pki_port_stop(nic->port_id);
664 octeontx_pko_channel_stop(nic->base_ochan);
670 octeontx_dev_stop(struct rte_eth_dev *dev)
672 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
675 PMD_INIT_FUNC_TRACE();
677 rte_event_dev_stop(nic->evdev);
679 ret = octeontx_port_stop(nic);
681 octeontx_log_err("failed to req stop port %d res=%d",
686 ret = octeontx_pki_port_stop(nic->port_id);
688 octeontx_log_err("failed to stop pki port %d res=%d",
693 ret = octeontx_pko_channel_stop(nic->base_ochan);
695 octeontx_log_err("failed to stop channel %d VF%d %d %d",
696 nic->base_ochan, nic->port_id, nic->num_tx_queues,
703 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
705 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
707 PMD_INIT_FUNC_TRACE();
708 return octeontx_port_promisc_set(nic, 1);
712 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
714 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
716 PMD_INIT_FUNC_TRACE();
717 return octeontx_port_promisc_set(nic, 0);
721 octeontx_port_link_status(struct octeontx_nic *nic)
725 PMD_INIT_FUNC_TRACE();
726 res = octeontx_bgx_port_link_status(nic->port_id);
728 octeontx_log_err("failed to get port %d link status",
733 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) {
734 nic->link_up = (uint8_t)res;
737 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
743 * Return 0 means link status changed, -1 means not changed
746 octeontx_dev_link_update(struct rte_eth_dev *dev,
747 int wait_to_complete __rte_unused)
749 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
750 struct rte_eth_link link;
753 PMD_INIT_FUNC_TRACE();
755 res = octeontx_port_link_status(nic);
757 octeontx_log_err("failed to request link status %d", res);
761 octeontx_link_status_update(nic, &link);
762 if (nic->print_flag) {
763 octeontx_link_status_print(nic->dev, &link);
767 return rte_eth_linkstatus_set(dev, &link);
771 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
773 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
775 PMD_INIT_FUNC_TRACE();
776 return octeontx_port_stats(nic, stats);
780 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
782 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
784 PMD_INIT_FUNC_TRACE();
785 return octeontx_port_stats_clr(nic);
789 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
791 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
794 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
796 octeontx_log_err("failed to del MAC address filter on port %d",
801 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
802 struct rte_ether_addr *mac_addr,
804 __rte_unused uint32_t vmdq)
806 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
809 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
812 octeontx_log_err("failed to add MAC address filter on port %d",
821 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
822 struct rte_ether_addr *addr)
824 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
827 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
829 /* Update same mac address to BGX CAM table */
830 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
834 octeontx_log_err("failed to set MAC address on port %d",
842 octeontx_dev_info(struct rte_eth_dev *dev,
843 struct rte_eth_dev_info *dev_info)
845 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
847 /* Autonegotiation may be disabled */
848 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
849 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
850 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
853 /* Min/Max MTU supported */
854 dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
855 dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
856 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
857 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
859 dev_info->max_mac_addrs =
860 octeontx_bgx_port_mac_entries_get(nic->port_id);
861 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
862 dev_info->max_rx_queues = 1;
863 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
864 dev_info->min_rx_bufsize = 0;
866 dev_info->default_rxconf = (struct rte_eth_rxconf) {
869 .offloads = OCTEONTX_RX_OFFLOADS,
872 dev_info->default_txconf = (struct rte_eth_txconf) {
874 .offloads = OCTEONTX_TX_OFFLOADS,
877 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
878 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
879 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
880 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
886 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
888 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
889 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
890 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
894 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
897 struct octeontx_txq *txq;
900 PMD_INIT_FUNC_TRACE();
902 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
905 txq = dev->data->tx_queues[qidx];
907 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
909 sizeof(octeontx_dq_t),
911 octeontx_dq_info_getter);
917 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
921 (void)octeontx_port_stop(nic);
922 octeontx_pko_channel_stop(nic->base_ochan);
923 octeontx_pko_channel_close(nic->base_ochan);
924 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
929 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
931 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
933 PMD_INIT_FUNC_TRACE();
934 qidx = qidx % PKO_VF_NUM_DQ;
935 return octeontx_vf_start_tx_queue(dev, nic, qidx);
939 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
945 PMD_INIT_FUNC_TRACE();
947 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
950 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
955 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
957 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
959 PMD_INIT_FUNC_TRACE();
960 qidx = qidx % PKO_VF_NUM_DQ;
962 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
966 octeontx_dev_tx_queue_release(void *tx_queue)
968 struct octeontx_txq *txq = tx_queue;
971 PMD_INIT_FUNC_TRACE();
974 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
976 octeontx_log_err("failed stop tx_queue(%d)\n",
984 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
985 uint16_t nb_desc, unsigned int socket_id,
986 const struct rte_eth_txconf *tx_conf __rte_unused)
988 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
989 struct octeontx_txq *txq = NULL;
993 RTE_SET_USED(nb_desc);
994 RTE_SET_USED(socket_id);
996 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
998 /* Socket id check */
999 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1000 socket_id != (unsigned int)nic->node)
1001 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
1002 socket_id, nic->node);
1004 /* Free memory prior to re-allocation if needed. */
1005 if (dev->data->tx_queues[qidx] != NULL) {
1006 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
1008 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
1009 dev->data->tx_queues[qidx] = NULL;
1012 /* Allocating tx queue data structure */
1013 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
1014 RTE_CACHE_LINE_SIZE, nic->node);
1016 octeontx_log_err("failed to allocate txq=%d", qidx);
1022 txq->queue_id = dq_num;
1023 dev->data->tx_queues[qidx] = txq;
1024 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1026 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
1028 sizeof(octeontx_dq_t),
1030 octeontx_dq_info_getter);
1036 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
1037 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
1039 txq->dq.fc_status_va);
1051 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
1052 uint16_t nb_desc, unsigned int socket_id,
1053 const struct rte_eth_rxconf *rx_conf,
1054 struct rte_mempool *mb_pool)
1056 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1057 struct rte_mempool_ops *mp_ops = NULL;
1058 struct octeontx_rxq *rxq = NULL;
1059 pki_pktbuf_cfg_t pktbuf_conf;
1060 pki_hash_cfg_t pki_hash;
1061 pki_qos_cfg_t pki_qos;
1065 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
1066 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
1068 RTE_SET_USED(nb_desc);
1070 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
1071 memset(&pki_hash, 0, sizeof(pki_hash));
1072 memset(&pki_qos, 0, sizeof(pki_qos));
1074 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
1075 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
1076 octeontx_log_err("failed to find octeontx_fpavf mempool");
1080 /* Handle forbidden configurations */
1081 if (nic->pki.classifier_enable) {
1082 octeontx_log_err("cannot setup queue %d. "
1083 "Classifier option unsupported", qidx);
1087 port = nic->port_id;
1089 /* Rx deferred start is not supported */
1090 if (rx_conf->rx_deferred_start) {
1091 octeontx_log_err("rx deferred start not supported");
1095 /* Verify queue index */
1096 if (qidx >= dev->data->nb_rx_queues) {
1097 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
1098 qidx, (dev->data->nb_rx_queues - 1));
1102 /* Socket id check */
1103 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1104 socket_id != (unsigned int)nic->node)
1105 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1106 socket_id, nic->node);
1108 /* Allocating rx queue data structure */
1109 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1110 RTE_CACHE_LINE_SIZE, nic->node);
1112 octeontx_log_err("failed to allocate rxq=%d", qidx);
1116 if (!nic->pki.initialized) {
1117 pktbuf_conf.port_type = 0;
1118 pki_hash.port_type = 0;
1119 pki_qos.port_type = 0;
1121 pktbuf_conf.mmask.f_wqe_skip = 1;
1122 pktbuf_conf.mmask.f_first_skip = 1;
1123 pktbuf_conf.mmask.f_later_skip = 1;
1124 pktbuf_conf.mmask.f_mbuff_size = 1;
1125 pktbuf_conf.mmask.f_cache_mode = 1;
1127 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1128 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1129 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1130 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1131 RTE_PKTMBUF_HEADROOM -
1132 rte_pktmbuf_priv_size(mb_pool) -
1133 sizeof(struct rte_mbuf));
1135 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1137 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1139 octeontx_log_err("fail to configure pktbuf for port %d",
1144 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1145 "\tmbuf_size:\t0x%0x\n"
1146 "\twqe_skip:\t0x%0x\n"
1147 "\tfirst_skip:\t0x%0x\n"
1148 "\tlater_skip:\t0x%0x\n"
1149 "\tcache_mode:\t%s\n",
1151 pktbuf_conf.mbuff_size,
1152 pktbuf_conf.wqe_skip,
1153 pktbuf_conf.first_skip,
1154 pktbuf_conf.later_skip,
1155 (pktbuf_conf.cache_mode ==
1158 (pktbuf_conf.cache_mode ==
1161 (pktbuf_conf.cache_mode ==
1162 PKI_OPC_MODE_STF1_STT) ?
1163 "STF1_STT" : "STF2_STT");
1165 if (nic->pki.hash_enable) {
1166 pki_hash.tag_dlc = 1;
1167 pki_hash.tag_slc = 1;
1168 pki_hash.tag_dlf = 1;
1169 pki_hash.tag_slf = 1;
1170 pki_hash.tag_prt = 1;
1171 octeontx_pki_port_hash_config(port, &pki_hash);
1174 pool = (uintptr_t)mb_pool->pool_id;
1176 /* Get the gaura Id */
1177 gaura = octeontx_fpa_bufpool_gaura(pool);
1179 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1180 pki_qos.num_entry = 1;
1181 pki_qos.drop_policy = 0;
1182 pki_qos.tag_type = 0L;
1183 pki_qos.qos_entry[0].port_add = 0;
1184 pki_qos.qos_entry[0].gaura = gaura;
1185 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1186 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1187 pki_qos.qos_entry[0].grptag_bad = 0;
1188 pki_qos.qos_entry[0].grptag_ok = 0;
1190 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1192 octeontx_log_err("failed to create QOS port=%d, q=%d",
1197 nic->pki.initialized = true;
1200 rxq->port_id = nic->port_id;
1202 rxq->queue_id = qidx;
1203 rxq->evdev = nic->evdev;
1204 rxq->ev_queues = ev_queues;
1205 rxq->ev_ports = ev_ports;
1206 rxq->pool = mb_pool;
1208 octeontx_recheck_rx_offloads(rxq);
1209 dev->data->rx_queues[qidx] = rxq;
1210 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1215 octeontx_dev_rx_queue_release(void *rxq)
1220 static const uint32_t *
1221 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1223 static const uint32_t ptypes[] = {
1225 RTE_PTYPE_L3_IPV4_EXT,
1227 RTE_PTYPE_L3_IPV6_EXT,
1234 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1241 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1245 if (!strcmp(pool, "octeontx_fpavf"))
1251 /* Initialize and register driver with DPDK Application */
1252 static const struct eth_dev_ops octeontx_dev_ops = {
1253 .dev_configure = octeontx_dev_configure,
1254 .dev_infos_get = octeontx_dev_info,
1255 .dev_close = octeontx_dev_close,
1256 .dev_start = octeontx_dev_start,
1257 .dev_stop = octeontx_dev_stop,
1258 .promiscuous_enable = octeontx_dev_promisc_enable,
1259 .promiscuous_disable = octeontx_dev_promisc_disable,
1260 .link_update = octeontx_dev_link_update,
1261 .stats_get = octeontx_dev_stats_get,
1262 .stats_reset = octeontx_dev_stats_reset,
1263 .mac_addr_remove = octeontx_dev_mac_addr_del,
1264 .mac_addr_add = octeontx_dev_mac_addr_add,
1265 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1266 .vlan_offload_set = octeontx_dev_vlan_offload_set,
1267 .vlan_filter_set = octeontx_dev_vlan_filter_set,
1268 .tx_queue_start = octeontx_dev_tx_queue_start,
1269 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1270 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1271 .tx_queue_release = octeontx_dev_tx_queue_release,
1272 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1273 .rx_queue_release = octeontx_dev_rx_queue_release,
1274 .dev_set_link_up = octeontx_dev_set_link_up,
1275 .dev_set_link_down = octeontx_dev_set_link_down,
1276 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1277 .mtu_set = octeontx_dev_mtu_set,
1278 .pool_ops_supported = octeontx_pool_ops,
1281 /* Create Ethdev interface per BGX LMAC ports */
1283 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1288 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1289 struct octeontx_nic *nic = NULL;
1290 struct rte_eth_dev *eth_dev = NULL;
1291 struct rte_eth_dev_data *data;
1292 const char *name = rte_vdev_device_name(dev);
1295 PMD_INIT_FUNC_TRACE();
1297 sprintf(octtx_name, "%s_%d", name, port);
1298 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1299 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1300 if (eth_dev == NULL)
1303 eth_dev->dev_ops = &octeontx_dev_ops;
1304 eth_dev->device = &dev->device;
1305 octeontx_set_tx_function(eth_dev);
1306 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1307 rte_eth_dev_probing_finish(eth_dev);
1311 /* Reserve an ethdev entry */
1312 eth_dev = rte_eth_dev_allocate(octtx_name);
1313 if (eth_dev == NULL) {
1314 octeontx_log_err("failed to allocate rte_eth_dev");
1318 data = eth_dev->data;
1320 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1322 octeontx_log_err("failed to allocate nic structure");
1326 data->dev_private = nic;
1327 pko_vfid = octeontx_pko_get_vfid();
1329 if (pko_vfid == SIZE_MAX) {
1330 octeontx_log_err("failed to get pko vfid");
1335 nic->pko_vfid = pko_vfid;
1336 nic->port_id = port;
1339 res = octeontx_port_open(nic);
1343 /* Rx side port configuration */
1344 res = octeontx_pki_port_open(port);
1346 octeontx_log_err("failed to open PKI port %d", port);
1351 eth_dev->device = &dev->device;
1352 eth_dev->intr_handle = NULL;
1353 eth_dev->data->kdrv = RTE_KDRV_NONE;
1354 eth_dev->data->numa_node = dev->device.numa_node;
1356 data->port_id = eth_dev->data->port_id;
1360 nic->print_flag = -1;
1362 data->dev_link.link_status = ETH_LINK_DOWN;
1363 data->dev_started = 0;
1364 data->promiscuous = 0;
1365 data->all_multicast = 0;
1366 data->scattered_rx = 0;
1368 /* Get maximum number of supported MAC entries */
1369 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1370 if (max_entries < 0) {
1371 octeontx_log_err("Failed to get max entries for mac addr");
1376 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1377 RTE_ETHER_ADDR_LEN, 0,
1379 if (data->mac_addrs == NULL) {
1380 octeontx_log_err("failed to allocate memory for mac_addrs");
1385 eth_dev->dev_ops = &octeontx_dev_ops;
1387 /* Finally save ethdev pointer to the NIC structure */
1390 if (nic->port_id != data->port_id) {
1391 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1392 data->port_id, nic->port_id);
1394 goto free_mac_addrs;
1397 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
1398 octeontx_link_status_poll, nic);
1400 octeontx_log_err("Failed to start link polling alarm");
1404 /* Update port_id mac to eth_dev */
1405 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1407 /* Update same mac address to BGX CAM table at index 0 */
1408 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1410 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1411 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1412 nic->port_id, nic->port_ena,
1413 nic->base_ochan, nic->num_ochans,
1414 nic->num_tx_queues);
1415 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1417 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1418 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1420 rte_eth_dev_probing_finish(eth_dev);
1421 return data->port_id;
1424 rte_free(data->mac_addrs);
1427 octeontx_port_close(nic);
1429 rte_eth_dev_release_port(eth_dev);
1434 /* Un initialize octeontx device */
1436 octeontx_remove(struct rte_vdev_device *dev)
1438 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1439 struct rte_eth_dev *eth_dev = NULL;
1440 struct octeontx_nic *nic = NULL;
1446 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1447 sprintf(octtx_name, "eth_octeontx_%d", i);
1449 /* reserve an ethdev entry */
1450 eth_dev = rte_eth_dev_allocated(octtx_name);
1451 if (eth_dev == NULL)
1454 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1455 rte_eth_dev_release_port(eth_dev);
1459 nic = octeontx_pmd_priv(eth_dev);
1460 rte_event_dev_stop(nic->evdev);
1461 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1463 rte_eth_dev_release_port(eth_dev);
1464 rte_event_dev_close(nic->evdev);
1467 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1470 /* Free FC resource */
1471 octeontx_pko_fc_free();
1476 /* Initialize octeontx device */
1478 octeontx_probe(struct rte_vdev_device *dev)
1480 const char *dev_name;
1481 static int probe_once;
1482 uint8_t socket_id, qlist;
1483 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1484 struct rte_event_dev_config dev_conf;
1485 const char *eventdev_name = "event_octeontx";
1486 struct rte_event_dev_info info;
1487 struct rte_eth_dev *eth_dev;
1489 struct octeontx_vdev_init_params init_params = {
1490 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1493 dev_name = rte_vdev_device_name(dev);
1495 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1496 strlen(rte_vdev_device_args(dev)) == 0) {
1497 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1499 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1502 /* TODO: request info from primary to set up Rx and Tx */
1503 eth_dev->dev_ops = &octeontx_dev_ops;
1504 eth_dev->device = &dev->device;
1505 rte_eth_dev_probing_finish(eth_dev);
1509 res = octeontx_parse_vdev_init_params(&init_params, dev);
1513 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1514 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1515 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1519 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1521 socket_id = rte_socket_id();
1523 tx_vfcnt = octeontx_pko_vf_count();
1525 if (tx_vfcnt < init_params.nr_port) {
1526 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1527 tx_vfcnt, init_params.nr_port);
1530 evdev = rte_event_dev_get_dev_id(eventdev_name);
1532 octeontx_log_err("eventdev %s not found", eventdev_name);
1536 res = rte_event_dev_info_get(evdev, &info);
1538 octeontx_log_err("failed to eventdev info %d", res);
1542 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1543 info.max_event_queues, info.max_event_ports);
1545 if (octeontx_pko_init_fc(tx_vfcnt))
1548 devconf_set_default_sane_values(&dev_conf, &info);
1549 res = rte_event_dev_configure(evdev, &dev_conf);
1553 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1555 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1558 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1564 /* Enable all queues available */
1565 for (i = 0; i < qnum; i++) {
1566 res = rte_event_queue_setup(evdev, i, NULL);
1568 octeontx_log_err("failed to setup event_q(%d): res %d",
1574 /* Enable all ports available */
1575 for (i = 0; i < pnum; i++) {
1576 res = rte_event_port_setup(evdev, i, NULL);
1579 octeontx_log_err("failed to setup ev port(%d) res=%d",
1586 * Do 1:1 links for ports & queues. All queues would be mapped to
1587 * one port. If there are more ports than queues, then some ports
1588 * won't be linked to any queue.
1590 for (i = 0; i < qnum; i++) {
1591 /* Link one queue to one event port */
1593 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1596 octeontx_log_err("failed to link port (%d): res=%d",
1602 /* Create ethdev interface */
1603 for (i = 0; i < init_params.nr_port; i++) {
1604 port_id = octeontx_create(dev, i, evdev, socket_id);
1606 octeontx_log_err("failed to create device %s",
1612 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1617 octeontx_log_err("interface %s not supported", dev_name);
1618 octeontx_remove(dev);
1622 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1628 octeontx_pko_fc_free();
1632 static struct rte_vdev_driver octeontx_pmd_drv = {
1633 .probe = octeontx_probe,
1634 .remove = octeontx_remove,
1637 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1638 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1639 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");