1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
27 struct octeontx_vdev_init_params {
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
34 enum octeontx_link_speed {
35 OCTEONTX_LINK_SPEED_SGMII,
36 OCTEONTX_LINK_SPEED_XAUI,
37 OCTEONTX_LINK_SPEED_RXAUI,
38 OCTEONTX_LINK_SPEED_10G_R,
39 OCTEONTX_LINK_SPEED_40G_R,
40 OCTEONTX_LINK_SPEED_RESERVE1,
41 OCTEONTX_LINK_SPEED_QSGMII,
42 OCTEONTX_LINK_SPEED_RESERVE2
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
49 RTE_INIT(otx_net_init_log);
51 otx_net_init_log(void)
53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
54 if (otx_net_logtype_mbox >= 0)
55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
58 if (otx_net_logtype_init >= 0)
59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
62 if (otx_net_logtype_driver >= 0)
63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
66 /* Parse integer from integer argument */
68 parse_integer_arg(const char *key __rte_unused,
69 const char *value, void *extra_args)
71 int *i = (int *)extra_args;
75 octeontx_log_err("argument has to be positive.");
83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
84 struct rte_vdev_device *dev)
86 struct rte_kvargs *kvlist = NULL;
89 static const char * const octeontx_vdev_valid_params[] = {
90 OCTEONTX_VDEV_NR_PORT_ARG,
94 const char *input_args = rte_vdev_device_args(dev);
100 kvlist = rte_kvargs_parse(input_args,
101 octeontx_vdev_valid_params);
105 ret = rte_kvargs_process(kvlist,
106 OCTEONTX_VDEV_NR_PORT_ARG,
114 rte_kvargs_free(kvlist);
119 octeontx_port_open(struct octeontx_nic *nic)
121 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
126 PMD_INIT_FUNC_TRACE();
128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
130 octeontx_log_err("failed to open port %d", res);
134 nic->node = bgx_port_conf.node;
135 nic->port_ena = bgx_port_conf.enable;
136 nic->base_ichan = bgx_port_conf.base_chan;
137 nic->base_ochan = bgx_port_conf.base_chan;
138 nic->num_ichans = bgx_port_conf.num_chans;
139 nic->num_ochans = bgx_port_conf.num_chans;
140 nic->mtu = bgx_port_conf.mtu;
141 nic->bpen = bgx_port_conf.bpen;
142 nic->fcs_strip = bgx_port_conf.fcs_strip;
143 nic->bcast_mode = bgx_port_conf.bcast_mode;
144 nic->mcast_mode = bgx_port_conf.mcast_mode;
145 nic->speed = bgx_port_conf.mode;
147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
149 octeontx_log_dbg("port opened %d", nic->port_id);
154 octeontx_port_close(struct octeontx_nic *nic)
156 PMD_INIT_FUNC_TRACE();
158 octeontx_bgx_port_close(nic->port_id);
159 octeontx_log_dbg("port closed %d", nic->port_id);
163 octeontx_port_start(struct octeontx_nic *nic)
165 PMD_INIT_FUNC_TRACE();
167 return octeontx_bgx_port_start(nic->port_id);
171 octeontx_port_stop(struct octeontx_nic *nic)
173 PMD_INIT_FUNC_TRACE();
175 return octeontx_bgx_port_stop(nic->port_id);
179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
181 struct rte_eth_dev *dev;
185 PMD_INIT_FUNC_TRACE();
188 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
190 octeontx_log_err("failed to set promiscuous mode %d",
193 /* Set proper flag for the mode */
194 dev->data->promiscuous = (en != 0) ? 1 : 0;
196 octeontx_log_dbg("port %d : promiscuous mode %s",
197 nic->port_id, en ? "set" : "unset");
201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
203 octeontx_mbox_bgx_port_stats_t bgx_stats;
206 PMD_INIT_FUNC_TRACE();
208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
210 octeontx_log_err("failed to get port stats %d", nic->port_id);
214 stats->ipackets = bgx_stats.rx_packets;
215 stats->ibytes = bgx_stats.rx_bytes;
216 stats->imissed = bgx_stats.rx_dropped;
217 stats->ierrors = bgx_stats.rx_errors;
218 stats->opackets = bgx_stats.tx_packets;
219 stats->obytes = bgx_stats.tx_bytes;
220 stats->oerrors = bgx_stats.tx_errors;
222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
223 nic->port_id, stats->ipackets, stats->opackets);
229 octeontx_port_stats_clr(struct octeontx_nic *nic)
231 PMD_INIT_FUNC_TRACE();
233 octeontx_bgx_port_stats_clr(nic->port_id);
237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
238 struct rte_event_dev_info *info)
240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
243 dev_conf->nb_event_ports = info->max_event_ports;
244 dev_conf->nb_event_queues = info->max_event_queues;
246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
247 dev_conf->nb_event_port_dequeue_depth =
248 info->max_event_port_dequeue_depth;
249 dev_conf->nb_event_port_enqueue_depth =
250 info->max_event_port_enqueue_depth;
251 dev_conf->nb_event_port_enqueue_depth =
252 info->max_event_port_enqueue_depth;
253 dev_conf->nb_events_limit =
254 info->max_num_events;
258 octeontx_dev_configure(struct rte_eth_dev *dev)
260 struct rte_eth_dev_data *data = dev->data;
261 struct rte_eth_conf *conf = &data->dev_conf;
262 struct rte_eth_rxmode *rxmode = &conf->rxmode;
263 struct rte_eth_txmode *txmode = &conf->txmode;
264 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
267 PMD_INIT_FUNC_TRACE();
270 if (!rte_eal_has_hugepages()) {
271 octeontx_log_err("huge page is not configured");
275 if (txmode->mq_mode) {
276 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
280 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
281 rxmode->mq_mode != ETH_MQ_RX_RSS) {
282 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
286 if (!(rxmode->offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
287 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
288 rxmode->offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
291 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
292 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
293 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
296 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
297 octeontx_log_err("setting link speed/duplex not supported");
301 if (conf->dcb_capability_en) {
302 octeontx_log_err("DCB enable not supported");
306 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
307 octeontx_log_err("flow director not supported");
311 nic->num_tx_queues = dev->data->nb_tx_queues;
313 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
317 octeontx_log_err("failed to open channel %d no-of-txq %d",
318 nic->base_ochan, nic->num_tx_queues);
322 nic->pki.classifier_enable = false;
323 nic->pki.hash_enable = true;
324 nic->pki.initialized = false;
330 octeontx_dev_close(struct rte_eth_dev *dev)
332 struct octeontx_txq *txq = NULL;
333 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
337 PMD_INIT_FUNC_TRACE();
339 rte_event_dev_close(nic->evdev);
341 ret = octeontx_pko_channel_close(nic->base_ochan);
343 octeontx_log_err("failed to close channel %d VF%d %d %d",
344 nic->base_ochan, nic->port_id, nic->num_tx_queues,
347 /* Free txq resources for this port */
348 for (i = 0; i < nic->num_tx_queues; i++) {
349 txq = dev->data->tx_queues[i];
358 octeontx_dev_start(struct rte_eth_dev *dev)
360 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
365 PMD_INIT_FUNC_TRACE();
369 dev->tx_pkt_burst = octeontx_xmit_pkts;
370 ret = octeontx_pko_channel_start(nic->base_ochan);
372 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
373 nic->port_id, nic->num_tx_queues, nic->base_ochan,
381 dev->rx_pkt_burst = octeontx_recv_pkts;
382 ret = octeontx_pki_port_start(nic->port_id);
384 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
385 goto channel_stop_error;
391 ret = octeontx_port_start(nic);
393 octeontx_log_err("failed start port %d", ret);
394 goto pki_port_stop_error;
397 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
398 nic->base_ochan, nic->num_tx_queues, nic->port_id);
400 ret = rte_event_dev_start(nic->evdev);
402 octeontx_log_err("failed to start evdev: ret (%d)", ret);
403 goto pki_port_stop_error;
410 octeontx_pki_port_stop(nic->port_id);
412 octeontx_pko_channel_stop(nic->base_ochan);
418 octeontx_dev_stop(struct rte_eth_dev *dev)
420 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
423 PMD_INIT_FUNC_TRACE();
425 rte_event_dev_stop(nic->evdev);
427 ret = octeontx_port_stop(nic);
429 octeontx_log_err("failed to req stop port %d res=%d",
434 ret = octeontx_pki_port_stop(nic->port_id);
436 octeontx_log_err("failed to stop pki port %d res=%d",
441 ret = octeontx_pko_channel_stop(nic->base_ochan);
443 octeontx_log_err("failed to stop channel %d VF%d %d %d",
444 nic->base_ochan, nic->port_id, nic->num_tx_queues,
449 dev->tx_pkt_burst = NULL;
450 dev->rx_pkt_burst = NULL;
454 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
456 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
458 PMD_INIT_FUNC_TRACE();
459 octeontx_port_promisc_set(nic, 1);
463 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
465 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
467 PMD_INIT_FUNC_TRACE();
468 octeontx_port_promisc_set(nic, 0);
472 octeontx_port_link_status(struct octeontx_nic *nic)
476 PMD_INIT_FUNC_TRACE();
477 res = octeontx_bgx_port_link_status(nic->port_id);
479 octeontx_log_err("failed to get port %d link status",
484 nic->link_up = (uint8_t)res;
485 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
491 * Return 0 means link status changed, -1 means not changed
494 octeontx_dev_link_update(struct rte_eth_dev *dev,
495 int wait_to_complete __rte_unused)
497 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
498 struct rte_eth_link link;
501 PMD_INIT_FUNC_TRACE();
503 res = octeontx_port_link_status(nic);
505 octeontx_log_err("failed to request link status %d", res);
509 link.link_status = nic->link_up;
511 switch (nic->speed) {
512 case OCTEONTX_LINK_SPEED_SGMII:
513 link.link_speed = ETH_SPEED_NUM_1G;
516 case OCTEONTX_LINK_SPEED_XAUI:
517 link.link_speed = ETH_SPEED_NUM_10G;
520 case OCTEONTX_LINK_SPEED_RXAUI:
521 case OCTEONTX_LINK_SPEED_10G_R:
522 link.link_speed = ETH_SPEED_NUM_10G;
524 case OCTEONTX_LINK_SPEED_QSGMII:
525 link.link_speed = ETH_SPEED_NUM_5G;
527 case OCTEONTX_LINK_SPEED_40G_R:
528 link.link_speed = ETH_SPEED_NUM_40G;
531 case OCTEONTX_LINK_SPEED_RESERVE1:
532 case OCTEONTX_LINK_SPEED_RESERVE2:
534 link.link_speed = ETH_SPEED_NUM_NONE;
535 octeontx_log_err("incorrect link speed %d", nic->speed);
539 link.link_duplex = ETH_LINK_FULL_DUPLEX;
540 link.link_autoneg = ETH_LINK_AUTONEG;
542 return rte_eth_linkstatus_set(dev, &link);
546 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
548 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
550 PMD_INIT_FUNC_TRACE();
551 return octeontx_port_stats(nic, stats);
555 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
557 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
559 PMD_INIT_FUNC_TRACE();
560 octeontx_port_stats_clr(nic);
564 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
565 struct ether_addr *addr)
567 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
570 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
572 octeontx_log_err("failed to set MAC address on port %d",
579 octeontx_dev_info(struct rte_eth_dev *dev,
580 struct rte_eth_dev_info *dev_info)
584 /* Autonegotiation may be disabled */
585 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
586 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
587 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
590 dev_info->max_mac_addrs = 1;
591 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
592 dev_info->max_rx_queues = 1;
593 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
594 dev_info->min_rx_bufsize = 0;
596 dev_info->default_rxconf = (struct rte_eth_rxconf) {
599 .offloads = OCTEONTX_RX_OFFLOADS,
602 dev_info->default_txconf = (struct rte_eth_txconf) {
604 .offloads = OCTEONTX_TX_OFFLOADS,
607 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
608 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
612 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
614 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
615 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
616 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
620 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
623 struct octeontx_txq *txq;
626 PMD_INIT_FUNC_TRACE();
628 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
631 txq = dev->data->tx_queues[qidx];
633 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
635 sizeof(octeontx_dq_t),
637 octeontx_dq_info_getter);
643 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
647 (void)octeontx_port_stop(nic);
648 octeontx_pko_channel_stop(nic->base_ochan);
649 octeontx_pko_channel_close(nic->base_ochan);
650 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
655 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
657 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
659 PMD_INIT_FUNC_TRACE();
660 qidx = qidx % PKO_VF_NUM_DQ;
661 return octeontx_vf_start_tx_queue(dev, nic, qidx);
665 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
671 PMD_INIT_FUNC_TRACE();
673 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
676 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
681 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
683 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
685 PMD_INIT_FUNC_TRACE();
686 qidx = qidx % PKO_VF_NUM_DQ;
688 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
692 octeontx_dev_tx_queue_release(void *tx_queue)
694 struct octeontx_txq *txq = tx_queue;
697 PMD_INIT_FUNC_TRACE();
700 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
702 octeontx_log_err("failed stop tx_queue(%d)\n",
710 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
711 uint16_t nb_desc, unsigned int socket_id,
712 const struct rte_eth_txconf *tx_conf __rte_unused)
714 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
715 struct octeontx_txq *txq = NULL;
719 RTE_SET_USED(nb_desc);
720 RTE_SET_USED(socket_id);
722 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
724 /* Socket id check */
725 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
726 socket_id != (unsigned int)nic->node)
727 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
728 socket_id, nic->node);
730 /* Free memory prior to re-allocation if needed. */
731 if (dev->data->tx_queues[qidx] != NULL) {
732 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
734 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
735 dev->data->tx_queues[qidx] = NULL;
738 /* Allocating tx queue data structure */
739 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
740 RTE_CACHE_LINE_SIZE, nic->node);
742 octeontx_log_err("failed to allocate txq=%d", qidx);
748 txq->queue_id = dq_num;
749 dev->data->tx_queues[qidx] = txq;
750 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
752 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
754 sizeof(octeontx_dq_t),
756 octeontx_dq_info_getter);
762 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
763 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
765 txq->dq.fc_status_va);
777 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
778 uint16_t nb_desc, unsigned int socket_id,
779 const struct rte_eth_rxconf *rx_conf,
780 struct rte_mempool *mb_pool)
782 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
783 struct rte_mempool_ops *mp_ops = NULL;
784 struct octeontx_rxq *rxq = NULL;
785 pki_pktbuf_cfg_t pktbuf_conf;
786 pki_hash_cfg_t pki_hash;
787 pki_qos_cfg_t pki_qos;
791 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
792 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
794 RTE_SET_USED(nb_desc);
796 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
797 memset(&pki_hash, 0, sizeof(pki_hash));
798 memset(&pki_qos, 0, sizeof(pki_qos));
800 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
801 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
802 octeontx_log_err("failed to find octeontx_fpavf mempool");
806 /* Handle forbidden configurations */
807 if (nic->pki.classifier_enable) {
808 octeontx_log_err("cannot setup queue %d. "
809 "Classifier option unsupported", qidx);
815 /* Rx deferred start is not supported */
816 if (rx_conf->rx_deferred_start) {
817 octeontx_log_err("rx deferred start not supported");
821 /* Verify queue index */
822 if (qidx >= dev->data->nb_rx_queues) {
823 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
824 qidx, (dev->data->nb_rx_queues - 1));
828 /* Socket id check */
829 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
830 socket_id != (unsigned int)nic->node)
831 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
832 socket_id, nic->node);
834 /* Allocating rx queue data structure */
835 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
836 RTE_CACHE_LINE_SIZE, nic->node);
838 octeontx_log_err("failed to allocate rxq=%d", qidx);
842 if (!nic->pki.initialized) {
843 pktbuf_conf.port_type = 0;
844 pki_hash.port_type = 0;
845 pki_qos.port_type = 0;
847 pktbuf_conf.mmask.f_wqe_skip = 1;
848 pktbuf_conf.mmask.f_first_skip = 1;
849 pktbuf_conf.mmask.f_later_skip = 1;
850 pktbuf_conf.mmask.f_mbuff_size = 1;
851 pktbuf_conf.mmask.f_cache_mode = 1;
853 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
854 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
855 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
856 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
857 RTE_PKTMBUF_HEADROOM -
858 sizeof(struct rte_mbuf));
860 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
862 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
864 octeontx_log_err("fail to configure pktbuf for port %d",
869 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
870 "\tmbuf_size:\t0x%0x\n"
871 "\twqe_skip:\t0x%0x\n"
872 "\tfirst_skip:\t0x%0x\n"
873 "\tlater_skip:\t0x%0x\n"
874 "\tcache_mode:\t%s\n",
876 pktbuf_conf.mbuff_size,
877 pktbuf_conf.wqe_skip,
878 pktbuf_conf.first_skip,
879 pktbuf_conf.later_skip,
880 (pktbuf_conf.cache_mode ==
883 (pktbuf_conf.cache_mode ==
886 (pktbuf_conf.cache_mode ==
887 PKI_OPC_MODE_STF1_STT) ?
888 "STF1_STT" : "STF2_STT");
890 if (nic->pki.hash_enable) {
891 pki_hash.tag_dlc = 1;
892 pki_hash.tag_slc = 1;
893 pki_hash.tag_dlf = 1;
894 pki_hash.tag_slf = 1;
895 pki_hash.tag_prt = 1;
896 octeontx_pki_port_hash_config(port, &pki_hash);
899 pool = (uintptr_t)mb_pool->pool_id;
901 /* Get the gpool Id */
902 gaura = octeontx_fpa_bufpool_gpool(pool);
904 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
905 pki_qos.num_entry = 1;
906 pki_qos.drop_policy = 0;
907 pki_qos.tag_type = 0L;
908 pki_qos.qos_entry[0].port_add = 0;
909 pki_qos.qos_entry[0].gaura = gaura;
910 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
911 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
912 pki_qos.qos_entry[0].grptag_bad = 0;
913 pki_qos.qos_entry[0].grptag_ok = 0;
915 ret = octeontx_pki_port_create_qos(port, &pki_qos);
917 octeontx_log_err("failed to create QOS port=%d, q=%d",
922 nic->pki.initialized = true;
925 rxq->port_id = nic->port_id;
927 rxq->queue_id = qidx;
928 rxq->evdev = nic->evdev;
929 rxq->ev_queues = ev_queues;
930 rxq->ev_ports = ev_ports;
932 dev->data->rx_queues[qidx] = rxq;
933 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
938 octeontx_dev_rx_queue_release(void *rxq)
943 static const uint32_t *
944 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
946 static const uint32_t ptypes[] = {
948 RTE_PTYPE_L3_IPV4_EXT,
950 RTE_PTYPE_L3_IPV6_EXT,
957 if (dev->rx_pkt_burst == octeontx_recv_pkts)
964 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
968 if (!strcmp(pool, "octeontx_fpavf"))
974 /* Initialize and register driver with DPDK Application */
975 static const struct eth_dev_ops octeontx_dev_ops = {
976 .dev_configure = octeontx_dev_configure,
977 .dev_infos_get = octeontx_dev_info,
978 .dev_close = octeontx_dev_close,
979 .dev_start = octeontx_dev_start,
980 .dev_stop = octeontx_dev_stop,
981 .promiscuous_enable = octeontx_dev_promisc_enable,
982 .promiscuous_disable = octeontx_dev_promisc_disable,
983 .link_update = octeontx_dev_link_update,
984 .stats_get = octeontx_dev_stats_get,
985 .stats_reset = octeontx_dev_stats_reset,
986 .mac_addr_set = octeontx_dev_default_mac_addr_set,
987 .tx_queue_start = octeontx_dev_tx_queue_start,
988 .tx_queue_stop = octeontx_dev_tx_queue_stop,
989 .tx_queue_setup = octeontx_dev_tx_queue_setup,
990 .tx_queue_release = octeontx_dev_tx_queue_release,
991 .rx_queue_setup = octeontx_dev_rx_queue_setup,
992 .rx_queue_release = octeontx_dev_rx_queue_release,
993 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
994 .pool_ops_supported = octeontx_pool_ops,
997 /* Create Ethdev interface per BGX LMAC ports */
999 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1003 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1004 struct octeontx_nic *nic = NULL;
1005 struct rte_eth_dev *eth_dev = NULL;
1006 struct rte_eth_dev_data *data;
1007 const char *name = rte_vdev_device_name(dev);
1009 PMD_INIT_FUNC_TRACE();
1011 sprintf(octtx_name, "%s_%d", name, port);
1012 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1013 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1014 if (eth_dev == NULL)
1017 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1018 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1019 rte_eth_dev_probing_finish(eth_dev);
1023 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1025 octeontx_log_err("failed to allocate nic structure");
1030 nic->port_id = port;
1033 res = octeontx_port_open(nic);
1037 /* Rx side port configuration */
1038 res = octeontx_pki_port_open(port);
1040 octeontx_log_err("failed to open PKI port %d", port);
1045 /* Reserve an ethdev entry */
1046 eth_dev = rte_eth_dev_allocate(octtx_name);
1047 if (eth_dev == NULL) {
1048 octeontx_log_err("failed to allocate rte_eth_dev");
1053 eth_dev->device = &dev->device;
1054 eth_dev->intr_handle = NULL;
1055 eth_dev->data->kdrv = RTE_KDRV_NONE;
1056 eth_dev->data->numa_node = dev->device.numa_node;
1058 data = eth_dev->data;
1059 data->dev_private = nic;
1060 data->port_id = eth_dev->data->port_id;
1065 data->dev_link.link_status = ETH_LINK_DOWN;
1066 data->dev_started = 0;
1067 data->promiscuous = 0;
1068 data->all_multicast = 0;
1069 data->scattered_rx = 0;
1071 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1073 if (data->mac_addrs == NULL) {
1074 octeontx_log_err("failed to allocate memory for mac_addrs");
1079 eth_dev->dev_ops = &octeontx_dev_ops;
1081 /* Finally save ethdev pointer to the NIC structure */
1084 if (nic->port_id != data->port_id) {
1085 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1086 data->port_id, nic->port_id);
1091 /* Update port_id mac to eth_dev */
1092 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1094 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1095 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1096 nic->port_id, nic->port_ena,
1097 nic->base_ochan, nic->num_ochans,
1098 nic->num_tx_queues);
1099 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1101 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1102 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1104 rte_eth_dev_probing_finish(eth_dev);
1105 return data->port_id;
1109 octeontx_port_close(nic);
1111 if (eth_dev != NULL) {
1112 rte_free(eth_dev->data->mac_addrs);
1115 rte_eth_dev_release_port(eth_dev);
1121 /* Un initialize octeontx device */
1123 octeontx_remove(struct rte_vdev_device *dev)
1125 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1126 struct rte_eth_dev *eth_dev = NULL;
1127 struct octeontx_nic *nic = NULL;
1133 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1134 sprintf(octtx_name, "eth_octeontx_%d", i);
1136 /* reserve an ethdev entry */
1137 eth_dev = rte_eth_dev_allocated(octtx_name);
1138 if (eth_dev == NULL)
1141 nic = octeontx_pmd_priv(eth_dev);
1142 rte_event_dev_stop(nic->evdev);
1143 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1145 rte_free(eth_dev->data->mac_addrs);
1146 rte_free(eth_dev->data->dev_private);
1147 rte_eth_dev_release_port(eth_dev);
1148 rte_event_dev_close(nic->evdev);
1151 /* Free FC resource */
1152 octeontx_pko_fc_free();
1157 /* Initialize octeontx device */
1159 octeontx_probe(struct rte_vdev_device *dev)
1161 const char *dev_name;
1162 static int probe_once;
1163 uint8_t socket_id, qlist;
1164 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1165 struct rte_event_dev_config dev_conf;
1166 const char *eventdev_name = "event_octeontx";
1167 struct rte_event_dev_info info;
1168 struct rte_eth_dev *eth_dev;
1170 struct octeontx_vdev_init_params init_params = {
1171 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1174 dev_name = rte_vdev_device_name(dev);
1176 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1177 strlen(rte_vdev_device_args(dev)) == 0) {
1178 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1180 RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name);
1183 /* TODO: request info from primary to set up Rx and Tx */
1184 eth_dev->dev_ops = &octeontx_dev_ops;
1185 rte_eth_dev_probing_finish(eth_dev);
1189 res = octeontx_parse_vdev_init_params(&init_params, dev);
1193 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1194 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1195 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1199 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1201 socket_id = rte_socket_id();
1203 tx_vfcnt = octeontx_pko_vf_count();
1205 if (tx_vfcnt < init_params.nr_port) {
1206 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1207 tx_vfcnt, init_params.nr_port);
1210 evdev = rte_event_dev_get_dev_id(eventdev_name);
1212 octeontx_log_err("eventdev %s not found", eventdev_name);
1216 res = rte_event_dev_info_get(evdev, &info);
1218 octeontx_log_err("failed to eventdev info %d", res);
1222 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1223 info.max_event_queues, info.max_event_ports);
1225 if (octeontx_pko_init_fc(tx_vfcnt))
1228 devconf_set_default_sane_values(&dev_conf, &info);
1229 res = rte_event_dev_configure(evdev, &dev_conf);
1233 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1235 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1238 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1245 * We don't poll on event ports
1246 * that do not have any queues assigned.
1250 "reducing number of active event ports to %d", pnum);
1252 for (i = 0; i < qnum; i++) {
1253 res = rte_event_queue_setup(evdev, i, NULL);
1255 octeontx_log_err("failed to setup event_q(%d): res %d",
1261 for (i = 0; i < pnum; i++) {
1262 res = rte_event_port_setup(evdev, i, NULL);
1265 octeontx_log_err("failed to setup ev port(%d) res=%d",
1269 /* Link one queue to one event port */
1271 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1274 octeontx_log_err("failed to link port (%d): res=%d",
1280 /* Create ethdev interface */
1281 for (i = 0; i < init_params.nr_port; i++) {
1282 port_id = octeontx_create(dev, i, evdev, socket_id);
1284 octeontx_log_err("failed to create device %s",
1290 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1295 octeontx_log_err("interface %s not supported", dev_name);
1296 octeontx_remove(dev);
1300 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1306 octeontx_pko_fc_free();
1310 static struct rte_vdev_driver octeontx_pmd_drv = {
1311 .probe = octeontx_probe,
1312 .remove = octeontx_remove,
1315 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1316 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1317 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");