1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
27 struct evdev_priv_data {
28 OFFLOAD_FLAGS; /*Sequence should not be changed */
29 } __rte_cache_aligned;
31 struct octeontx_vdev_init_params {
36 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
38 enum octeontx_link_speed {
39 OCTEONTX_LINK_SPEED_SGMII,
40 OCTEONTX_LINK_SPEED_XAUI,
41 OCTEONTX_LINK_SPEED_RXAUI,
42 OCTEONTX_LINK_SPEED_10G_R,
43 OCTEONTX_LINK_SPEED_40G_R,
44 OCTEONTX_LINK_SPEED_RESERVE1,
45 OCTEONTX_LINK_SPEED_QSGMII,
46 OCTEONTX_LINK_SPEED_RESERVE2
49 int otx_net_logtype_mbox;
50 int otx_net_logtype_init;
51 int otx_net_logtype_driver;
53 RTE_INIT(otx_net_init_log)
55 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
56 if (otx_net_logtype_mbox >= 0)
57 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
59 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
60 if (otx_net_logtype_init >= 0)
61 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
63 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
64 if (otx_net_logtype_driver >= 0)
65 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
68 /* Parse integer from integer argument */
70 parse_integer_arg(const char *key __rte_unused,
71 const char *value, void *extra_args)
73 int *i = (int *)extra_args;
77 octeontx_log_err("argument has to be positive.");
85 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
86 struct rte_vdev_device *dev)
88 struct rte_kvargs *kvlist = NULL;
91 static const char * const octeontx_vdev_valid_params[] = {
92 OCTEONTX_VDEV_NR_PORT_ARG,
96 const char *input_args = rte_vdev_device_args(dev);
102 kvlist = rte_kvargs_parse(input_args,
103 octeontx_vdev_valid_params);
107 ret = rte_kvargs_process(kvlist,
108 OCTEONTX_VDEV_NR_PORT_ARG,
116 rte_kvargs_free(kvlist);
121 octeontx_port_open(struct octeontx_nic *nic)
123 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
127 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
128 PMD_INIT_FUNC_TRACE();
130 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
132 octeontx_log_err("failed to open port %d", res);
136 nic->node = bgx_port_conf.node;
137 nic->port_ena = bgx_port_conf.enable;
138 nic->base_ichan = bgx_port_conf.base_chan;
139 nic->base_ochan = bgx_port_conf.base_chan;
140 nic->num_ichans = bgx_port_conf.num_chans;
141 nic->num_ochans = bgx_port_conf.num_chans;
142 nic->bgx_mtu = bgx_port_conf.mtu;
143 nic->bpen = bgx_port_conf.bpen;
144 nic->fcs_strip = bgx_port_conf.fcs_strip;
145 nic->bcast_mode = bgx_port_conf.bcast_mode;
146 nic->mcast_mode = bgx_port_conf.mcast_mode;
147 nic->speed = bgx_port_conf.mode;
149 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
152 octeontx_log_dbg("port opened %d", nic->port_id);
157 octeontx_port_close(struct octeontx_nic *nic)
159 PMD_INIT_FUNC_TRACE();
161 octeontx_bgx_port_close(nic->port_id);
162 octeontx_log_dbg("port closed %d", nic->port_id);
166 octeontx_port_start(struct octeontx_nic *nic)
168 PMD_INIT_FUNC_TRACE();
170 return octeontx_bgx_port_start(nic->port_id);
174 octeontx_port_stop(struct octeontx_nic *nic)
176 PMD_INIT_FUNC_TRACE();
178 return octeontx_bgx_port_stop(nic->port_id);
182 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
184 struct rte_eth_dev *dev;
188 PMD_INIT_FUNC_TRACE();
191 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
193 octeontx_log_err("failed to set promiscuous mode %d",
198 /* Set proper flag for the mode */
199 dev->data->promiscuous = (en != 0) ? 1 : 0;
201 octeontx_log_dbg("port %d : promiscuous mode %s",
202 nic->port_id, en ? "set" : "unset");
208 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
210 octeontx_mbox_bgx_port_stats_t bgx_stats;
213 PMD_INIT_FUNC_TRACE();
215 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
217 octeontx_log_err("failed to get port stats %d", nic->port_id);
221 stats->ipackets = bgx_stats.rx_packets;
222 stats->ibytes = bgx_stats.rx_bytes;
223 stats->imissed = bgx_stats.rx_dropped;
224 stats->ierrors = bgx_stats.rx_errors;
225 stats->opackets = bgx_stats.tx_packets;
226 stats->obytes = bgx_stats.tx_bytes;
227 stats->oerrors = bgx_stats.tx_errors;
229 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
230 nic->port_id, stats->ipackets, stats->opackets);
236 octeontx_port_stats_clr(struct octeontx_nic *nic)
238 PMD_INIT_FUNC_TRACE();
240 return octeontx_bgx_port_stats_clr(nic->port_id);
244 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
245 struct rte_event_dev_info *info)
247 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
248 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
250 dev_conf->nb_event_ports = info->max_event_ports;
251 dev_conf->nb_event_queues = info->max_event_queues;
253 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
254 dev_conf->nb_event_port_dequeue_depth =
255 info->max_event_port_dequeue_depth;
256 dev_conf->nb_event_port_enqueue_depth =
257 info->max_event_port_enqueue_depth;
258 dev_conf->nb_event_port_enqueue_depth =
259 info->max_event_port_enqueue_depth;
260 dev_conf->nb_events_limit =
261 info->max_num_events;
265 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
267 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
270 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
271 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
273 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
274 flags |= OCCTX_TX_MULTI_SEG_F;
280 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
282 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
283 struct rte_eth_dev_data *data = eth_dev->data;
284 struct rte_eth_conf *conf = &data->dev_conf;
285 struct rte_eth_rxmode *rxmode = &conf->rxmode;
288 if (rxmode->mq_mode == ETH_MQ_RX_RSS)
289 flags |= OCCTX_RX_OFFLOAD_RSS_F;
291 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
292 flags |= OCCTX_RX_MULTI_SEG_F;
293 eth_dev->data->scattered_rx = 1;
294 /* If scatter mode is enabled, TX should also be in multi
295 * seg mode, else memory leak will occur
297 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
304 octeontx_dev_configure(struct rte_eth_dev *dev)
306 struct rte_eth_dev_data *data = dev->data;
307 struct rte_eth_conf *conf = &data->dev_conf;
308 struct rte_eth_rxmode *rxmode = &conf->rxmode;
309 struct rte_eth_txmode *txmode = &conf->txmode;
310 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
313 PMD_INIT_FUNC_TRACE();
316 if (!rte_eal_has_hugepages()) {
317 octeontx_log_err("huge page is not configured");
321 if (txmode->mq_mode) {
322 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
326 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
327 rxmode->mq_mode != ETH_MQ_RX_RSS) {
328 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
332 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
333 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
334 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
337 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
338 octeontx_log_err("setting link speed/duplex not supported");
342 if (conf->dcb_capability_en) {
343 octeontx_log_err("DCB enable not supported");
347 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
348 octeontx_log_err("flow director not supported");
352 nic->num_tx_queues = dev->data->nb_tx_queues;
354 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
358 octeontx_log_err("failed to open channel %d no-of-txq %d",
359 nic->base_ochan, nic->num_tx_queues);
363 ret = octeontx_dev_vlan_offload_init(dev);
365 octeontx_log_err("failed to initialize vlan offload");
369 nic->pki.classifier_enable = false;
370 nic->pki.hash_enable = true;
371 nic->pki.initialized = false;
373 nic->rx_offloads |= rxmode->offloads;
374 nic->tx_offloads |= txmode->offloads;
375 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
376 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
382 octeontx_dev_close(struct rte_eth_dev *dev)
384 struct octeontx_txq *txq = NULL;
385 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
389 PMD_INIT_FUNC_TRACE();
391 rte_event_dev_close(nic->evdev);
393 octeontx_dev_vlan_offload_fini(dev);
395 ret = octeontx_pko_channel_close(nic->base_ochan);
397 octeontx_log_err("failed to close channel %d VF%d %d %d",
398 nic->base_ochan, nic->port_id, nic->num_tx_queues,
401 /* Free txq resources for this port */
402 for (i = 0; i < nic->num_tx_queues; i++) {
403 txq = dev->data->tx_queues[i];
410 /* Free MAC address table */
411 rte_free(dev->data->mac_addrs);
412 dev->data->mac_addrs = NULL;
414 dev->tx_pkt_burst = NULL;
415 dev->rx_pkt_burst = NULL;
419 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
421 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
422 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
423 struct rte_eth_dev_data *data = eth_dev->data;
426 /* Check if MTU is within the allowed range */
427 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)
430 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
432 /* Refuse MTU that requires the support of scattered packets
433 * when this feature has not been enabled before.
435 if (data->dev_started && frame_size > buffsz &&
436 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {
437 octeontx_log_err("Scatter mode is disabled");
441 /* Check <seg size> * <max_seg> >= max_frame */
442 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
443 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
446 rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
450 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
454 if (frame_size > RTE_ETHER_MAX_LEN)
455 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
457 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
459 /* Update max_rx_pkt_len */
460 data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
461 octeontx_log_info("Received pkt beyond maxlen %d will be dropped",
468 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
470 struct rte_eth_dev *eth_dev = rxq->eth_dev;
471 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
472 struct rte_eth_dev_data *data = eth_dev->data;
473 struct rte_pktmbuf_pool_private *mbp_priv;
474 struct evdev_priv_data *evdev_priv;
475 struct rte_eventdev *dev;
478 /* Get rx buffer size */
479 mbp_priv = rte_mempool_get_priv(rxq->pool);
480 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
482 /* Setup scatter mode if needed by jumbo */
483 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
484 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
485 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
486 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
489 /* Sharing offload flags via eventdev priv region */
490 dev = &rte_eventdevs[rxq->evdev];
491 evdev_priv = dev->data->dev_private;
492 evdev_priv->rx_offload_flags = nic->rx_offload_flags;
493 evdev_priv->tx_offload_flags = nic->tx_offload_flags;
495 /* Setup MTU based on max_rx_pkt_len */
496 nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;
502 octeontx_dev_start(struct rte_eth_dev *dev)
504 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
505 struct octeontx_rxq *rxq;
508 PMD_INIT_FUNC_TRACE();
509 /* Rechecking if any new offload set to update
510 * rx/tx burst function pointer accordingly.
512 for (i = 0; i < dev->data->nb_rx_queues; i++) {
513 rxq = dev->data->rx_queues[i];
514 octeontx_recheck_rx_offloads(rxq);
517 /* Setting up the mtu based on max_rx_pkt_len */
518 ret = octeontx_dev_mtu_set(dev, nic->mtu);
520 octeontx_log_err("Failed to set default MTU size %d", ret);
527 octeontx_set_tx_function(dev);
528 ret = octeontx_pko_channel_start(nic->base_ochan);
530 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
531 nic->port_id, nic->num_tx_queues, nic->base_ochan,
539 dev->rx_pkt_burst = octeontx_recv_pkts;
540 ret = octeontx_pki_port_start(nic->port_id);
542 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
543 goto channel_stop_error;
549 ret = octeontx_port_start(nic);
551 octeontx_log_err("failed start port %d", ret);
552 goto pki_port_stop_error;
555 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
556 nic->base_ochan, nic->num_tx_queues, nic->port_id);
558 ret = rte_event_dev_start(nic->evdev);
560 octeontx_log_err("failed to start evdev: ret (%d)", ret);
561 goto pki_port_stop_error;
568 octeontx_pki_port_stop(nic->port_id);
570 octeontx_pko_channel_stop(nic->base_ochan);
576 octeontx_dev_stop(struct rte_eth_dev *dev)
578 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
581 PMD_INIT_FUNC_TRACE();
583 rte_event_dev_stop(nic->evdev);
585 ret = octeontx_port_stop(nic);
587 octeontx_log_err("failed to req stop port %d res=%d",
592 ret = octeontx_pki_port_stop(nic->port_id);
594 octeontx_log_err("failed to stop pki port %d res=%d",
599 ret = octeontx_pko_channel_stop(nic->base_ochan);
601 octeontx_log_err("failed to stop channel %d VF%d %d %d",
602 nic->base_ochan, nic->port_id, nic->num_tx_queues,
609 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
611 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
613 PMD_INIT_FUNC_TRACE();
614 return octeontx_port_promisc_set(nic, 1);
618 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
620 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
622 PMD_INIT_FUNC_TRACE();
623 return octeontx_port_promisc_set(nic, 0);
627 octeontx_port_link_status(struct octeontx_nic *nic)
631 PMD_INIT_FUNC_TRACE();
632 res = octeontx_bgx_port_link_status(nic->port_id);
634 octeontx_log_err("failed to get port %d link status",
639 nic->link_up = (uint8_t)res;
640 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
646 * Return 0 means link status changed, -1 means not changed
649 octeontx_dev_link_update(struct rte_eth_dev *dev,
650 int wait_to_complete __rte_unused)
652 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
653 struct rte_eth_link link;
656 PMD_INIT_FUNC_TRACE();
658 res = octeontx_port_link_status(nic);
660 octeontx_log_err("failed to request link status %d", res);
664 link.link_status = nic->link_up;
666 switch (nic->speed) {
667 case OCTEONTX_LINK_SPEED_SGMII:
668 link.link_speed = ETH_SPEED_NUM_1G;
671 case OCTEONTX_LINK_SPEED_XAUI:
672 link.link_speed = ETH_SPEED_NUM_10G;
675 case OCTEONTX_LINK_SPEED_RXAUI:
676 case OCTEONTX_LINK_SPEED_10G_R:
677 link.link_speed = ETH_SPEED_NUM_10G;
679 case OCTEONTX_LINK_SPEED_QSGMII:
680 link.link_speed = ETH_SPEED_NUM_5G;
682 case OCTEONTX_LINK_SPEED_40G_R:
683 link.link_speed = ETH_SPEED_NUM_40G;
686 case OCTEONTX_LINK_SPEED_RESERVE1:
687 case OCTEONTX_LINK_SPEED_RESERVE2:
689 link.link_speed = ETH_SPEED_NUM_NONE;
690 octeontx_log_err("incorrect link speed %d", nic->speed);
694 link.link_duplex = ETH_LINK_FULL_DUPLEX;
695 link.link_autoneg = ETH_LINK_AUTONEG;
697 return rte_eth_linkstatus_set(dev, &link);
701 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
703 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
705 PMD_INIT_FUNC_TRACE();
706 return octeontx_port_stats(nic, stats);
710 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
712 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
714 PMD_INIT_FUNC_TRACE();
715 return octeontx_port_stats_clr(nic);
719 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
721 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
724 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
726 octeontx_log_err("failed to del MAC address filter on port %d",
731 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
732 struct rte_ether_addr *mac_addr,
734 __rte_unused uint32_t vmdq)
736 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
739 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
742 octeontx_log_err("failed to add MAC address filter on port %d",
751 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
752 struct rte_ether_addr *addr)
754 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
757 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
759 /* Update same mac address to BGX CAM table */
760 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
764 octeontx_log_err("failed to set MAC address on port %d",
772 octeontx_dev_info(struct rte_eth_dev *dev,
773 struct rte_eth_dev_info *dev_info)
775 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
777 /* Autonegotiation may be disabled */
778 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
779 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
780 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
783 /* Min/Max MTU supported */
784 dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
785 dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
786 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
787 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
789 dev_info->max_mac_addrs =
790 octeontx_bgx_port_mac_entries_get(nic->port_id);
791 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
792 dev_info->max_rx_queues = 1;
793 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
794 dev_info->min_rx_bufsize = 0;
796 dev_info->default_rxconf = (struct rte_eth_rxconf) {
799 .offloads = OCTEONTX_RX_OFFLOADS,
802 dev_info->default_txconf = (struct rte_eth_txconf) {
804 .offloads = OCTEONTX_TX_OFFLOADS,
807 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
808 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
809 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
810 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
816 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
818 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
819 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
820 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
824 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
827 struct octeontx_txq *txq;
830 PMD_INIT_FUNC_TRACE();
832 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
835 txq = dev->data->tx_queues[qidx];
837 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
839 sizeof(octeontx_dq_t),
841 octeontx_dq_info_getter);
847 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
851 (void)octeontx_port_stop(nic);
852 octeontx_pko_channel_stop(nic->base_ochan);
853 octeontx_pko_channel_close(nic->base_ochan);
854 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
859 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
861 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
863 PMD_INIT_FUNC_TRACE();
864 qidx = qidx % PKO_VF_NUM_DQ;
865 return octeontx_vf_start_tx_queue(dev, nic, qidx);
869 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
875 PMD_INIT_FUNC_TRACE();
877 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
880 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
885 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
887 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
889 PMD_INIT_FUNC_TRACE();
890 qidx = qidx % PKO_VF_NUM_DQ;
892 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
896 octeontx_dev_tx_queue_release(void *tx_queue)
898 struct octeontx_txq *txq = tx_queue;
901 PMD_INIT_FUNC_TRACE();
904 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
906 octeontx_log_err("failed stop tx_queue(%d)\n",
914 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
915 uint16_t nb_desc, unsigned int socket_id,
916 const struct rte_eth_txconf *tx_conf __rte_unused)
918 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
919 struct octeontx_txq *txq = NULL;
923 RTE_SET_USED(nb_desc);
924 RTE_SET_USED(socket_id);
926 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
928 /* Socket id check */
929 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
930 socket_id != (unsigned int)nic->node)
931 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
932 socket_id, nic->node);
934 /* Free memory prior to re-allocation if needed. */
935 if (dev->data->tx_queues[qidx] != NULL) {
936 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
938 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
939 dev->data->tx_queues[qidx] = NULL;
942 /* Allocating tx queue data structure */
943 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
944 RTE_CACHE_LINE_SIZE, nic->node);
946 octeontx_log_err("failed to allocate txq=%d", qidx);
952 txq->queue_id = dq_num;
953 dev->data->tx_queues[qidx] = txq;
954 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
956 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
958 sizeof(octeontx_dq_t),
960 octeontx_dq_info_getter);
966 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
967 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
969 txq->dq.fc_status_va);
981 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
982 uint16_t nb_desc, unsigned int socket_id,
983 const struct rte_eth_rxconf *rx_conf,
984 struct rte_mempool *mb_pool)
986 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
987 struct rte_mempool_ops *mp_ops = NULL;
988 struct octeontx_rxq *rxq = NULL;
989 pki_pktbuf_cfg_t pktbuf_conf;
990 pki_hash_cfg_t pki_hash;
991 pki_qos_cfg_t pki_qos;
995 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
996 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
998 RTE_SET_USED(nb_desc);
1000 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
1001 memset(&pki_hash, 0, sizeof(pki_hash));
1002 memset(&pki_qos, 0, sizeof(pki_qos));
1004 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
1005 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
1006 octeontx_log_err("failed to find octeontx_fpavf mempool");
1010 /* Handle forbidden configurations */
1011 if (nic->pki.classifier_enable) {
1012 octeontx_log_err("cannot setup queue %d. "
1013 "Classifier option unsupported", qidx);
1017 port = nic->port_id;
1019 /* Rx deferred start is not supported */
1020 if (rx_conf->rx_deferred_start) {
1021 octeontx_log_err("rx deferred start not supported");
1025 /* Verify queue index */
1026 if (qidx >= dev->data->nb_rx_queues) {
1027 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
1028 qidx, (dev->data->nb_rx_queues - 1));
1032 /* Socket id check */
1033 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1034 socket_id != (unsigned int)nic->node)
1035 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1036 socket_id, nic->node);
1038 /* Allocating rx queue data structure */
1039 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1040 RTE_CACHE_LINE_SIZE, nic->node);
1042 octeontx_log_err("failed to allocate rxq=%d", qidx);
1046 if (!nic->pki.initialized) {
1047 pktbuf_conf.port_type = 0;
1048 pki_hash.port_type = 0;
1049 pki_qos.port_type = 0;
1051 pktbuf_conf.mmask.f_wqe_skip = 1;
1052 pktbuf_conf.mmask.f_first_skip = 1;
1053 pktbuf_conf.mmask.f_later_skip = 1;
1054 pktbuf_conf.mmask.f_mbuff_size = 1;
1055 pktbuf_conf.mmask.f_cache_mode = 1;
1057 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1058 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1059 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1060 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1061 RTE_PKTMBUF_HEADROOM -
1062 rte_pktmbuf_priv_size(mb_pool) -
1063 sizeof(struct rte_mbuf));
1065 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1067 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1069 octeontx_log_err("fail to configure pktbuf for port %d",
1074 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1075 "\tmbuf_size:\t0x%0x\n"
1076 "\twqe_skip:\t0x%0x\n"
1077 "\tfirst_skip:\t0x%0x\n"
1078 "\tlater_skip:\t0x%0x\n"
1079 "\tcache_mode:\t%s\n",
1081 pktbuf_conf.mbuff_size,
1082 pktbuf_conf.wqe_skip,
1083 pktbuf_conf.first_skip,
1084 pktbuf_conf.later_skip,
1085 (pktbuf_conf.cache_mode ==
1088 (pktbuf_conf.cache_mode ==
1091 (pktbuf_conf.cache_mode ==
1092 PKI_OPC_MODE_STF1_STT) ?
1093 "STF1_STT" : "STF2_STT");
1095 if (nic->pki.hash_enable) {
1096 pki_hash.tag_dlc = 1;
1097 pki_hash.tag_slc = 1;
1098 pki_hash.tag_dlf = 1;
1099 pki_hash.tag_slf = 1;
1100 pki_hash.tag_prt = 1;
1101 octeontx_pki_port_hash_config(port, &pki_hash);
1104 pool = (uintptr_t)mb_pool->pool_id;
1106 /* Get the gaura Id */
1107 gaura = octeontx_fpa_bufpool_gaura(pool);
1109 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1110 pki_qos.num_entry = 1;
1111 pki_qos.drop_policy = 0;
1112 pki_qos.tag_type = 0L;
1113 pki_qos.qos_entry[0].port_add = 0;
1114 pki_qos.qos_entry[0].gaura = gaura;
1115 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1116 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1117 pki_qos.qos_entry[0].grptag_bad = 0;
1118 pki_qos.qos_entry[0].grptag_ok = 0;
1120 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1122 octeontx_log_err("failed to create QOS port=%d, q=%d",
1127 nic->pki.initialized = true;
1130 rxq->port_id = nic->port_id;
1132 rxq->queue_id = qidx;
1133 rxq->evdev = nic->evdev;
1134 rxq->ev_queues = ev_queues;
1135 rxq->ev_ports = ev_ports;
1136 rxq->pool = mb_pool;
1138 octeontx_recheck_rx_offloads(rxq);
1139 dev->data->rx_queues[qidx] = rxq;
1140 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1145 octeontx_dev_rx_queue_release(void *rxq)
1150 static const uint32_t *
1151 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1153 static const uint32_t ptypes[] = {
1155 RTE_PTYPE_L3_IPV4_EXT,
1157 RTE_PTYPE_L3_IPV6_EXT,
1164 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1171 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1175 if (!strcmp(pool, "octeontx_fpavf"))
1181 /* Initialize and register driver with DPDK Application */
1182 static const struct eth_dev_ops octeontx_dev_ops = {
1183 .dev_configure = octeontx_dev_configure,
1184 .dev_infos_get = octeontx_dev_info,
1185 .dev_close = octeontx_dev_close,
1186 .dev_start = octeontx_dev_start,
1187 .dev_stop = octeontx_dev_stop,
1188 .promiscuous_enable = octeontx_dev_promisc_enable,
1189 .promiscuous_disable = octeontx_dev_promisc_disable,
1190 .link_update = octeontx_dev_link_update,
1191 .stats_get = octeontx_dev_stats_get,
1192 .stats_reset = octeontx_dev_stats_reset,
1193 .mac_addr_remove = octeontx_dev_mac_addr_del,
1194 .mac_addr_add = octeontx_dev_mac_addr_add,
1195 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1196 .vlan_offload_set = octeontx_dev_vlan_offload_set,
1197 .vlan_filter_set = octeontx_dev_vlan_filter_set,
1198 .tx_queue_start = octeontx_dev_tx_queue_start,
1199 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1200 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1201 .tx_queue_release = octeontx_dev_tx_queue_release,
1202 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1203 .rx_queue_release = octeontx_dev_rx_queue_release,
1204 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1205 .mtu_set = octeontx_dev_mtu_set,
1206 .pool_ops_supported = octeontx_pool_ops,
1209 /* Create Ethdev interface per BGX LMAC ports */
1211 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1216 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1217 struct octeontx_nic *nic = NULL;
1218 struct rte_eth_dev *eth_dev = NULL;
1219 struct rte_eth_dev_data *data;
1220 const char *name = rte_vdev_device_name(dev);
1223 PMD_INIT_FUNC_TRACE();
1225 sprintf(octtx_name, "%s_%d", name, port);
1226 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1227 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1228 if (eth_dev == NULL)
1231 eth_dev->dev_ops = &octeontx_dev_ops;
1232 eth_dev->device = &dev->device;
1233 octeontx_set_tx_function(eth_dev);
1234 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1235 rte_eth_dev_probing_finish(eth_dev);
1239 /* Reserve an ethdev entry */
1240 eth_dev = rte_eth_dev_allocate(octtx_name);
1241 if (eth_dev == NULL) {
1242 octeontx_log_err("failed to allocate rte_eth_dev");
1246 data = eth_dev->data;
1248 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1250 octeontx_log_err("failed to allocate nic structure");
1254 data->dev_private = nic;
1255 pko_vfid = octeontx_pko_get_vfid();
1257 if (pko_vfid == SIZE_MAX) {
1258 octeontx_log_err("failed to get pko vfid");
1263 nic->pko_vfid = pko_vfid;
1264 nic->port_id = port;
1267 res = octeontx_port_open(nic);
1271 /* Rx side port configuration */
1272 res = octeontx_pki_port_open(port);
1274 octeontx_log_err("failed to open PKI port %d", port);
1279 eth_dev->device = &dev->device;
1280 eth_dev->intr_handle = NULL;
1281 eth_dev->data->kdrv = RTE_KDRV_NONE;
1282 eth_dev->data->numa_node = dev->device.numa_node;
1284 data->port_id = eth_dev->data->port_id;
1289 data->dev_link.link_status = ETH_LINK_DOWN;
1290 data->dev_started = 0;
1291 data->promiscuous = 0;
1292 data->all_multicast = 0;
1293 data->scattered_rx = 0;
1295 /* Get maximum number of supported MAC entries */
1296 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1297 if (max_entries < 0) {
1298 octeontx_log_err("Failed to get max entries for mac addr");
1303 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1304 RTE_ETHER_ADDR_LEN, 0,
1306 if (data->mac_addrs == NULL) {
1307 octeontx_log_err("failed to allocate memory for mac_addrs");
1312 eth_dev->dev_ops = &octeontx_dev_ops;
1314 /* Finally save ethdev pointer to the NIC structure */
1317 if (nic->port_id != data->port_id) {
1318 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1319 data->port_id, nic->port_id);
1321 goto free_mac_addrs;
1324 /* Update port_id mac to eth_dev */
1325 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1327 /* Update same mac address to BGX CAM table at index 0 */
1328 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1330 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1331 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1332 nic->port_id, nic->port_ena,
1333 nic->base_ochan, nic->num_ochans,
1334 nic->num_tx_queues);
1335 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1337 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1338 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1340 rte_eth_dev_probing_finish(eth_dev);
1341 return data->port_id;
1344 rte_free(data->mac_addrs);
1347 octeontx_port_close(nic);
1349 rte_eth_dev_release_port(eth_dev);
1354 /* Un initialize octeontx device */
1356 octeontx_remove(struct rte_vdev_device *dev)
1358 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1359 struct rte_eth_dev *eth_dev = NULL;
1360 struct octeontx_nic *nic = NULL;
1366 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1367 sprintf(octtx_name, "eth_octeontx_%d", i);
1369 /* reserve an ethdev entry */
1370 eth_dev = rte_eth_dev_allocated(octtx_name);
1371 if (eth_dev == NULL)
1374 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1375 rte_eth_dev_release_port(eth_dev);
1379 nic = octeontx_pmd_priv(eth_dev);
1380 rte_event_dev_stop(nic->evdev);
1381 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1383 rte_eth_dev_release_port(eth_dev);
1384 rte_event_dev_close(nic->evdev);
1387 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1390 /* Free FC resource */
1391 octeontx_pko_fc_free();
1396 /* Initialize octeontx device */
1398 octeontx_probe(struct rte_vdev_device *dev)
1400 const char *dev_name;
1401 static int probe_once;
1402 uint8_t socket_id, qlist;
1403 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1404 struct rte_event_dev_config dev_conf;
1405 const char *eventdev_name = "event_octeontx";
1406 struct rte_event_dev_info info;
1407 struct rte_eth_dev *eth_dev;
1409 struct octeontx_vdev_init_params init_params = {
1410 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1413 dev_name = rte_vdev_device_name(dev);
1415 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1416 strlen(rte_vdev_device_args(dev)) == 0) {
1417 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1419 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1422 /* TODO: request info from primary to set up Rx and Tx */
1423 eth_dev->dev_ops = &octeontx_dev_ops;
1424 eth_dev->device = &dev->device;
1425 rte_eth_dev_probing_finish(eth_dev);
1429 res = octeontx_parse_vdev_init_params(&init_params, dev);
1433 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1434 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1435 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1439 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1441 socket_id = rte_socket_id();
1443 tx_vfcnt = octeontx_pko_vf_count();
1445 if (tx_vfcnt < init_params.nr_port) {
1446 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1447 tx_vfcnt, init_params.nr_port);
1450 evdev = rte_event_dev_get_dev_id(eventdev_name);
1452 octeontx_log_err("eventdev %s not found", eventdev_name);
1456 res = rte_event_dev_info_get(evdev, &info);
1458 octeontx_log_err("failed to eventdev info %d", res);
1462 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1463 info.max_event_queues, info.max_event_ports);
1465 if (octeontx_pko_init_fc(tx_vfcnt))
1468 devconf_set_default_sane_values(&dev_conf, &info);
1469 res = rte_event_dev_configure(evdev, &dev_conf);
1473 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1475 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1478 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1484 /* Enable all queues available */
1485 for (i = 0; i < qnum; i++) {
1486 res = rte_event_queue_setup(evdev, i, NULL);
1488 octeontx_log_err("failed to setup event_q(%d): res %d",
1494 /* Enable all ports available */
1495 for (i = 0; i < pnum; i++) {
1496 res = rte_event_port_setup(evdev, i, NULL);
1499 octeontx_log_err("failed to setup ev port(%d) res=%d",
1506 * Do 1:1 links for ports & queues. All queues would be mapped to
1507 * one port. If there are more ports than queues, then some ports
1508 * won't be linked to any queue.
1510 for (i = 0; i < qnum; i++) {
1511 /* Link one queue to one event port */
1513 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1516 octeontx_log_err("failed to link port (%d): res=%d",
1522 /* Create ethdev interface */
1523 for (i = 0; i < init_params.nr_port; i++) {
1524 port_id = octeontx_create(dev, i, evdev, socket_id);
1526 octeontx_log_err("failed to create device %s",
1532 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1537 octeontx_log_err("interface %s not supported", dev_name);
1538 octeontx_remove(dev);
1542 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1548 octeontx_pko_fc_free();
1552 static struct rte_vdev_driver octeontx_pmd_drv = {
1553 .probe = octeontx_probe,
1554 .remove = octeontx_remove,
1557 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1558 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1559 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");