drivers/net/octeontx/octeontx_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Cavium, Inc
   3  */
   4
   5 #include <stdio.h>
   6 #include <stdarg.h>
   7 #include <stdbool.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11
  12 #include <rte_alarm.h>
  13 #include <rte_branch_prediction.h>
  14 #include <rte_bus_vdev.h>
  15 #include <rte_cycles.h>
  16 #include <rte_debug.h>
  17 #include <rte_devargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_kvargs.h>
  20 #include <rte_malloc.h>
  21 #include <rte_mbuf_pool_ops.h>
  22 #include <rte_prefetch.h>
  23
  24 #include "octeontx_ethdev.h"
  25 #include "octeontx_rxtx.h"
  26 #include "octeontx_logs.h"
  27
  28 struct evdev_priv_data {
  29         OFFLOAD_FLAGS; /*Sequence should not be changed */
  30 } __rte_cache_aligned;
  31
  32 struct octeontx_vdev_init_params {
  33         uint8_t nr_port;
  34 };
  35
  36 uint16_t
  37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
  38
  39 enum octeontx_link_speed {
  40         OCTEONTX_LINK_SPEED_SGMII,
  41         OCTEONTX_LINK_SPEED_XAUI,
  42         OCTEONTX_LINK_SPEED_RXAUI,
  43         OCTEONTX_LINK_SPEED_10G_R,
  44         OCTEONTX_LINK_SPEED_40G_R,
  45         OCTEONTX_LINK_SPEED_RESERVE1,
  46         OCTEONTX_LINK_SPEED_QSGMII,
  47         OCTEONTX_LINK_SPEED_RESERVE2
  48 };
  49
  50 RTE_LOG_REGISTER(otx_net_logtype_mbox, pmd.net.octeontx.mbox, NOTICE);
  51 RTE_LOG_REGISTER(otx_net_logtype_init, pmd.net.octeontx.init, NOTICE);
  52 RTE_LOG_REGISTER(otx_net_logtype_driver, pmd.net.octeontx.driver, NOTICE);
  53
  54 /* Parse integer from integer argument */
  55 static int
  56 parse_integer_arg(const char *key __rte_unused,
  57                 const char *value, void *extra_args)
  58 {
  59         int *i = (int *)extra_args;
  60
  61         *i = atoi(value);
  62         if (*i < 0) {
  63                 octeontx_log_err("argument has to be positive.");
  64                 return -1;
  65         }
  66
  67         return 0;
  68 }
  69
  70 static int
  71 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
  72                                 struct rte_vdev_device *dev)
  73 {
  74         struct rte_kvargs *kvlist = NULL;
  75         int ret = 0;
  76
  77         static const char * const octeontx_vdev_valid_params[] = {
  78                 OCTEONTX_VDEV_NR_PORT_ARG,
  79                 NULL
  80         };
  81
  82         const char *input_args = rte_vdev_device_args(dev);
  83         if (params == NULL)
  84                 return -EINVAL;
  85
  86
  87         if (input_args) {
  88                 kvlist = rte_kvargs_parse(input_args,
  89                                 octeontx_vdev_valid_params);
  90                 if (kvlist == NULL)
  91                         return -1;
  92
  93                 ret = rte_kvargs_process(kvlist,
  94                                         OCTEONTX_VDEV_NR_PORT_ARG,
  95                                         &parse_integer_arg,
  96                                         &params->nr_port);
  97                 if (ret < 0)
  98                         goto free_kvlist;
  99         }
 100
 101 free_kvlist:
 102         rte_kvargs_free(kvlist);
 103         return ret;
 104 }
 105
 106 static int
 107 octeontx_port_open(struct octeontx_nic *nic)
 108 {
 109         octeontx_mbox_bgx_port_conf_t bgx_port_conf;
 110         octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg;
 111         int res;
 112
 113         res = 0;
 114         memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
 115         PMD_INIT_FUNC_TRACE();
 116
 117         res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
 118         if (res < 0) {
 119                 octeontx_log_err("failed to open port %d", res);
 120                 return res;
 121         }
 122
 123         nic->node = bgx_port_conf.node;
 124         nic->port_ena = bgx_port_conf.enable;
 125         nic->base_ichan = bgx_port_conf.base_chan;
 126         nic->base_ochan = bgx_port_conf.base_chan;
 127         nic->num_ichans = bgx_port_conf.num_chans;
 128         nic->num_ochans = bgx_port_conf.num_chans;
 129         nic->bgx_mtu = bgx_port_conf.mtu;
 130         nic->bpen = bgx_port_conf.bpen;
 131         nic->fcs_strip = bgx_port_conf.fcs_strip;
 132         nic->bcast_mode = bgx_port_conf.bcast_mode;
 133         nic->mcast_mode = bgx_port_conf.mcast_mode;
 134         nic->speed      = bgx_port_conf.mode;
 135
 136         memset(&fifo_cfg, 0x0, sizeof(fifo_cfg));
 137
 138         res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg);
 139         if (res < 0) {
 140                 octeontx_log_err("failed to get port %d fifo cfg", res);
 141                 return res;
 142         }
 143
 144         nic->fc.rx_fifosz = fifo_cfg.rx_fifosz;
 145
 146         memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
 147                 RTE_ETHER_ADDR_LEN);
 148
 149         octeontx_log_dbg("port opened %d", nic->port_id);
 150         return res;
 151 }
 152
 153 static void
 154 octeontx_link_status_print(struct rte_eth_dev *eth_dev,
 155                            struct rte_eth_link *link)
 156 {
 157         if (link && link->link_status)
 158                 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s",
 159                           (eth_dev->data->port_id),
 160                           link->link_speed,
 161                           link->link_duplex == ETH_LINK_FULL_DUPLEX ?
 162                           "full-duplex" : "half-duplex");
 163         else
 164                 octeontx_log_info("Port %d: Link Down",
 165                                   (int)(eth_dev->data->port_id));
 166 }
 167
 168 static void
 169 octeontx_link_status_update(struct octeontx_nic *nic,
 170                          struct rte_eth_link *link)
 171 {
 172         memset(link, 0, sizeof(*link));
 173
 174         link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 175
 176         switch (nic->speed) {
 177         case OCTEONTX_LINK_SPEED_SGMII:
 178                 link->link_speed = ETH_SPEED_NUM_1G;
 179                 break;
 180
 181         case OCTEONTX_LINK_SPEED_XAUI:
 182                 link->link_speed = ETH_SPEED_NUM_10G;
 183                 break;
 184
 185         case OCTEONTX_LINK_SPEED_RXAUI:
 186         case OCTEONTX_LINK_SPEED_10G_R:
 187                 link->link_speed = ETH_SPEED_NUM_10G;
 188                 break;
 189         case OCTEONTX_LINK_SPEED_QSGMII:
 190                 link->link_speed = ETH_SPEED_NUM_5G;
 191                 break;
 192         case OCTEONTX_LINK_SPEED_40G_R:
 193                 link->link_speed = ETH_SPEED_NUM_40G;
 194                 break;
 195
 196         case OCTEONTX_LINK_SPEED_RESERVE1:
 197         case OCTEONTX_LINK_SPEED_RESERVE2:
 198         default:
 199                 link->link_speed = ETH_SPEED_NUM_NONE;
 200                 octeontx_log_err("incorrect link speed %d", nic->speed);
 201                 break;
 202         }
 203
 204         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 205         link->link_autoneg = ETH_LINK_AUTONEG;
 206 }
 207
 208 static void
 209 octeontx_link_status_poll(void *arg)
 210 {
 211         struct octeontx_nic *nic = arg;
 212         struct rte_eth_link link;
 213         struct rte_eth_dev *dev;
 214         int res;
 215
 216         PMD_INIT_FUNC_TRACE();
 217
 218         dev = nic->dev;
 219
 220         res = octeontx_bgx_port_link_status(nic->port_id);
 221         if (res < 0) {
 222                 octeontx_log_err("Failed to get port %d link status",
 223                                 nic->port_id);
 224         } else {
 225                 if (nic->link_up != (uint8_t)res) {
 226                         nic->link_up = (uint8_t)res;
 227                         octeontx_link_status_update(nic, &link);
 228                         octeontx_link_status_print(dev, &link);
 229                         rte_eth_linkstatus_set(dev, &link);
 230                         _rte_eth_dev_callback_process(dev,
 231                                                       RTE_ETH_EVENT_INTR_LSC,
 232                                                       NULL);
 233                 }
 234         }
 235
 236         res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
 237                                 octeontx_link_status_poll, nic);
 238         if (res < 0)
 239                 octeontx_log_err("Failed to restart alarm for port %d, err: %d",
 240                                 nic->port_id, res);
 241 }
 242
 243 static void
 244 octeontx_port_close(struct octeontx_nic *nic)
 245 {
 246         PMD_INIT_FUNC_TRACE();
 247
 248         rte_eal_alarm_cancel(octeontx_link_status_poll, nic);
 249         octeontx_bgx_port_close(nic->port_id);
 250         octeontx_log_dbg("port closed %d", nic->port_id);
 251 }
 252
 253 static int
 254 octeontx_port_start(struct octeontx_nic *nic)
 255 {
 256         PMD_INIT_FUNC_TRACE();
 257
 258         return octeontx_bgx_port_start(nic->port_id);
 259 }
 260
 261 static int
 262 octeontx_port_stop(struct octeontx_nic *nic)
 263 {
 264         PMD_INIT_FUNC_TRACE();
 265
 266         return octeontx_bgx_port_stop(nic->port_id);
 267 }
 268
 269 static int
 270 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
 271 {
 272         struct rte_eth_dev *dev;
 273         int res;
 274
 275         res = 0;
 276         PMD_INIT_FUNC_TRACE();
 277         dev = nic->dev;
 278
 279         res = octeontx_bgx_port_promisc_set(nic->port_id, en);
 280         if (res < 0) {
 281                 octeontx_log_err("failed to set promiscuous mode %d",
 282                                 nic->port_id);
 283                 return res;
 284         }
 285
 286         /* Set proper flag for the mode */
 287         dev->data->promiscuous = (en != 0) ? 1 : 0;
 288
 289         octeontx_log_dbg("port %d : promiscuous mode %s",
 290                         nic->port_id, en ? "set" : "unset");
 291
 292         return 0;
 293 }
 294
 295 static int
 296 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
 297 {
 298         octeontx_mbox_bgx_port_stats_t bgx_stats;
 299         int res;
 300
 301         PMD_INIT_FUNC_TRACE();
 302
 303         res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
 304         if (res < 0) {
 305                 octeontx_log_err("failed to get port stats %d", nic->port_id);
 306                 return res;
 307         }
 308
 309         stats->ipackets = bgx_stats.rx_packets;
 310         stats->ibytes = bgx_stats.rx_bytes;
 311         stats->imissed = bgx_stats.rx_dropped;
 312         stats->ierrors = bgx_stats.rx_errors;
 313         stats->opackets = bgx_stats.tx_packets;
 314         stats->obytes = bgx_stats.tx_bytes;
 315         stats->oerrors = bgx_stats.tx_errors;
 316
 317         octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
 318                         nic->port_id, stats->ipackets, stats->opackets);
 319
 320         return 0;
 321 }
 322
 323 static int
 324 octeontx_port_stats_clr(struct octeontx_nic *nic)
 325 {
 326         PMD_INIT_FUNC_TRACE();
 327
 328         return octeontx_bgx_port_stats_clr(nic->port_id);
 329 }
 330
 331 static inline void
 332 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
 333                                 struct rte_event_dev_info *info)
 334 {
 335         memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
 336         dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
 337
 338         dev_conf->nb_event_ports = info->max_event_ports;
 339         dev_conf->nb_event_queues = info->max_event_queues;
 340
 341         dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
 342         dev_conf->nb_event_port_dequeue_depth =
 343                         info->max_event_port_dequeue_depth;
 344         dev_conf->nb_event_port_enqueue_depth =
 345                         info->max_event_port_enqueue_depth;
 346         dev_conf->nb_event_port_enqueue_depth =
 347                         info->max_event_port_enqueue_depth;
 348         dev_conf->nb_events_limit =
 349                         info->max_num_events;
 350 }
 351
 352 static uint16_t
 353 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
 354 {
 355         struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
 356         uint16_t flags = 0;
 357
 358         if (nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM ||
 359             nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM)
 360                 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F;
 361
 362         if (nic->tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM ||
 363             nic->tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM ||
 364             nic->tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM ||
 365             nic->tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM)
 366                 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F;
 367
 368         if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
 369                 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
 370
 371         if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 372                 flags |= OCCTX_TX_MULTI_SEG_F;
 373
 374         return flags;
 375 }
 376
 377 static uint16_t
 378 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
 379 {
 380         struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
 381         uint16_t flags = 0;
 382
 383         if (nic->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM |
 384                          DEV_RX_OFFLOAD_UDP_CKSUM))
 385                 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
 386
 387         if (nic->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM |
 388                                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM))
 389                 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
 390
 391         if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
 392                 flags |= OCCTX_RX_MULTI_SEG_F;
 393                 eth_dev->data->scattered_rx = 1;
 394                 /* If scatter mode is enabled, TX should also be in multi
 395                  * seg mode, else memory leak will occur
 396                  */
 397                 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
 398         }
 399
 400         return flags;
 401 }
 402
 403 static int
 404 octeontx_dev_configure(struct rte_eth_dev *dev)
 405 {
 406         struct rte_eth_dev_data *data = dev->data;
 407         struct rte_eth_conf *conf = &data->dev_conf;
 408         struct rte_eth_rxmode *rxmode = &conf->rxmode;
 409         struct rte_eth_txmode *txmode = &conf->txmode;
 410         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 411         int ret;
 412
 413         PMD_INIT_FUNC_TRACE();
 414         RTE_SET_USED(conf);
 415
 416         if (!rte_eal_has_hugepages()) {
 417                 octeontx_log_err("huge page is not configured");
 418                 return -EINVAL;
 419         }
 420
 421         if (txmode->mq_mode) {
 422                 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
 423                 return -EINVAL;
 424         }
 425
 426         if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
 427                 rxmode->mq_mode != ETH_MQ_RX_RSS) {
 428                 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
 429                 return -EINVAL;
 430         }
 431
 432         if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
 433                 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
 434                 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
 435         }
 436
 437         if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
 438                 octeontx_log_err("setting link speed/duplex not supported");
 439                 return -EINVAL;
 440         }
 441
 442         if (conf->dcb_capability_en) {
 443                 octeontx_log_err("DCB enable not supported");
 444                 return -EINVAL;
 445         }
 446
 447         if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
 448                 octeontx_log_err("flow director not supported");
 449                 return -EINVAL;
 450         }
 451
 452         nic->num_tx_queues = dev->data->nb_tx_queues;
 453
 454         ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
 455                                         nic->num_tx_queues,
 456                                         nic->base_ochan);
 457         if (ret) {
 458                 octeontx_log_err("failed to open channel %d no-of-txq %d",
 459                            nic->base_ochan, nic->num_tx_queues);
 460                 return -EFAULT;
 461         }
 462
 463         ret = octeontx_dev_vlan_offload_init(dev);
 464         if (ret) {
 465                 octeontx_log_err("failed to initialize vlan offload");
 466                 return -EFAULT;
 467         }
 468
 469         nic->pki.classifier_enable = false;
 470         nic->pki.hash_enable = true;
 471         nic->pki.initialized = false;
 472
 473         nic->rx_offloads |= rxmode->offloads;
 474         nic->tx_offloads |= txmode->offloads;
 475         nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
 476         nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
 477
 478         return 0;
 479 }
 480
 481 static void
 482 octeontx_dev_close(struct rte_eth_dev *dev)
 483 {
 484         struct octeontx_txq *txq = NULL;
 485         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 486         unsigned int i;
 487         int ret;
 488
 489         PMD_INIT_FUNC_TRACE();
 490
 491         rte_event_dev_close(nic->evdev);
 492
 493         octeontx_dev_flow_ctrl_fini(dev);
 494
 495         octeontx_dev_vlan_offload_fini(dev);
 496
 497         ret = octeontx_pko_channel_close(nic->base_ochan);
 498         if (ret < 0) {
 499                 octeontx_log_err("failed to close channel %d VF%d %d %d",
 500                              nic->base_ochan, nic->port_id, nic->num_tx_queues,
 501                              ret);
 502         }
 503         /* Free txq resources for this port */
 504         for (i = 0; i < nic->num_tx_queues; i++) {
 505                 txq = dev->data->tx_queues[i];
 506                 if (!txq)
 507                         continue;
 508
 509                 rte_free(txq);
 510         }
 511
 512         /* Free MAC address table */
 513         rte_free(dev->data->mac_addrs);
 514         dev->data->mac_addrs = NULL;
 515
 516         octeontx_port_close(nic);
 517
 518         dev->tx_pkt_burst = NULL;
 519         dev->rx_pkt_burst = NULL;
 520 }
 521
 522 static int
 523 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 524 {
 525         uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
 526         struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
 527         struct rte_eth_dev_data *data = eth_dev->data;
 528         int rc = 0;
 529
 530         /* Check if MTU is within the allowed range */
 531         if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)
 532                 return -EINVAL;
 533
 534         buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 535
 536         /* Refuse MTU that requires the support of scattered packets
 537          * when this feature has not been enabled before.
 538          */
 539         if (data->dev_started && frame_size > buffsz &&
 540             !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {
 541                 octeontx_log_err("Scatter mode is disabled");
 542                 return -EINVAL;
 543         }
 544
 545         /* Check <seg size> * <max_seg>  >= max_frame */
 546         if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
 547             (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
 548                 return -EINVAL;
 549
 550         rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
 551         if (rc)
 552                 return rc;
 553
 554         rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
 555         if (rc)
 556                 return rc;
 557
 558         if (frame_size > RTE_ETHER_MAX_LEN)
 559                 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
 560         else
 561                 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 562
 563         /* Update max_rx_pkt_len */
 564         data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 565         octeontx_log_info("Received pkt beyond  maxlen %d will be dropped",
 566                           frame_size);
 567
 568         return rc;
 569 }
 570
 571 static int
 572 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
 573 {
 574         struct rte_eth_dev *eth_dev = rxq->eth_dev;
 575         struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
 576         struct rte_eth_dev_data *data = eth_dev->data;
 577         struct rte_pktmbuf_pool_private *mbp_priv;
 578         struct evdev_priv_data *evdev_priv;
 579         struct rte_eventdev *dev;
 580         uint32_t buffsz;
 581
 582         /* Get rx buffer size */
 583         mbp_priv = rte_mempool_get_priv(rxq->pool);
 584         buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
 585
 586         /* Setup scatter mode if needed by jumbo */
 587         if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
 588                 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
 589                 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
 590                 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
 591         }
 592
 593         /* Sharing offload flags via eventdev priv region */
 594         dev = &rte_eventdevs[rxq->evdev];
 595         evdev_priv = dev->data->dev_private;
 596         evdev_priv->rx_offload_flags = nic->rx_offload_flags;
 597         evdev_priv->tx_offload_flags = nic->tx_offload_flags;
 598
 599         /* Setup MTU based on max_rx_pkt_len */
 600         nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;
 601
 602         return 0;
 603 }
 604
 605 static int
 606 octeontx_dev_start(struct rte_eth_dev *dev)
 607 {
 608         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 609         struct octeontx_rxq *rxq;
 610         int ret, i;
 611
 612         PMD_INIT_FUNC_TRACE();
 613         /* Rechecking if any new offload set to update
 614          * rx/tx burst function pointer accordingly.
 615          */
 616         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 617                 rxq = dev->data->rx_queues[i];
 618                 octeontx_recheck_rx_offloads(rxq);
 619         }
 620
 621         /* Setting up the mtu based on max_rx_pkt_len */
 622         ret = octeontx_dev_mtu_set(dev, nic->mtu);
 623         if (ret) {
 624                 octeontx_log_err("Failed to set default MTU size %d", ret);
 625                 goto error;
 626         }
 627
 628         /*
 629          * Tx start
 630          */
 631         octeontx_set_tx_function(dev);
 632         ret = octeontx_pko_channel_start(nic->base_ochan);
 633         if (ret < 0) {
 634                 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
 635                            nic->port_id, nic->num_tx_queues, nic->base_ochan,
 636                            ret);
 637                 goto error;
 638         }
 639
 640         /*
 641          * Rx start
 642          */
 643         dev->rx_pkt_burst = octeontx_recv_pkts;
 644         ret = octeontx_pki_port_start(nic->port_id);
 645         if (ret < 0) {
 646                 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
 647                 goto channel_stop_error;
 648         }
 649
 650         /*
 651          * Start port
 652          */
 653         ret = octeontx_port_start(nic);
 654         if (ret < 0) {
 655                 octeontx_log_err("failed start port %d", ret);
 656                 goto pki_port_stop_error;
 657         }
 658
 659         PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
 660                         nic->base_ochan, nic->num_tx_queues, nic->port_id);
 661
 662         ret = rte_event_dev_start(nic->evdev);
 663         if (ret < 0) {
 664                 octeontx_log_err("failed to start evdev: ret (%d)", ret);
 665                 goto pki_port_stop_error;
 666         }
 667
 668         /* Success */
 669         return ret;
 670
 671 pki_port_stop_error:
 672         octeontx_pki_port_stop(nic->port_id);
 673 channel_stop_error:
 674         octeontx_pko_channel_stop(nic->base_ochan);
 675 error:
 676         return ret;
 677 }
 678
 679 static void
 680 octeontx_dev_stop(struct rte_eth_dev *dev)
 681 {
 682         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 683         int ret;
 684
 685         PMD_INIT_FUNC_TRACE();
 686
 687         rte_event_dev_stop(nic->evdev);
 688
 689         ret = octeontx_port_stop(nic);
 690         if (ret < 0) {
 691                 octeontx_log_err("failed to req stop port %d res=%d",
 692                                         nic->port_id, ret);
 693                 return;
 694         }
 695
 696         ret = octeontx_pki_port_stop(nic->port_id);
 697         if (ret < 0) {
 698                 octeontx_log_err("failed to stop pki port %d res=%d",
 699                                         nic->port_id, ret);
 700                 return;
 701         }
 702
 703         ret = octeontx_pko_channel_stop(nic->base_ochan);
 704         if (ret < 0) {
 705                 octeontx_log_err("failed to stop channel %d VF%d %d %d",
 706                              nic->base_ochan, nic->port_id, nic->num_tx_queues,
 707                              ret);
 708                 return;
 709         }
 710 }
 711
 712 static int
 713 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
 714 {
 715         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 716
 717         PMD_INIT_FUNC_TRACE();
 718         return octeontx_port_promisc_set(nic, 1);
 719 }
 720
 721 static int
 722 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
 723 {
 724         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 725
 726         PMD_INIT_FUNC_TRACE();
 727         return octeontx_port_promisc_set(nic, 0);
 728 }
 729
 730 static int
 731 octeontx_port_link_status(struct octeontx_nic *nic)
 732 {
 733         int res;
 734
 735         PMD_INIT_FUNC_TRACE();
 736         res = octeontx_bgx_port_link_status(nic->port_id);
 737         if (res < 0) {
 738                 octeontx_log_err("failed to get port %d link status",
 739                                 nic->port_id);
 740                 return res;
 741         }
 742
 743         if (nic->link_up != (uint8_t)res || nic->print_flag == -1) {
 744                 nic->link_up = (uint8_t)res;
 745                 nic->print_flag = 1;
 746         }
 747         octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
 748
 749         return res;
 750 }
 751
 752 /*
 753  * Return 0 means link status changed, -1 means not changed
 754  */
 755 static int
 756 octeontx_dev_link_update(struct rte_eth_dev *dev,
 757                          int wait_to_complete __rte_unused)
 758 {
 759         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 760         struct rte_eth_link link;
 761         int res;
 762
 763         PMD_INIT_FUNC_TRACE();
 764
 765         res = octeontx_port_link_status(nic);
 766         if (res < 0) {
 767                 octeontx_log_err("failed to request link status %d", res);
 768                 return res;
 769         }
 770
 771         octeontx_link_status_update(nic, &link);
 772         if (nic->print_flag) {
 773                 octeontx_link_status_print(nic->dev, &link);
 774                 nic->print_flag = 0;
 775         }
 776
 777         return rte_eth_linkstatus_set(dev, &link);
 778 }
 779
 780 static int
 781 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 782 {
 783         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 784
 785         PMD_INIT_FUNC_TRACE();
 786         return octeontx_port_stats(nic, stats);
 787 }
 788
 789 static int
 790 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
 791 {
 792         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 793
 794         PMD_INIT_FUNC_TRACE();
 795         return octeontx_port_stats_clr(nic);
 796 }
 797
 798 static void
 799 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
 800 {
 801         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 802         int ret;
 803
 804         ret = octeontx_bgx_port_mac_del(nic->port_id, index);
 805         if (ret != 0)
 806                 octeontx_log_err("failed to del MAC address filter on port %d",
 807                                  nic->port_id);
 808 }
 809
 810 static int
 811 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
 812                           struct rte_ether_addr *mac_addr,
 813                           uint32_t index,
 814                           __rte_unused uint32_t vmdq)
 815 {
 816         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 817         int ret;
 818
 819         ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
 820                                         index);
 821         if (ret < 0) {
 822                 octeontx_log_err("failed to add MAC address filter on port %d",
 823                                  nic->port_id);
 824                 return ret;
 825         }
 826
 827         return 0;
 828 }
 829
 830 static int
 831 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
 832                                         struct rte_ether_addr *addr)
 833 {
 834         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 835         int ret;
 836
 837         ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
 838         if (ret == 0) {
 839                 /* Update same mac address to BGX CAM table */
 840                 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
 841                                                 0);
 842         }
 843         if (ret < 0) {
 844                 octeontx_log_err("failed to set MAC address on port %d",
 845                                  nic->port_id);
 846         }
 847
 848         return ret;
 849 }
 850
 851 static int
 852 octeontx_dev_info(struct rte_eth_dev *dev,
 853                 struct rte_eth_dev_info *dev_info)
 854 {
 855         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 856
 857         /* Autonegotiation may be disabled */
 858         dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
 859         dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
 860                         ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
 861                         ETH_LINK_SPEED_40G;
 862
 863         /* Min/Max MTU supported */
 864         dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
 865         dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
 866         dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
 867         dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
 868
 869         dev_info->max_mac_addrs =
 870                                 octeontx_bgx_port_mac_entries_get(nic->port_id);
 871         dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
 872         dev_info->max_rx_queues = 1;
 873         dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
 874         dev_info->min_rx_bufsize = 0;
 875
 876         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 877                 .rx_free_thresh = 0,
 878                 .rx_drop_en = 0,
 879                 .offloads = OCTEONTX_RX_OFFLOADS,
 880         };
 881
 882         dev_info->default_txconf = (struct rte_eth_txconf) {
 883                 .tx_free_thresh = 0,
 884                 .offloads = OCTEONTX_TX_OFFLOADS,
 885         };
 886
 887         dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
 888         dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
 889         dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
 890         dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
 891
 892         return 0;
 893 }
 894
 895 static void
 896 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
 897 {
 898         ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
 899         ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
 900         ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
 901 }
 902
 903 static int
 904 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
 905                                 uint16_t qidx)
 906 {
 907         struct octeontx_txq *txq;
 908         int res;
 909
 910         PMD_INIT_FUNC_TRACE();
 911
 912         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
 913                 return 0;
 914
 915         txq = dev->data->tx_queues[qidx];
 916
 917         res = octeontx_pko_channel_query_dqs(nic->base_ochan,
 918                                                 &txq->dq,
 919                                                 sizeof(octeontx_dq_t),
 920                                                 txq->queue_id,
 921                                                 octeontx_dq_info_getter);
 922         if (res < 0) {
 923                 res = -EFAULT;
 924                 goto close_port;
 925         }
 926
 927         dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
 928         return res;
 929
 930 close_port:
 931         (void)octeontx_port_stop(nic);
 932         octeontx_pko_channel_stop(nic->base_ochan);
 933         octeontx_pko_channel_close(nic->base_ochan);
 934         dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 935         return res;
 936 }
 937
 938 int
 939 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
 940 {
 941         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 942
 943         PMD_INIT_FUNC_TRACE();
 944         qidx = qidx % PKO_VF_NUM_DQ;
 945         return octeontx_vf_start_tx_queue(dev, nic, qidx);
 946 }
 947
 948 static inline int
 949 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
 950                           uint16_t qidx)
 951 {
 952         int ret = 0;
 953
 954         RTE_SET_USED(nic);
 955         PMD_INIT_FUNC_TRACE();
 956
 957         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
 958                 return 0;
 959
 960         dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 961         return ret;
 962 }
 963
 964 int
 965 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
 966 {
 967         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 968
 969         PMD_INIT_FUNC_TRACE();
 970         qidx = qidx % PKO_VF_NUM_DQ;
 971
 972         return octeontx_vf_stop_tx_queue(dev, nic, qidx);
 973 }
 974
 975 static void
 976 octeontx_dev_tx_queue_release(void *tx_queue)
 977 {
 978         struct octeontx_txq *txq = tx_queue;
 979         int res;
 980
 981         PMD_INIT_FUNC_TRACE();
 982
 983         if (txq) {
 984                 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
 985                 if (res < 0)
 986                         octeontx_log_err("failed stop tx_queue(%d)\n",
 987                                    txq->queue_id);
 988
 989                 rte_free(txq);
 990         }
 991 }
 992
 993 static int
 994 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
 995                             uint16_t nb_desc, unsigned int socket_id,
 996                             const struct rte_eth_txconf *tx_conf __rte_unused)
 997 {
 998         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
 999         struct octeontx_txq *txq = NULL;
1000         uint16_t dq_num;
1001         int res = 0;
1002
1003         RTE_SET_USED(nb_desc);
1004         RTE_SET_USED(socket_id);
1005
1006         dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
1007
1008         /* Socket id check */
1009         if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1010                         socket_id != (unsigned int)nic->node)
1011                 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
1012                                                 socket_id, nic->node);
1013
1014         /* Free memory prior to re-allocation if needed. */
1015         if (dev->data->tx_queues[qidx] != NULL) {
1016                 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
1017                                 qidx);
1018                 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
1019                 dev->data->tx_queues[qidx] = NULL;
1020         }
1021
1022         /* Allocating tx queue data structure */
1023         txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
1024                                  RTE_CACHE_LINE_SIZE, nic->node);
1025         if (txq == NULL) {
1026                 octeontx_log_err("failed to allocate txq=%d", qidx);
1027                 res = -ENOMEM;
1028                 goto err;
1029         }
1030
1031         txq->eth_dev = dev;
1032         txq->queue_id = dq_num;
1033         dev->data->tx_queues[qidx] = txq;
1034         dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1035
1036         res = octeontx_pko_channel_query_dqs(nic->base_ochan,
1037                                                 &txq->dq,
1038                                                 sizeof(octeontx_dq_t),
1039                                                 txq->queue_id,
1040                                                 octeontx_dq_info_getter);
1041         if (res < 0) {
1042                 res = -EFAULT;
1043                 goto err;
1044         }
1045
1046         PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
1047                         qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
1048                         txq->dq.ioreg_va,
1049                         txq->dq.fc_status_va);
1050
1051         return res;
1052
1053 err:
1054         if (txq)
1055                 rte_free(txq);
1056
1057         return res;
1058 }
1059
1060 static int
1061 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
1062                                 uint16_t nb_desc, unsigned int socket_id,
1063                                 const struct rte_eth_rxconf *rx_conf,
1064                                 struct rte_mempool *mb_pool)
1065 {
1066         struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1067         struct rte_mempool_ops *mp_ops = NULL;
1068         struct octeontx_rxq *rxq = NULL;
1069         pki_pktbuf_cfg_t pktbuf_conf;
1070         pki_hash_cfg_t pki_hash;
1071         pki_qos_cfg_t pki_qos;
1072         uintptr_t pool;
1073         int ret, port;
1074         uint16_t gaura;
1075         unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
1076         unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
1077
1078         RTE_SET_USED(nb_desc);
1079
1080         memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
1081         memset(&pki_hash, 0, sizeof(pki_hash));
1082         memset(&pki_qos, 0, sizeof(pki_qos));
1083
1084         mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
1085         if (strcmp(mp_ops->name, "octeontx_fpavf")) {
1086                 octeontx_log_err("failed to find octeontx_fpavf mempool");
1087                 return -ENOTSUP;
1088         }
1089
1090         /* Handle forbidden configurations */
1091         if (nic->pki.classifier_enable) {
1092                 octeontx_log_err("cannot setup queue %d. "
1093                                         "Classifier option unsupported", qidx);
1094                 return -EINVAL;
1095         }
1096
1097         port = nic->port_id;
1098
1099         /* Rx deferred start is not supported */
1100         if (rx_conf->rx_deferred_start) {
1101                 octeontx_log_err("rx deferred start not supported");
1102                 return -EINVAL;
1103         }
1104
1105         /* Verify queue index */
1106         if (qidx >= dev->data->nb_rx_queues) {
1107                 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
1108                                 qidx, (dev->data->nb_rx_queues - 1));
1109                 return -ENOTSUP;
1110         }
1111
1112         /* Socket id check */
1113         if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1114                         socket_id != (unsigned int)nic->node)
1115                 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1116                                                 socket_id, nic->node);
1117
1118         /* Allocating rx queue data structure */
1119         rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1120                                  RTE_CACHE_LINE_SIZE, nic->node);
1121         if (rxq == NULL) {
1122                 octeontx_log_err("failed to allocate rxq=%d", qidx);
1123                 return -ENOMEM;
1124         }
1125
1126         if (!nic->pki.initialized) {
1127                 pktbuf_conf.port_type = 0;
1128                 pki_hash.port_type = 0;
1129                 pki_qos.port_type = 0;
1130
1131                 pktbuf_conf.mmask.f_wqe_skip = 1;
1132                 pktbuf_conf.mmask.f_first_skip = 1;
1133                 pktbuf_conf.mmask.f_later_skip = 1;
1134                 pktbuf_conf.mmask.f_mbuff_size = 1;
1135                 pktbuf_conf.mmask.f_cache_mode = 1;
1136
1137                 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1138                 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1139                 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1140                 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1141                                         RTE_PKTMBUF_HEADROOM -
1142                                         rte_pktmbuf_priv_size(mb_pool) -
1143                                         sizeof(struct rte_mbuf));
1144
1145                 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1146
1147                 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1148                 if (ret != 0) {
1149                         octeontx_log_err("fail to configure pktbuf for port %d",
1150                                         port);
1151                         rte_free(rxq);
1152                         return ret;
1153                 }
1154                 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1155                                 "\tmbuf_size:\t0x%0x\n"
1156                                 "\twqe_skip:\t0x%0x\n"
1157                                 "\tfirst_skip:\t0x%0x\n"
1158                                 "\tlater_skip:\t0x%0x\n"
1159                                 "\tcache_mode:\t%s\n",
1160                                 port,
1161                                 pktbuf_conf.mbuff_size,
1162                                 pktbuf_conf.wqe_skip,
1163                                 pktbuf_conf.first_skip,
1164                                 pktbuf_conf.later_skip,
1165                                 (pktbuf_conf.cache_mode ==
1166                                                 PKI_OPC_MODE_STT) ?
1167                                 "STT" :
1168                                 (pktbuf_conf.cache_mode ==
1169                                                 PKI_OPC_MODE_STF) ?
1170                                 "STF" :
1171                                 (pktbuf_conf.cache_mode ==
1172                                                 PKI_OPC_MODE_STF1_STT) ?
1173                                 "STF1_STT" : "STF2_STT");
1174
1175                 if (nic->pki.hash_enable) {
1176                         pki_hash.tag_dlc = 1;
1177                         pki_hash.tag_slc = 1;
1178                         pki_hash.tag_dlf = 1;
1179                         pki_hash.tag_slf = 1;
1180                         pki_hash.tag_prt = 1;
1181                         octeontx_pki_port_hash_config(port, &pki_hash);
1182                 }
1183
1184                 pool = (uintptr_t)mb_pool->pool_id;
1185
1186                 /* Get the gaura Id */
1187                 gaura = octeontx_fpa_bufpool_gaura(pool);
1188
1189                 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1190                 pki_qos.num_entry = 1;
1191                 pki_qos.drop_policy = 0;
1192                 pki_qos.tag_type = 0L;
1193                 pki_qos.qos_entry[0].port_add = 0;
1194                 pki_qos.qos_entry[0].gaura = gaura;
1195                 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1196                 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1197                 pki_qos.qos_entry[0].grptag_bad = 0;
1198                 pki_qos.qos_entry[0].grptag_ok = 0;
1199
1200                 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1201                 if (ret < 0) {
1202                         octeontx_log_err("failed to create QOS port=%d, q=%d",
1203                                         port, qidx);
1204                         rte_free(rxq);
1205                         return ret;
1206                 }
1207                 nic->pki.initialized = true;
1208         }
1209
1210         rxq->port_id = nic->port_id;
1211         rxq->eth_dev = dev;
1212         rxq->queue_id = qidx;
1213         rxq->evdev = nic->evdev;
1214         rxq->ev_queues = ev_queues;
1215         rxq->ev_ports = ev_ports;
1216         rxq->pool = mb_pool;
1217
1218         octeontx_recheck_rx_offloads(rxq);
1219         dev->data->rx_queues[qidx] = rxq;
1220         dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1221
1222         return 0;
1223 }
1224
1225 static void
1226 octeontx_dev_rx_queue_release(void *rxq)
1227 {
1228         rte_free(rxq);
1229 }
1230
1231 static const uint32_t *
1232 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1233 {
1234         static const uint32_t ptypes[] = {
1235                 RTE_PTYPE_L3_IPV4,
1236                 RTE_PTYPE_L3_IPV4_EXT,
1237                 RTE_PTYPE_L3_IPV6,
1238                 RTE_PTYPE_L3_IPV6_EXT,
1239                 RTE_PTYPE_L4_TCP,
1240                 RTE_PTYPE_L4_UDP,
1241                 RTE_PTYPE_L4_FRAG,
1242                 RTE_PTYPE_UNKNOWN
1243         };
1244
1245         if (dev->rx_pkt_burst == octeontx_recv_pkts)
1246                 return ptypes;
1247
1248         return NULL;
1249 }
1250
1251 static int
1252 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1253 {
1254         RTE_SET_USED(dev);
1255
1256         if (!strcmp(pool, "octeontx_fpavf"))
1257                 return 0;
1258
1259         return -ENOTSUP;
1260 }
1261
1262 /* Initialize and register driver with DPDK Application */
1263 static const struct eth_dev_ops octeontx_dev_ops = {
1264         .dev_configure           = octeontx_dev_configure,
1265         .dev_infos_get           = octeontx_dev_info,
1266         .dev_close               = octeontx_dev_close,
1267         .dev_start               = octeontx_dev_start,
1268         .dev_stop                = octeontx_dev_stop,
1269         .promiscuous_enable      = octeontx_dev_promisc_enable,
1270         .promiscuous_disable     = octeontx_dev_promisc_disable,
1271         .link_update             = octeontx_dev_link_update,
1272         .stats_get               = octeontx_dev_stats_get,
1273         .stats_reset             = octeontx_dev_stats_reset,
1274         .mac_addr_remove         = octeontx_dev_mac_addr_del,
1275         .mac_addr_add            = octeontx_dev_mac_addr_add,
1276         .mac_addr_set            = octeontx_dev_default_mac_addr_set,
1277         .vlan_offload_set        = octeontx_dev_vlan_offload_set,
1278         .vlan_filter_set         = octeontx_dev_vlan_filter_set,
1279         .tx_queue_start          = octeontx_dev_tx_queue_start,
1280         .tx_queue_stop           = octeontx_dev_tx_queue_stop,
1281         .tx_queue_setup          = octeontx_dev_tx_queue_setup,
1282         .tx_queue_release        = octeontx_dev_tx_queue_release,
1283         .rx_queue_setup          = octeontx_dev_rx_queue_setup,
1284         .rx_queue_release        = octeontx_dev_rx_queue_release,
1285         .dev_set_link_up          = octeontx_dev_set_link_up,
1286         .dev_set_link_down        = octeontx_dev_set_link_down,
1287         .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1288         .mtu_set                 = octeontx_dev_mtu_set,
1289         .pool_ops_supported      = octeontx_pool_ops,
1290         .flow_ctrl_get           = octeontx_dev_flow_ctrl_get,
1291         .flow_ctrl_set           = octeontx_dev_flow_ctrl_set,
1292 };
1293
1294 /* Create Ethdev interface per BGX LMAC ports */
1295 static int
1296 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1297                         int socket_id)
1298 {
1299         int res;
1300         size_t pko_vfid;
1301         char octtx_name[OCTEONTX_MAX_NAME_LEN];
1302         struct octeontx_nic *nic = NULL;
1303         struct rte_eth_dev *eth_dev = NULL;
1304         struct rte_eth_dev_data *data;
1305         const char *name = rte_vdev_device_name(dev);
1306         int max_entries;
1307
1308         PMD_INIT_FUNC_TRACE();
1309
1310         sprintf(octtx_name, "%s_%d", name, port);
1311         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1312                 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1313                 if (eth_dev == NULL)
1314                         return -ENODEV;
1315
1316                 eth_dev->dev_ops = &octeontx_dev_ops;
1317                 eth_dev->device = &dev->device;
1318                 octeontx_set_tx_function(eth_dev);
1319                 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1320                 rte_eth_dev_probing_finish(eth_dev);
1321                 return 0;
1322         }
1323
1324         /* Reserve an ethdev entry */
1325         eth_dev = rte_eth_dev_allocate(octtx_name);
1326         if (eth_dev == NULL) {
1327                 octeontx_log_err("failed to allocate rte_eth_dev");
1328                 res = -ENOMEM;
1329                 goto err;
1330         }
1331         data = eth_dev->data;
1332
1333         nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1334         if (nic == NULL) {
1335                 octeontx_log_err("failed to allocate nic structure");
1336                 res = -ENOMEM;
1337                 goto err;
1338         }
1339         data->dev_private = nic;
1340         pko_vfid = octeontx_pko_get_vfid();
1341
1342         if (pko_vfid == SIZE_MAX) {
1343                 octeontx_log_err("failed to get pko vfid");
1344                 res = -ENODEV;
1345                 goto err;
1346         }
1347
1348         nic->pko_vfid = pko_vfid;
1349         nic->port_id = port;
1350         nic->evdev = evdev;
1351
1352         res = octeontx_port_open(nic);
1353         if (res < 0)
1354                 goto err;
1355
1356         /* Rx side port configuration */
1357         res = octeontx_pki_port_open(port);
1358         if (res != 0) {
1359                 octeontx_log_err("failed to open PKI port %d", port);
1360                 res = -ENODEV;
1361                 goto err;
1362         }
1363
1364         eth_dev->device = &dev->device;
1365         eth_dev->intr_handle = NULL;
1366         eth_dev->data->numa_node = dev->device.numa_node;
1367
1368         data->port_id = eth_dev->data->port_id;
1369
1370         nic->ev_queues = 1;
1371         nic->ev_ports = 1;
1372         nic->print_flag = -1;
1373
1374         data->dev_link.link_status = ETH_LINK_DOWN;
1375         data->dev_started = 0;
1376         data->promiscuous = 0;
1377         data->all_multicast = 0;
1378         data->scattered_rx = 0;
1379
1380         /* Get maximum number of supported MAC entries */
1381         max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1382         if (max_entries < 0) {
1383                 octeontx_log_err("Failed to get max entries for mac addr");
1384                 res = -ENOTSUP;
1385                 goto err;
1386         }
1387
1388         data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1389                                              RTE_ETHER_ADDR_LEN, 0,
1390                                                         socket_id);
1391         if (data->mac_addrs == NULL) {
1392                 octeontx_log_err("failed to allocate memory for mac_addrs");
1393                 res = -ENOMEM;
1394                 goto err;
1395         }
1396
1397         eth_dev->dev_ops = &octeontx_dev_ops;
1398
1399         /* Finally save ethdev pointer to the NIC structure */
1400         nic->dev = eth_dev;
1401
1402         if (nic->port_id != data->port_id) {
1403                 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1404                                 data->port_id, nic->port_id);
1405                 res = -EINVAL;
1406                 goto free_mac_addrs;
1407         }
1408
1409         res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
1410                                 octeontx_link_status_poll, nic);
1411         if (res) {
1412                 octeontx_log_err("Failed to start link polling alarm");
1413                 goto err;
1414         }
1415
1416         /* Update port_id mac to eth_dev */
1417         memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1418
1419         /* Update same mac address to BGX CAM table at index 0 */
1420         octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1421
1422         res = octeontx_dev_flow_ctrl_init(eth_dev);
1423         if (res < 0)
1424                 goto err;
1425
1426         PMD_INIT_LOG(DEBUG, "ethdev info: ");
1427         PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1428                                 nic->port_id, nic->port_ena,
1429                                 nic->base_ochan, nic->num_ochans,
1430                                 nic->num_tx_queues);
1431         PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1432
1433         rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1434                 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1435
1436         rte_eth_dev_probing_finish(eth_dev);
1437         return data->port_id;
1438
1439 free_mac_addrs:
1440         rte_free(data->mac_addrs);
1441         data->mac_addrs = NULL;
1442 err:
1443         if (nic)
1444                 octeontx_port_close(nic);
1445
1446         rte_eth_dev_release_port(eth_dev);
1447
1448         return res;
1449 }
1450
1451 /* Un initialize octeontx device */
1452 static int
1453 octeontx_remove(struct rte_vdev_device *dev)
1454 {
1455         char octtx_name[OCTEONTX_MAX_NAME_LEN];
1456         struct rte_eth_dev *eth_dev = NULL;
1457         struct octeontx_nic *nic = NULL;
1458         int i;
1459
1460         if (dev == NULL)
1461                 return -EINVAL;
1462
1463         for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1464                 sprintf(octtx_name, "eth_octeontx_%d", i);
1465
1466                 /* reserve an ethdev entry */
1467                 eth_dev = rte_eth_dev_allocated(octtx_name);
1468                 if (eth_dev == NULL)
1469                         return -ENODEV;
1470
1471                 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1472                         rte_eth_dev_release_port(eth_dev);
1473                         continue;
1474                 }
1475
1476                 nic = octeontx_pmd_priv(eth_dev);
1477                 rte_event_dev_stop(nic->evdev);
1478                 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1479
1480                 rte_eth_dev_release_port(eth_dev);
1481                 rte_event_dev_close(nic->evdev);
1482         }
1483
1484         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1485                 return 0;
1486
1487         /* Free FC resource */
1488         octeontx_pko_fc_free();
1489
1490         return 0;
1491 }
1492
1493 /* Initialize octeontx device */
1494 static int
1495 octeontx_probe(struct rte_vdev_device *dev)
1496 {
1497         const char *dev_name;
1498         static int probe_once;
1499         uint8_t socket_id, qlist;
1500         int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1501         struct rte_event_dev_config dev_conf;
1502         const char *eventdev_name = "event_octeontx";
1503         struct rte_event_dev_info info;
1504         struct rte_eth_dev *eth_dev;
1505
1506         struct octeontx_vdev_init_params init_params = {
1507                 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1508         };
1509
1510         dev_name = rte_vdev_device_name(dev);
1511
1512         if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1513             strlen(rte_vdev_device_args(dev)) == 0) {
1514                 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1515                 if (!eth_dev) {
1516                         PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1517                         return -1;
1518                 }
1519                 /* TODO: request info from primary to set up Rx and Tx */
1520                 eth_dev->dev_ops = &octeontx_dev_ops;
1521                 eth_dev->device = &dev->device;
1522                 rte_eth_dev_probing_finish(eth_dev);
1523                 return 0;
1524         }
1525
1526         res = octeontx_parse_vdev_init_params(&init_params, dev);
1527         if (res < 0)
1528                 return -EINVAL;
1529
1530         if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1531                 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1532                                 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1533                 return -ENOTSUP;
1534         }
1535
1536         PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1537
1538         socket_id = rte_socket_id();
1539
1540         tx_vfcnt = octeontx_pko_vf_count();
1541
1542         if (tx_vfcnt < init_params.nr_port) {
1543                 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1544                                 tx_vfcnt, init_params.nr_port);
1545                 return -EINVAL;
1546         }
1547         evdev = rte_event_dev_get_dev_id(eventdev_name);
1548         if (evdev < 0) {
1549                 octeontx_log_err("eventdev %s not found", eventdev_name);
1550                 return -ENODEV;
1551         }
1552
1553         res = rte_event_dev_info_get(evdev, &info);
1554         if (res < 0) {
1555                 octeontx_log_err("failed to eventdev info %d", res);
1556                 return -EINVAL;
1557         }
1558
1559         PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1560                         info.max_event_queues, info.max_event_ports);
1561
1562         if (octeontx_pko_init_fc(tx_vfcnt))
1563                 return -ENOMEM;
1564
1565         devconf_set_default_sane_values(&dev_conf, &info);
1566         res = rte_event_dev_configure(evdev, &dev_conf);
1567         if (res < 0)
1568                 goto parse_error;
1569
1570         rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1571                         (uint32_t *)&pnum);
1572         rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1573                         (uint32_t *)&qnum);
1574         if (pnum < qnum) {
1575                 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1576                                 pnum, qnum);
1577                 res = -EINVAL;
1578                 goto parse_error;
1579         }
1580
1581         /* Enable all queues available */
1582         for (i = 0; i < qnum; i++) {
1583                 res = rte_event_queue_setup(evdev, i, NULL);
1584                 if (res < 0) {
1585                         octeontx_log_err("failed to setup event_q(%d): res %d",
1586                                         i, res);
1587                         goto parse_error;
1588                 }
1589         }
1590
1591         /* Enable all ports available */
1592         for (i = 0; i < pnum; i++) {
1593                 res = rte_event_port_setup(evdev, i, NULL);
1594                 if (res < 0) {
1595                         res = -ENODEV;
1596                         octeontx_log_err("failed to setup ev port(%d) res=%d",
1597                                                 i, res);
1598                         goto parse_error;
1599                 }
1600         }
1601
1602         /*
1603          * Do 1:1 links for ports & queues. All queues would be mapped to
1604          * one port. If there are more ports than queues, then some ports
1605          * won't be linked to any queue.
1606          */
1607         for (i = 0; i < qnum; i++) {
1608                 /* Link one queue to one event port */
1609                 qlist = i;
1610                 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1611                 if (res < 0) {
1612                         res = -ENODEV;
1613                         octeontx_log_err("failed to link port (%d): res=%d",
1614                                         i, res);
1615                         goto parse_error;
1616                 }
1617         }
1618
1619         /* Create ethdev interface */
1620         for (i = 0; i < init_params.nr_port; i++) {
1621                 port_id = octeontx_create(dev, i, evdev, socket_id);
1622                 if (port_id < 0) {
1623                         octeontx_log_err("failed to create device %s",
1624                                         dev_name);
1625                         res = -ENODEV;
1626                         goto parse_error;
1627                 }
1628
1629                 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1630                                         port_id);
1631         }
1632
1633         if (probe_once) {
1634                 octeontx_log_err("interface %s not supported", dev_name);
1635                 octeontx_remove(dev);
1636                 res = -ENOTSUP;
1637                 goto parse_error;
1638         }
1639         rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1640         probe_once = 1;
1641
1642         return 0;
1643
1644 parse_error:
1645         octeontx_pko_fc_free();
1646         return res;
1647 }
1648
1649 static struct rte_vdev_driver octeontx_pmd_drv = {
1650         .probe = octeontx_probe,
1651         .remove = octeontx_remove,
1652 };
1653
1654 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1655 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1656 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");