4 * Copyright (C) Cavium Inc. 2017. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Cavium networks nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 #include <rte_alarm.h>
40 #include <rte_branch_prediction.h>
41 #include <rte_debug.h>
42 #include <rte_devargs.h>
44 #include <rte_kvargs.h>
45 #include <rte_malloc.h>
46 #include <rte_prefetch.h>
49 #include "octeontx_ethdev.h"
50 #include "octeontx_logs.h"
52 struct octeontx_vdev_init_params {
56 enum octeontx_link_speed {
57 OCTEONTX_LINK_SPEED_SGMII,
58 OCTEONTX_LINK_SPEED_XAUI,
59 OCTEONTX_LINK_SPEED_RXAUI,
60 OCTEONTX_LINK_SPEED_10G_R,
61 OCTEONTX_LINK_SPEED_40G_R,
62 OCTEONTX_LINK_SPEED_RESERVE1,
63 OCTEONTX_LINK_SPEED_QSGMII,
64 OCTEONTX_LINK_SPEED_RESERVE2
67 /* Parse integer from integer argument */
69 parse_integer_arg(const char *key __rte_unused,
70 const char *value, void *extra_args)
72 int *i = (int *)extra_args;
76 octeontx_log_err("argument has to be positive.");
84 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
85 struct rte_vdev_device *dev)
87 struct rte_kvargs *kvlist = NULL;
90 static const char * const octeontx_vdev_valid_params[] = {
91 OCTEONTX_VDEV_NR_PORT_ARG,
95 const char *input_args = rte_vdev_device_args(dev);
101 kvlist = rte_kvargs_parse(input_args,
102 octeontx_vdev_valid_params);
106 ret = rte_kvargs_process(kvlist,
107 OCTEONTX_VDEV_NR_PORT_ARG,
115 rte_kvargs_free(kvlist);
120 octeontx_port_open(struct octeontx_nic *nic)
122 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
127 PMD_INIT_FUNC_TRACE();
129 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
131 octeontx_log_err("failed to open port %d", res);
135 nic->node = bgx_port_conf.node;
136 nic->port_ena = bgx_port_conf.enable;
137 nic->base_ichan = bgx_port_conf.base_chan;
138 nic->base_ochan = bgx_port_conf.base_chan;
139 nic->num_ichans = bgx_port_conf.num_chans;
140 nic->num_ochans = bgx_port_conf.num_chans;
141 nic->mtu = bgx_port_conf.mtu;
142 nic->bpen = bgx_port_conf.bpen;
143 nic->fcs_strip = bgx_port_conf.fcs_strip;
144 nic->bcast_mode = bgx_port_conf.bcast_mode;
145 nic->mcast_mode = bgx_port_conf.mcast_mode;
146 nic->speed = bgx_port_conf.mode;
148 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
150 octeontx_log_dbg("port opened %d", nic->port_id);
155 octeontx_port_close(struct octeontx_nic *nic)
157 PMD_INIT_FUNC_TRACE();
159 octeontx_bgx_port_close(nic->port_id);
160 octeontx_log_dbg("port closed %d", nic->port_id);
164 octeontx_port_stop(struct octeontx_nic *nic)
166 PMD_INIT_FUNC_TRACE();
168 return octeontx_bgx_port_stop(nic->port_id);
172 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
174 struct rte_eth_dev *dev;
178 PMD_INIT_FUNC_TRACE();
181 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
183 octeontx_log_err("failed to set promiscuous mode %d",
186 /* Set proper flag for the mode */
187 dev->data->promiscuous = (en != 0) ? 1 : 0;
189 octeontx_log_dbg("port %d : promiscuous mode %s",
190 nic->port_id, en ? "set" : "unset");
194 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
196 octeontx_mbox_bgx_port_stats_t bgx_stats;
199 PMD_INIT_FUNC_TRACE();
201 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
203 octeontx_log_err("failed to get port stats %d", nic->port_id);
205 stats->ipackets = bgx_stats.rx_packets;
206 stats->ibytes = bgx_stats.rx_bytes;
207 stats->imissed = bgx_stats.rx_dropped;
208 stats->ierrors = bgx_stats.rx_errors;
209 stats->opackets = bgx_stats.tx_packets;
210 stats->obytes = bgx_stats.tx_bytes;
211 stats->oerrors = bgx_stats.tx_errors;
213 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
214 nic->port_id, stats->ipackets, stats->opackets);
218 octeontx_port_stats_clr(struct octeontx_nic *nic)
220 PMD_INIT_FUNC_TRACE();
222 octeontx_bgx_port_stats_clr(nic->port_id);
226 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
227 struct rte_event_dev_info *info)
229 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
230 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
232 dev_conf->nb_event_ports = info->max_event_ports;
233 dev_conf->nb_event_queues = info->max_event_queues;
235 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
236 dev_conf->nb_event_port_dequeue_depth =
237 info->max_event_port_dequeue_depth;
238 dev_conf->nb_event_port_enqueue_depth =
239 info->max_event_port_enqueue_depth;
240 dev_conf->nb_event_port_enqueue_depth =
241 info->max_event_port_enqueue_depth;
242 dev_conf->nb_events_limit =
243 info->max_num_events;
247 octeontx_dev_configure(struct rte_eth_dev *dev)
249 struct rte_eth_dev_data *data = dev->data;
250 struct rte_eth_conf *conf = &data->dev_conf;
251 struct rte_eth_rxmode *rxmode = &conf->rxmode;
252 struct rte_eth_txmode *txmode = &conf->txmode;
253 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
256 PMD_INIT_FUNC_TRACE();
259 if (!rte_eal_has_hugepages()) {
260 octeontx_log_err("huge page is not configured");
264 if (txmode->mq_mode) {
265 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
269 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
270 rxmode->mq_mode != ETH_MQ_RX_RSS) {
271 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
275 if (!rxmode->hw_strip_crc) {
276 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
277 rxmode->hw_strip_crc = 1;
280 if (rxmode->hw_ip_checksum) {
281 PMD_INIT_LOG(NOTICE, "rxcksum not supported");
282 rxmode->hw_ip_checksum = 0;
285 if (rxmode->split_hdr_size) {
286 octeontx_log_err("rxmode does not support split header");
290 if (rxmode->hw_vlan_filter) {
291 octeontx_log_err("VLAN filter not supported");
295 if (rxmode->hw_vlan_extend) {
296 octeontx_log_err("VLAN extended not supported");
300 if (rxmode->enable_lro) {
301 octeontx_log_err("LRO not supported");
305 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
306 octeontx_log_err("setting link speed/duplex not supported");
310 if (conf->dcb_capability_en) {
311 octeontx_log_err("DCB enable not supported");
315 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
316 octeontx_log_err("flow director not supported");
320 nic->num_tx_queues = dev->data->nb_tx_queues;
322 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
326 octeontx_log_err("failed to open channel %d no-of-txq %d",
327 nic->base_ochan, nic->num_tx_queues);
331 nic->pki.classifier_enable = false;
332 nic->pki.hash_enable = true;
333 nic->pki.initialized = false;
339 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
341 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
343 PMD_INIT_FUNC_TRACE();
344 octeontx_port_promisc_set(nic, 1);
348 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
350 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
352 PMD_INIT_FUNC_TRACE();
353 octeontx_port_promisc_set(nic, 0);
357 octeontx_atomic_write_link_status(struct rte_eth_dev *dev,
358 struct rte_eth_link *link)
360 struct rte_eth_link *dst = &dev->data->dev_link;
361 struct rte_eth_link *src = link;
363 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
364 *(uint64_t *)src) == 0)
371 octeontx_port_link_status(struct octeontx_nic *nic)
375 PMD_INIT_FUNC_TRACE();
376 res = octeontx_bgx_port_link_status(nic->port_id);
378 octeontx_log_err("failed to get port %d link status",
383 nic->link_up = (uint8_t)res;
384 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
390 * Return 0 means link status changed, -1 means not changed
393 octeontx_dev_link_update(struct rte_eth_dev *dev,
394 int wait_to_complete __rte_unused)
396 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
397 struct rte_eth_link link;
401 PMD_INIT_FUNC_TRACE();
403 res = octeontx_port_link_status(nic);
405 octeontx_log_err("failed to request link status %d", res);
409 link.link_status = nic->link_up;
411 switch (nic->speed) {
412 case OCTEONTX_LINK_SPEED_SGMII:
413 link.link_speed = ETH_SPEED_NUM_1G;
416 case OCTEONTX_LINK_SPEED_XAUI:
417 link.link_speed = ETH_SPEED_NUM_10G;
420 case OCTEONTX_LINK_SPEED_RXAUI:
421 case OCTEONTX_LINK_SPEED_10G_R:
422 link.link_speed = ETH_SPEED_NUM_10G;
424 case OCTEONTX_LINK_SPEED_QSGMII:
425 link.link_speed = ETH_SPEED_NUM_5G;
427 case OCTEONTX_LINK_SPEED_40G_R:
428 link.link_speed = ETH_SPEED_NUM_40G;
431 case OCTEONTX_LINK_SPEED_RESERVE1:
432 case OCTEONTX_LINK_SPEED_RESERVE2:
434 octeontx_log_err("incorrect link speed %d", nic->speed);
438 link.link_duplex = ETH_LINK_AUTONEG;
439 link.link_autoneg = ETH_LINK_SPEED_AUTONEG;
441 return octeontx_atomic_write_link_status(dev, &link);
445 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
447 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
449 PMD_INIT_FUNC_TRACE();
450 octeontx_port_stats(nic, stats);
454 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
456 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
458 PMD_INIT_FUNC_TRACE();
459 octeontx_port_stats_clr(nic);
463 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
464 struct ether_addr *addr)
466 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
469 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
471 octeontx_log_err("failed to set MAC address on port %d",
476 octeontx_dev_info(struct rte_eth_dev *dev,
477 struct rte_eth_dev_info *dev_info)
481 /* Autonegotiation may be disabled */
482 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
483 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
484 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
487 dev_info->driver_name = RTE_STR(rte_octeontx_pmd);
488 dev_info->max_mac_addrs = 1;
489 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
490 dev_info->max_rx_queues = 1;
491 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
492 dev_info->min_rx_bufsize = 0;
493 dev_info->pci_dev = NULL;
495 dev_info->default_rxconf = (struct rte_eth_rxconf) {
500 dev_info->default_txconf = (struct rte_eth_txconf) {
503 ETH_TXQ_FLAGS_NOMULTSEGS |
504 ETH_TXQ_FLAGS_NOOFFLOADS |
505 ETH_TXQ_FLAGS_NOXSUMS,
508 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
512 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
514 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
515 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
516 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
520 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
523 struct octeontx_txq *txq;
526 PMD_INIT_FUNC_TRACE();
528 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
531 txq = dev->data->tx_queues[qidx];
533 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
535 sizeof(octeontx_dq_t),
537 octeontx_dq_info_getter);
543 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
547 (void)octeontx_port_stop(nic);
548 octeontx_pko_channel_stop(nic->base_ochan);
549 octeontx_pko_channel_close(nic->base_ochan);
550 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
555 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
557 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
559 PMD_INIT_FUNC_TRACE();
560 qidx = qidx % PKO_VF_NUM_DQ;
561 return octeontx_vf_start_tx_queue(dev, nic, qidx);
565 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
571 PMD_INIT_FUNC_TRACE();
573 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
576 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
581 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
583 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
585 PMD_INIT_FUNC_TRACE();
586 qidx = qidx % PKO_VF_NUM_DQ;
588 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
592 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
593 uint16_t nb_desc, unsigned int socket_id,
594 const struct rte_eth_rxconf *rx_conf,
595 struct rte_mempool *mb_pool)
597 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
598 struct rte_mempool_ops *mp_ops = NULL;
599 struct octeontx_rxq *rxq = NULL;
600 pki_pktbuf_cfg_t pktbuf_conf;
601 pki_hash_cfg_t pki_hash;
602 pki_qos_cfg_t pki_qos;
606 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
607 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
609 RTE_SET_USED(nb_desc);
611 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
612 memset(&pki_hash, 0, sizeof(pki_hash));
613 memset(&pki_qos, 0, sizeof(pki_qos));
615 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
616 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
617 octeontx_log_err("failed to find octeontx_fpavf mempool");
621 /* Handle forbidden configurations */
622 if (nic->pki.classifier_enable) {
623 octeontx_log_err("cannot setup queue %d. "
624 "Classifier option unsupported", qidx);
630 /* Rx deferred start is not supported */
631 if (rx_conf->rx_deferred_start) {
632 octeontx_log_err("rx deferred start not supported");
636 /* Verify queue index */
637 if (qidx >= dev->data->nb_rx_queues) {
638 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
639 qidx, (dev->data->nb_rx_queues - 1));
643 /* Socket id check */
644 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
645 socket_id != (unsigned int)nic->node)
646 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
647 socket_id, nic->node);
649 /* Allocating rx queue data structure */
650 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
651 RTE_CACHE_LINE_SIZE, nic->node);
653 octeontx_log_err("failed to allocate rxq=%d", qidx);
657 if (!nic->pki.initialized) {
658 pktbuf_conf.port_type = 0;
659 pki_hash.port_type = 0;
660 pki_qos.port_type = 0;
662 pktbuf_conf.mmask.f_wqe_skip = 1;
663 pktbuf_conf.mmask.f_first_skip = 1;
664 pktbuf_conf.mmask.f_later_skip = 1;
665 pktbuf_conf.mmask.f_mbuff_size = 1;
666 pktbuf_conf.mmask.f_cache_mode = 1;
668 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
669 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
670 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
671 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
672 RTE_PKTMBUF_HEADROOM -
673 sizeof(struct rte_mbuf));
675 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
677 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
679 octeontx_log_err("fail to configure pktbuf for port %d",
684 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
685 "\tmbuf_size:\t0x%0x\n"
686 "\twqe_skip:\t0x%0x\n"
687 "\tfirst_skip:\t0x%0x\n"
688 "\tlater_skip:\t0x%0x\n"
689 "\tcache_mode:\t%s\n",
691 pktbuf_conf.mbuff_size,
692 pktbuf_conf.wqe_skip,
693 pktbuf_conf.first_skip,
694 pktbuf_conf.later_skip,
695 (pktbuf_conf.cache_mode ==
698 (pktbuf_conf.cache_mode ==
701 (pktbuf_conf.cache_mode ==
702 PKI_OPC_MODE_STF1_STT) ?
703 "STF1_STT" : "STF2_STT");
705 if (nic->pki.hash_enable) {
706 pki_hash.tag_dlc = 1;
707 pki_hash.tag_slc = 1;
708 pki_hash.tag_dlf = 1;
709 pki_hash.tag_slf = 1;
710 octeontx_pki_port_hash_config(port, &pki_hash);
713 pool = (uintptr_t)mb_pool->pool_id;
715 /* Get the gpool Id */
716 gaura = octeontx_fpa_bufpool_gpool(pool);
718 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
719 pki_qos.num_entry = 1;
720 pki_qos.drop_policy = 0;
721 pki_qos.tag_type = 2L;
722 pki_qos.qos_entry[0].port_add = 0;
723 pki_qos.qos_entry[0].gaura = gaura;
724 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
725 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
726 pki_qos.qos_entry[0].grptag_bad = 0;
727 pki_qos.qos_entry[0].grptag_ok = 0;
729 ret = octeontx_pki_port_create_qos(port, &pki_qos);
731 octeontx_log_err("failed to create QOS port=%d, q=%d",
736 nic->pki.initialized = true;
739 rxq->port_id = nic->port_id;
741 rxq->queue_id = qidx;
742 rxq->evdev = nic->evdev;
743 rxq->ev_queues = ev_queues;
744 rxq->ev_ports = ev_ports;
746 dev->data->rx_queues[qidx] = rxq;
747 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
752 octeontx_dev_rx_queue_release(void *rxq)
757 /* Initialize and register driver with DPDK Application */
758 static const struct eth_dev_ops octeontx_dev_ops = {
759 .dev_configure = octeontx_dev_configure,
760 .dev_infos_get = octeontx_dev_info,
761 .promiscuous_enable = octeontx_dev_promisc_enable,
762 .promiscuous_disable = octeontx_dev_promisc_disable,
763 .link_update = octeontx_dev_link_update,
764 .stats_get = octeontx_dev_stats_get,
765 .stats_reset = octeontx_dev_stats_reset,
766 .mac_addr_set = octeontx_dev_default_mac_addr_set,
767 .tx_queue_start = octeontx_dev_tx_queue_start,
768 .tx_queue_stop = octeontx_dev_tx_queue_stop,
769 .rx_queue_setup = octeontx_dev_rx_queue_setup,
770 .rx_queue_release = octeontx_dev_rx_queue_release,
773 /* Create Ethdev interface per BGX LMAC ports */
775 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
779 char octtx_name[OCTEONTX_MAX_NAME_LEN];
780 struct octeontx_nic *nic = NULL;
781 struct rte_eth_dev *eth_dev = NULL;
782 struct rte_eth_dev_data *data = NULL;
783 const char *name = rte_vdev_device_name(dev);
785 PMD_INIT_FUNC_TRACE();
787 sprintf(octtx_name, "%s_%d", name, port);
788 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
789 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
796 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
798 octeontx_log_err("failed to allocate devdata");
803 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
805 octeontx_log_err("failed to allocate nic structure");
813 res = octeontx_port_open(nic);
817 /* Rx side port configuration */
818 res = octeontx_pki_port_open(port);
820 octeontx_log_err("failed to open PKI port %d", port);
825 /* Reserve an ethdev entry */
826 eth_dev = rte_eth_dev_allocate(octtx_name);
827 if (eth_dev == NULL) {
828 octeontx_log_err("failed to allocate rte_eth_dev");
833 eth_dev->device = &dev->device;
834 eth_dev->intr_handle = NULL;
835 eth_dev->data->kdrv = RTE_KDRV_NONE;
836 eth_dev->data->numa_node = dev->device.numa_node;
838 rte_memcpy(data, (eth_dev)->data, sizeof(*data));
839 data->dev_private = nic;
841 data->port_id = eth_dev->data->port_id;
842 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
847 data->dev_link.link_status = ETH_LINK_DOWN;
848 data->dev_started = 0;
849 data->promiscuous = 0;
850 data->all_multicast = 0;
851 data->scattered_rx = 0;
853 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
855 if (data->mac_addrs == NULL) {
856 octeontx_log_err("failed to allocate memory for mac_addrs");
861 eth_dev->data = data;
862 eth_dev->dev_ops = &octeontx_dev_ops;
864 /* Finally save ethdev pointer to the NIC structure */
867 if (nic->port_id != data->port_id) {
868 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
869 data->port_id, nic->port_id);
874 /* Update port_id mac to eth_dev */
875 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
877 PMD_INIT_LOG(DEBUG, "ethdev info: ");
878 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
879 nic->port_id, nic->port_ena,
880 nic->base_ochan, nic->num_ochans,
882 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
884 return data->port_id;
888 octeontx_port_close(nic);
890 if (eth_dev != NULL) {
891 rte_free(eth_dev->data->mac_addrs);
894 rte_eth_dev_release_port(eth_dev);
900 /* Un initialize octeontx device */
902 octeontx_remove(struct rte_vdev_device *dev)
904 char octtx_name[OCTEONTX_MAX_NAME_LEN];
905 struct rte_eth_dev *eth_dev = NULL;
906 struct octeontx_nic *nic = NULL;
912 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
913 sprintf(octtx_name, "eth_octeontx_%d", i);
915 /* reserve an ethdev entry */
916 eth_dev = rte_eth_dev_allocated(octtx_name);
920 nic = octeontx_pmd_priv(eth_dev);
921 rte_event_dev_stop(nic->evdev);
922 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
924 rte_free(eth_dev->data->mac_addrs);
925 rte_free(eth_dev->data->dev_private);
926 rte_free(eth_dev->data);
927 rte_eth_dev_release_port(eth_dev);
928 rte_event_dev_close(nic->evdev);
931 /* Free FC resource */
932 octeontx_pko_fc_free();
937 /* Initialize octeontx device */
939 octeontx_probe(struct rte_vdev_device *dev)
941 const char *dev_name;
942 static int probe_once;
943 uint8_t socket_id, qlist;
944 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
945 struct rte_event_dev_config dev_conf;
946 const char *eventdev_name = "event_octeontx";
947 struct rte_event_dev_info info;
949 struct octeontx_vdev_init_params init_params = {
950 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
953 dev_name = rte_vdev_device_name(dev);
954 res = octeontx_parse_vdev_init_params(&init_params, dev);
958 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
959 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
960 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
964 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
966 socket_id = rte_socket_id();
968 tx_vfcnt = octeontx_pko_vf_count();
970 if (tx_vfcnt < init_params.nr_port) {
971 octeontx_log_err("not enough PKO (%d) for port number (%d)",
972 tx_vfcnt, init_params.nr_port);
975 evdev = rte_event_dev_get_dev_id(eventdev_name);
977 octeontx_log_err("eventdev %s not found", eventdev_name);
981 res = rte_event_dev_info_get(evdev, &info);
983 octeontx_log_err("failed to eventdev info %d", res);
987 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
988 info.max_event_queues, info.max_event_ports);
990 if (octeontx_pko_init_fc(tx_vfcnt))
993 devconf_set_default_sane_values(&dev_conf, &info);
994 res = rte_event_dev_configure(evdev, &dev_conf);
998 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1000 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1003 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1010 * We don't poll on event ports
1011 * that do not have any queues assigned.
1015 "reducing number of active event ports to %d", pnum);
1017 for (i = 0; i < qnum; i++) {
1018 res = rte_event_queue_setup(evdev, i, NULL);
1020 octeontx_log_err("failed to setup event_q(%d): res %d",
1026 for (i = 0; i < pnum; i++) {
1027 res = rte_event_port_setup(evdev, i, NULL);
1030 octeontx_log_err("failed to setup ev port(%d) res=%d",
1034 /* Link one queue to one event port */
1036 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1039 octeontx_log_err("failed to link port (%d): res=%d",
1045 /* Create ethdev interface */
1046 for (i = 0; i < init_params.nr_port; i++) {
1047 port_id = octeontx_create(dev, i, evdev, socket_id);
1049 octeontx_log_err("failed to create device %s",
1055 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1060 octeontx_log_err("interface %s not supported", dev_name);
1061 octeontx_remove(dev);
1070 octeontx_pko_fc_free();
1074 static struct rte_vdev_driver octeontx_pmd_drv = {
1075 .probe = octeontx_probe,
1076 .remove = octeontx_remove,
1079 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1080 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1081 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");