1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
27 struct evdev_priv_data {
28 OFFLOAD_FLAGS; /*Sequence should not be changed */
29 } __rte_cache_aligned;
31 struct octeontx_vdev_init_params {
36 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
38 enum octeontx_link_speed {
39 OCTEONTX_LINK_SPEED_SGMII,
40 OCTEONTX_LINK_SPEED_XAUI,
41 OCTEONTX_LINK_SPEED_RXAUI,
42 OCTEONTX_LINK_SPEED_10G_R,
43 OCTEONTX_LINK_SPEED_40G_R,
44 OCTEONTX_LINK_SPEED_RESERVE1,
45 OCTEONTX_LINK_SPEED_QSGMII,
46 OCTEONTX_LINK_SPEED_RESERVE2
49 int otx_net_logtype_mbox;
50 int otx_net_logtype_init;
51 int otx_net_logtype_driver;
53 RTE_INIT(otx_net_init_log)
55 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
56 if (otx_net_logtype_mbox >= 0)
57 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
59 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
60 if (otx_net_logtype_init >= 0)
61 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
63 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
64 if (otx_net_logtype_driver >= 0)
65 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
68 /* Parse integer from integer argument */
70 parse_integer_arg(const char *key __rte_unused,
71 const char *value, void *extra_args)
73 int *i = (int *)extra_args;
77 octeontx_log_err("argument has to be positive.");
85 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
86 struct rte_vdev_device *dev)
88 struct rte_kvargs *kvlist = NULL;
91 static const char * const octeontx_vdev_valid_params[] = {
92 OCTEONTX_VDEV_NR_PORT_ARG,
96 const char *input_args = rte_vdev_device_args(dev);
102 kvlist = rte_kvargs_parse(input_args,
103 octeontx_vdev_valid_params);
107 ret = rte_kvargs_process(kvlist,
108 OCTEONTX_VDEV_NR_PORT_ARG,
116 rte_kvargs_free(kvlist);
121 octeontx_port_open(struct octeontx_nic *nic)
123 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
127 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
128 PMD_INIT_FUNC_TRACE();
130 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
132 octeontx_log_err("failed to open port %d", res);
136 nic->node = bgx_port_conf.node;
137 nic->port_ena = bgx_port_conf.enable;
138 nic->base_ichan = bgx_port_conf.base_chan;
139 nic->base_ochan = bgx_port_conf.base_chan;
140 nic->num_ichans = bgx_port_conf.num_chans;
141 nic->num_ochans = bgx_port_conf.num_chans;
142 nic->bgx_mtu = bgx_port_conf.mtu;
143 nic->bpen = bgx_port_conf.bpen;
144 nic->fcs_strip = bgx_port_conf.fcs_strip;
145 nic->bcast_mode = bgx_port_conf.bcast_mode;
146 nic->mcast_mode = bgx_port_conf.mcast_mode;
147 nic->speed = bgx_port_conf.mode;
149 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
152 octeontx_log_dbg("port opened %d", nic->port_id);
157 octeontx_port_close(struct octeontx_nic *nic)
159 PMD_INIT_FUNC_TRACE();
161 octeontx_bgx_port_close(nic->port_id);
162 octeontx_log_dbg("port closed %d", nic->port_id);
166 octeontx_port_start(struct octeontx_nic *nic)
168 PMD_INIT_FUNC_TRACE();
170 return octeontx_bgx_port_start(nic->port_id);
174 octeontx_port_stop(struct octeontx_nic *nic)
176 PMD_INIT_FUNC_TRACE();
178 return octeontx_bgx_port_stop(nic->port_id);
182 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
184 struct rte_eth_dev *dev;
188 PMD_INIT_FUNC_TRACE();
191 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
193 octeontx_log_err("failed to set promiscuous mode %d",
198 /* Set proper flag for the mode */
199 dev->data->promiscuous = (en != 0) ? 1 : 0;
201 octeontx_log_dbg("port %d : promiscuous mode %s",
202 nic->port_id, en ? "set" : "unset");
208 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
210 octeontx_mbox_bgx_port_stats_t bgx_stats;
213 PMD_INIT_FUNC_TRACE();
215 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
217 octeontx_log_err("failed to get port stats %d", nic->port_id);
221 stats->ipackets = bgx_stats.rx_packets;
222 stats->ibytes = bgx_stats.rx_bytes;
223 stats->imissed = bgx_stats.rx_dropped;
224 stats->ierrors = bgx_stats.rx_errors;
225 stats->opackets = bgx_stats.tx_packets;
226 stats->obytes = bgx_stats.tx_bytes;
227 stats->oerrors = bgx_stats.tx_errors;
229 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
230 nic->port_id, stats->ipackets, stats->opackets);
236 octeontx_port_stats_clr(struct octeontx_nic *nic)
238 PMD_INIT_FUNC_TRACE();
240 return octeontx_bgx_port_stats_clr(nic->port_id);
244 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
245 struct rte_event_dev_info *info)
247 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
248 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
250 dev_conf->nb_event_ports = info->max_event_ports;
251 dev_conf->nb_event_queues = info->max_event_queues;
253 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
254 dev_conf->nb_event_port_dequeue_depth =
255 info->max_event_port_dequeue_depth;
256 dev_conf->nb_event_port_enqueue_depth =
257 info->max_event_port_enqueue_depth;
258 dev_conf->nb_event_port_enqueue_depth =
259 info->max_event_port_enqueue_depth;
260 dev_conf->nb_events_limit =
261 info->max_num_events;
265 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
267 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
270 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
271 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
273 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
274 flags |= OCCTX_TX_MULTI_SEG_F;
280 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
282 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
283 struct rte_eth_dev_data *data = eth_dev->data;
284 struct rte_eth_conf *conf = &data->dev_conf;
285 struct rte_eth_rxmode *rxmode = &conf->rxmode;
288 if (rxmode->mq_mode == ETH_MQ_RX_RSS)
289 flags |= OCCTX_RX_OFFLOAD_RSS_F;
291 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
292 flags |= OCCTX_RX_MULTI_SEG_F;
293 eth_dev->data->scattered_rx = 1;
294 /* If scatter mode is enabled, TX should also be in multi
295 * seg mode, else memory leak will occur
297 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
304 octeontx_dev_configure(struct rte_eth_dev *dev)
306 struct rte_eth_dev_data *data = dev->data;
307 struct rte_eth_conf *conf = &data->dev_conf;
308 struct rte_eth_rxmode *rxmode = &conf->rxmode;
309 struct rte_eth_txmode *txmode = &conf->txmode;
310 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
313 PMD_INIT_FUNC_TRACE();
316 if (!rte_eal_has_hugepages()) {
317 octeontx_log_err("huge page is not configured");
321 if (txmode->mq_mode) {
322 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
326 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
327 rxmode->mq_mode != ETH_MQ_RX_RSS) {
328 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
332 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
333 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
334 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
337 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
338 octeontx_log_err("setting link speed/duplex not supported");
342 if (conf->dcb_capability_en) {
343 octeontx_log_err("DCB enable not supported");
347 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
348 octeontx_log_err("flow director not supported");
352 nic->num_tx_queues = dev->data->nb_tx_queues;
354 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
358 octeontx_log_err("failed to open channel %d no-of-txq %d",
359 nic->base_ochan, nic->num_tx_queues);
363 nic->pki.classifier_enable = false;
364 nic->pki.hash_enable = true;
365 nic->pki.initialized = false;
367 nic->rx_offloads |= rxmode->offloads;
368 nic->tx_offloads |= txmode->offloads;
369 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
370 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
376 octeontx_dev_close(struct rte_eth_dev *dev)
378 struct octeontx_txq *txq = NULL;
379 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
383 PMD_INIT_FUNC_TRACE();
385 rte_event_dev_close(nic->evdev);
387 ret = octeontx_pko_channel_close(nic->base_ochan);
389 octeontx_log_err("failed to close channel %d VF%d %d %d",
390 nic->base_ochan, nic->port_id, nic->num_tx_queues,
393 /* Free txq resources for this port */
394 for (i = 0; i < nic->num_tx_queues; i++) {
395 txq = dev->data->tx_queues[i];
402 /* Free MAC address table */
403 rte_free(dev->data->mac_addrs);
404 dev->data->mac_addrs = NULL;
406 dev->tx_pkt_burst = NULL;
407 dev->rx_pkt_burst = NULL;
411 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
413 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
414 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
415 struct rte_eth_dev_data *data = eth_dev->data;
418 /* Check if MTU is within the allowed range */
419 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)
422 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
424 /* Refuse MTU that requires the support of scattered packets
425 * when this feature has not been enabled before.
427 if (data->dev_started && frame_size > buffsz &&
428 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {
429 octeontx_log_err("Scatter mode is disabled");
433 /* Check <seg size> * <max_seg> >= max_frame */
434 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
435 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
438 rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
442 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
446 if (frame_size > RTE_ETHER_MAX_LEN)
447 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
449 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
451 /* Update max_rx_pkt_len */
452 data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
453 octeontx_log_info("Received pkt beyond maxlen %d will be dropped",
460 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
462 struct rte_eth_dev *eth_dev = rxq->eth_dev;
463 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
464 struct rte_eth_dev_data *data = eth_dev->data;
465 struct rte_pktmbuf_pool_private *mbp_priv;
466 struct evdev_priv_data *evdev_priv;
467 struct rte_eventdev *dev;
470 /* Get rx buffer size */
471 mbp_priv = rte_mempool_get_priv(rxq->pool);
472 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
474 /* Setup scatter mode if needed by jumbo */
475 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
476 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
477 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
478 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
481 /* Sharing offload flags via eventdev priv region */
482 dev = &rte_eventdevs[rxq->evdev];
483 evdev_priv = dev->data->dev_private;
484 evdev_priv->rx_offload_flags = nic->rx_offload_flags;
485 evdev_priv->tx_offload_flags = nic->tx_offload_flags;
487 /* Setup MTU based on max_rx_pkt_len */
488 nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;
494 octeontx_dev_start(struct rte_eth_dev *dev)
496 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
497 struct octeontx_rxq *rxq;
500 PMD_INIT_FUNC_TRACE();
501 /* Rechecking if any new offload set to update
502 * rx/tx burst function pointer accordingly.
504 for (i = 0; i < dev->data->nb_rx_queues; i++) {
505 rxq = dev->data->rx_queues[i];
506 octeontx_recheck_rx_offloads(rxq);
509 /* Setting up the mtu based on max_rx_pkt_len */
510 ret = octeontx_dev_mtu_set(dev, nic->mtu);
512 octeontx_log_err("Failed to set default MTU size %d", ret);
519 octeontx_set_tx_function(dev);
520 ret = octeontx_pko_channel_start(nic->base_ochan);
522 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
523 nic->port_id, nic->num_tx_queues, nic->base_ochan,
531 dev->rx_pkt_burst = octeontx_recv_pkts;
532 ret = octeontx_pki_port_start(nic->port_id);
534 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
535 goto channel_stop_error;
541 ret = octeontx_port_start(nic);
543 octeontx_log_err("failed start port %d", ret);
544 goto pki_port_stop_error;
547 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
548 nic->base_ochan, nic->num_tx_queues, nic->port_id);
550 ret = rte_event_dev_start(nic->evdev);
552 octeontx_log_err("failed to start evdev: ret (%d)", ret);
553 goto pki_port_stop_error;
560 octeontx_pki_port_stop(nic->port_id);
562 octeontx_pko_channel_stop(nic->base_ochan);
568 octeontx_dev_stop(struct rte_eth_dev *dev)
570 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
573 PMD_INIT_FUNC_TRACE();
575 rte_event_dev_stop(nic->evdev);
577 ret = octeontx_port_stop(nic);
579 octeontx_log_err("failed to req stop port %d res=%d",
584 ret = octeontx_pki_port_stop(nic->port_id);
586 octeontx_log_err("failed to stop pki port %d res=%d",
591 ret = octeontx_pko_channel_stop(nic->base_ochan);
593 octeontx_log_err("failed to stop channel %d VF%d %d %d",
594 nic->base_ochan, nic->port_id, nic->num_tx_queues,
601 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
603 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
605 PMD_INIT_FUNC_TRACE();
606 return octeontx_port_promisc_set(nic, 1);
610 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
612 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
614 PMD_INIT_FUNC_TRACE();
615 return octeontx_port_promisc_set(nic, 0);
619 octeontx_port_link_status(struct octeontx_nic *nic)
623 PMD_INIT_FUNC_TRACE();
624 res = octeontx_bgx_port_link_status(nic->port_id);
626 octeontx_log_err("failed to get port %d link status",
631 nic->link_up = (uint8_t)res;
632 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
638 * Return 0 means link status changed, -1 means not changed
641 octeontx_dev_link_update(struct rte_eth_dev *dev,
642 int wait_to_complete __rte_unused)
644 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
645 struct rte_eth_link link;
648 PMD_INIT_FUNC_TRACE();
650 res = octeontx_port_link_status(nic);
652 octeontx_log_err("failed to request link status %d", res);
656 link.link_status = nic->link_up;
658 switch (nic->speed) {
659 case OCTEONTX_LINK_SPEED_SGMII:
660 link.link_speed = ETH_SPEED_NUM_1G;
663 case OCTEONTX_LINK_SPEED_XAUI:
664 link.link_speed = ETH_SPEED_NUM_10G;
667 case OCTEONTX_LINK_SPEED_RXAUI:
668 case OCTEONTX_LINK_SPEED_10G_R:
669 link.link_speed = ETH_SPEED_NUM_10G;
671 case OCTEONTX_LINK_SPEED_QSGMII:
672 link.link_speed = ETH_SPEED_NUM_5G;
674 case OCTEONTX_LINK_SPEED_40G_R:
675 link.link_speed = ETH_SPEED_NUM_40G;
678 case OCTEONTX_LINK_SPEED_RESERVE1:
679 case OCTEONTX_LINK_SPEED_RESERVE2:
681 link.link_speed = ETH_SPEED_NUM_NONE;
682 octeontx_log_err("incorrect link speed %d", nic->speed);
686 link.link_duplex = ETH_LINK_FULL_DUPLEX;
687 link.link_autoneg = ETH_LINK_AUTONEG;
689 return rte_eth_linkstatus_set(dev, &link);
693 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
695 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
697 PMD_INIT_FUNC_TRACE();
698 return octeontx_port_stats(nic, stats);
702 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
704 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
706 PMD_INIT_FUNC_TRACE();
707 return octeontx_port_stats_clr(nic);
711 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
713 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
716 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
718 octeontx_log_err("failed to del MAC address filter on port %d",
723 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
724 struct rte_ether_addr *mac_addr,
726 __rte_unused uint32_t vmdq)
728 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
731 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
734 octeontx_log_err("failed to add MAC address filter on port %d",
743 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
744 struct rte_ether_addr *addr)
746 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
749 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
751 /* Update same mac address to BGX CAM table */
752 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
756 octeontx_log_err("failed to set MAC address on port %d",
764 octeontx_dev_info(struct rte_eth_dev *dev,
765 struct rte_eth_dev_info *dev_info)
767 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
769 /* Autonegotiation may be disabled */
770 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
771 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
772 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
775 /* Min/Max MTU supported */
776 dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
777 dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
778 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
779 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
781 dev_info->max_mac_addrs =
782 octeontx_bgx_port_mac_entries_get(nic->port_id);
783 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
784 dev_info->max_rx_queues = 1;
785 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
786 dev_info->min_rx_bufsize = 0;
788 dev_info->default_rxconf = (struct rte_eth_rxconf) {
791 .offloads = OCTEONTX_RX_OFFLOADS,
794 dev_info->default_txconf = (struct rte_eth_txconf) {
796 .offloads = OCTEONTX_TX_OFFLOADS,
799 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
800 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
801 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
802 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
808 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
810 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
811 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
812 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
816 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
819 struct octeontx_txq *txq;
822 PMD_INIT_FUNC_TRACE();
824 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
827 txq = dev->data->tx_queues[qidx];
829 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
831 sizeof(octeontx_dq_t),
833 octeontx_dq_info_getter);
839 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
843 (void)octeontx_port_stop(nic);
844 octeontx_pko_channel_stop(nic->base_ochan);
845 octeontx_pko_channel_close(nic->base_ochan);
846 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
851 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
853 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
855 PMD_INIT_FUNC_TRACE();
856 qidx = qidx % PKO_VF_NUM_DQ;
857 return octeontx_vf_start_tx_queue(dev, nic, qidx);
861 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
867 PMD_INIT_FUNC_TRACE();
869 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
872 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
877 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
879 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
881 PMD_INIT_FUNC_TRACE();
882 qidx = qidx % PKO_VF_NUM_DQ;
884 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
888 octeontx_dev_tx_queue_release(void *tx_queue)
890 struct octeontx_txq *txq = tx_queue;
893 PMD_INIT_FUNC_TRACE();
896 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
898 octeontx_log_err("failed stop tx_queue(%d)\n",
906 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
907 uint16_t nb_desc, unsigned int socket_id,
908 const struct rte_eth_txconf *tx_conf __rte_unused)
910 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
911 struct octeontx_txq *txq = NULL;
915 RTE_SET_USED(nb_desc);
916 RTE_SET_USED(socket_id);
918 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
920 /* Socket id check */
921 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
922 socket_id != (unsigned int)nic->node)
923 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
924 socket_id, nic->node);
926 /* Free memory prior to re-allocation if needed. */
927 if (dev->data->tx_queues[qidx] != NULL) {
928 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
930 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
931 dev->data->tx_queues[qidx] = NULL;
934 /* Allocating tx queue data structure */
935 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
936 RTE_CACHE_LINE_SIZE, nic->node);
938 octeontx_log_err("failed to allocate txq=%d", qidx);
944 txq->queue_id = dq_num;
945 dev->data->tx_queues[qidx] = txq;
946 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
948 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
950 sizeof(octeontx_dq_t),
952 octeontx_dq_info_getter);
958 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
959 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
961 txq->dq.fc_status_va);
973 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
974 uint16_t nb_desc, unsigned int socket_id,
975 const struct rte_eth_rxconf *rx_conf,
976 struct rte_mempool *mb_pool)
978 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
979 struct rte_mempool_ops *mp_ops = NULL;
980 struct octeontx_rxq *rxq = NULL;
981 pki_pktbuf_cfg_t pktbuf_conf;
982 pki_hash_cfg_t pki_hash;
983 pki_qos_cfg_t pki_qos;
987 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
988 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
990 RTE_SET_USED(nb_desc);
992 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
993 memset(&pki_hash, 0, sizeof(pki_hash));
994 memset(&pki_qos, 0, sizeof(pki_qos));
996 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
997 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
998 octeontx_log_err("failed to find octeontx_fpavf mempool");
1002 /* Handle forbidden configurations */
1003 if (nic->pki.classifier_enable) {
1004 octeontx_log_err("cannot setup queue %d. "
1005 "Classifier option unsupported", qidx);
1009 port = nic->port_id;
1011 /* Rx deferred start is not supported */
1012 if (rx_conf->rx_deferred_start) {
1013 octeontx_log_err("rx deferred start not supported");
1017 /* Verify queue index */
1018 if (qidx >= dev->data->nb_rx_queues) {
1019 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
1020 qidx, (dev->data->nb_rx_queues - 1));
1024 /* Socket id check */
1025 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1026 socket_id != (unsigned int)nic->node)
1027 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1028 socket_id, nic->node);
1030 /* Allocating rx queue data structure */
1031 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1032 RTE_CACHE_LINE_SIZE, nic->node);
1034 octeontx_log_err("failed to allocate rxq=%d", qidx);
1038 if (!nic->pki.initialized) {
1039 pktbuf_conf.port_type = 0;
1040 pki_hash.port_type = 0;
1041 pki_qos.port_type = 0;
1043 pktbuf_conf.mmask.f_wqe_skip = 1;
1044 pktbuf_conf.mmask.f_first_skip = 1;
1045 pktbuf_conf.mmask.f_later_skip = 1;
1046 pktbuf_conf.mmask.f_mbuff_size = 1;
1047 pktbuf_conf.mmask.f_cache_mode = 1;
1049 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1050 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1051 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1052 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1053 RTE_PKTMBUF_HEADROOM -
1054 rte_pktmbuf_priv_size(mb_pool) -
1055 sizeof(struct rte_mbuf));
1057 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1059 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1061 octeontx_log_err("fail to configure pktbuf for port %d",
1066 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1067 "\tmbuf_size:\t0x%0x\n"
1068 "\twqe_skip:\t0x%0x\n"
1069 "\tfirst_skip:\t0x%0x\n"
1070 "\tlater_skip:\t0x%0x\n"
1071 "\tcache_mode:\t%s\n",
1073 pktbuf_conf.mbuff_size,
1074 pktbuf_conf.wqe_skip,
1075 pktbuf_conf.first_skip,
1076 pktbuf_conf.later_skip,
1077 (pktbuf_conf.cache_mode ==
1080 (pktbuf_conf.cache_mode ==
1083 (pktbuf_conf.cache_mode ==
1084 PKI_OPC_MODE_STF1_STT) ?
1085 "STF1_STT" : "STF2_STT");
1087 if (nic->pki.hash_enable) {
1088 pki_hash.tag_dlc = 1;
1089 pki_hash.tag_slc = 1;
1090 pki_hash.tag_dlf = 1;
1091 pki_hash.tag_slf = 1;
1092 pki_hash.tag_prt = 1;
1093 octeontx_pki_port_hash_config(port, &pki_hash);
1096 pool = (uintptr_t)mb_pool->pool_id;
1098 /* Get the gaura Id */
1099 gaura = octeontx_fpa_bufpool_gaura(pool);
1101 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1102 pki_qos.num_entry = 1;
1103 pki_qos.drop_policy = 0;
1104 pki_qos.tag_type = 0L;
1105 pki_qos.qos_entry[0].port_add = 0;
1106 pki_qos.qos_entry[0].gaura = gaura;
1107 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1108 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1109 pki_qos.qos_entry[0].grptag_bad = 0;
1110 pki_qos.qos_entry[0].grptag_ok = 0;
1112 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1114 octeontx_log_err("failed to create QOS port=%d, q=%d",
1119 nic->pki.initialized = true;
1122 rxq->port_id = nic->port_id;
1124 rxq->queue_id = qidx;
1125 rxq->evdev = nic->evdev;
1126 rxq->ev_queues = ev_queues;
1127 rxq->ev_ports = ev_ports;
1128 rxq->pool = mb_pool;
1130 octeontx_recheck_rx_offloads(rxq);
1131 dev->data->rx_queues[qidx] = rxq;
1132 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1137 octeontx_dev_rx_queue_release(void *rxq)
1142 static const uint32_t *
1143 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1145 static const uint32_t ptypes[] = {
1147 RTE_PTYPE_L3_IPV4_EXT,
1149 RTE_PTYPE_L3_IPV6_EXT,
1156 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1163 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1167 if (!strcmp(pool, "octeontx_fpavf"))
1173 /* Initialize and register driver with DPDK Application */
1174 static const struct eth_dev_ops octeontx_dev_ops = {
1175 .dev_configure = octeontx_dev_configure,
1176 .dev_infos_get = octeontx_dev_info,
1177 .dev_close = octeontx_dev_close,
1178 .dev_start = octeontx_dev_start,
1179 .dev_stop = octeontx_dev_stop,
1180 .promiscuous_enable = octeontx_dev_promisc_enable,
1181 .promiscuous_disable = octeontx_dev_promisc_disable,
1182 .link_update = octeontx_dev_link_update,
1183 .stats_get = octeontx_dev_stats_get,
1184 .stats_reset = octeontx_dev_stats_reset,
1185 .mac_addr_remove = octeontx_dev_mac_addr_del,
1186 .mac_addr_add = octeontx_dev_mac_addr_add,
1187 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1188 .tx_queue_start = octeontx_dev_tx_queue_start,
1189 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1190 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1191 .tx_queue_release = octeontx_dev_tx_queue_release,
1192 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1193 .rx_queue_release = octeontx_dev_rx_queue_release,
1194 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1195 .mtu_set = octeontx_dev_mtu_set,
1196 .pool_ops_supported = octeontx_pool_ops,
1199 /* Create Ethdev interface per BGX LMAC ports */
1201 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1206 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1207 struct octeontx_nic *nic = NULL;
1208 struct rte_eth_dev *eth_dev = NULL;
1209 struct rte_eth_dev_data *data;
1210 const char *name = rte_vdev_device_name(dev);
1213 PMD_INIT_FUNC_TRACE();
1215 sprintf(octtx_name, "%s_%d", name, port);
1216 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1217 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1218 if (eth_dev == NULL)
1221 eth_dev->dev_ops = &octeontx_dev_ops;
1222 eth_dev->device = &dev->device;
1223 octeontx_set_tx_function(eth_dev);
1224 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1225 rte_eth_dev_probing_finish(eth_dev);
1229 /* Reserve an ethdev entry */
1230 eth_dev = rte_eth_dev_allocate(octtx_name);
1231 if (eth_dev == NULL) {
1232 octeontx_log_err("failed to allocate rte_eth_dev");
1236 data = eth_dev->data;
1238 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1240 octeontx_log_err("failed to allocate nic structure");
1244 data->dev_private = nic;
1245 pko_vfid = octeontx_pko_get_vfid();
1247 if (pko_vfid == SIZE_MAX) {
1248 octeontx_log_err("failed to get pko vfid");
1253 nic->pko_vfid = pko_vfid;
1254 nic->port_id = port;
1257 res = octeontx_port_open(nic);
1261 /* Rx side port configuration */
1262 res = octeontx_pki_port_open(port);
1264 octeontx_log_err("failed to open PKI port %d", port);
1269 eth_dev->device = &dev->device;
1270 eth_dev->intr_handle = NULL;
1271 eth_dev->data->kdrv = RTE_KDRV_NONE;
1272 eth_dev->data->numa_node = dev->device.numa_node;
1274 data->port_id = eth_dev->data->port_id;
1279 data->dev_link.link_status = ETH_LINK_DOWN;
1280 data->dev_started = 0;
1281 data->promiscuous = 0;
1282 data->all_multicast = 0;
1283 data->scattered_rx = 0;
1285 /* Get maximum number of supported MAC entries */
1286 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1287 if (max_entries < 0) {
1288 octeontx_log_err("Failed to get max entries for mac addr");
1293 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1294 RTE_ETHER_ADDR_LEN, 0,
1296 if (data->mac_addrs == NULL) {
1297 octeontx_log_err("failed to allocate memory for mac_addrs");
1302 eth_dev->dev_ops = &octeontx_dev_ops;
1304 /* Finally save ethdev pointer to the NIC structure */
1307 if (nic->port_id != data->port_id) {
1308 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1309 data->port_id, nic->port_id);
1311 goto free_mac_addrs;
1314 /* Update port_id mac to eth_dev */
1315 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1317 /* Update same mac address to BGX CAM table at index 0 */
1318 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1320 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1321 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1322 nic->port_id, nic->port_ena,
1323 nic->base_ochan, nic->num_ochans,
1324 nic->num_tx_queues);
1325 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1327 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1328 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1330 rte_eth_dev_probing_finish(eth_dev);
1331 return data->port_id;
1334 rte_free(data->mac_addrs);
1337 octeontx_port_close(nic);
1339 rte_eth_dev_release_port(eth_dev);
1344 /* Un initialize octeontx device */
1346 octeontx_remove(struct rte_vdev_device *dev)
1348 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1349 struct rte_eth_dev *eth_dev = NULL;
1350 struct octeontx_nic *nic = NULL;
1356 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1357 sprintf(octtx_name, "eth_octeontx_%d", i);
1359 /* reserve an ethdev entry */
1360 eth_dev = rte_eth_dev_allocated(octtx_name);
1361 if (eth_dev == NULL)
1364 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1365 rte_eth_dev_release_port(eth_dev);
1369 nic = octeontx_pmd_priv(eth_dev);
1370 rte_event_dev_stop(nic->evdev);
1371 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1373 rte_eth_dev_release_port(eth_dev);
1374 rte_event_dev_close(nic->evdev);
1377 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1380 /* Free FC resource */
1381 octeontx_pko_fc_free();
1386 /* Initialize octeontx device */
1388 octeontx_probe(struct rte_vdev_device *dev)
1390 const char *dev_name;
1391 static int probe_once;
1392 uint8_t socket_id, qlist;
1393 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1394 struct rte_event_dev_config dev_conf;
1395 const char *eventdev_name = "event_octeontx";
1396 struct rte_event_dev_info info;
1397 struct rte_eth_dev *eth_dev;
1399 struct octeontx_vdev_init_params init_params = {
1400 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1403 dev_name = rte_vdev_device_name(dev);
1405 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1406 strlen(rte_vdev_device_args(dev)) == 0) {
1407 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1409 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1412 /* TODO: request info from primary to set up Rx and Tx */
1413 eth_dev->dev_ops = &octeontx_dev_ops;
1414 eth_dev->device = &dev->device;
1415 rte_eth_dev_probing_finish(eth_dev);
1419 res = octeontx_parse_vdev_init_params(&init_params, dev);
1423 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1424 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1425 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1429 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1431 socket_id = rte_socket_id();
1433 tx_vfcnt = octeontx_pko_vf_count();
1435 if (tx_vfcnt < init_params.nr_port) {
1436 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1437 tx_vfcnt, init_params.nr_port);
1440 evdev = rte_event_dev_get_dev_id(eventdev_name);
1442 octeontx_log_err("eventdev %s not found", eventdev_name);
1446 res = rte_event_dev_info_get(evdev, &info);
1448 octeontx_log_err("failed to eventdev info %d", res);
1452 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1453 info.max_event_queues, info.max_event_ports);
1455 if (octeontx_pko_init_fc(tx_vfcnt))
1458 devconf_set_default_sane_values(&dev_conf, &info);
1459 res = rte_event_dev_configure(evdev, &dev_conf);
1463 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1465 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1468 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1474 /* Enable all queues available */
1475 for (i = 0; i < qnum; i++) {
1476 res = rte_event_queue_setup(evdev, i, NULL);
1478 octeontx_log_err("failed to setup event_q(%d): res %d",
1484 /* Enable all ports available */
1485 for (i = 0; i < pnum; i++) {
1486 res = rte_event_port_setup(evdev, i, NULL);
1489 octeontx_log_err("failed to setup ev port(%d) res=%d",
1496 * Do 1:1 links for ports & queues. All queues would be mapped to
1497 * one port. If there are more ports than queues, then some ports
1498 * won't be linked to any queue.
1500 for (i = 0; i < qnum; i++) {
1501 /* Link one queue to one event port */
1503 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1506 octeontx_log_err("failed to link port (%d): res=%d",
1512 /* Create ethdev interface */
1513 for (i = 0; i < init_params.nr_port; i++) {
1514 port_id = octeontx_create(dev, i, evdev, socket_id);
1516 octeontx_log_err("failed to create device %s",
1522 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1527 octeontx_log_err("interface %s not supported", dev_name);
1528 octeontx_remove(dev);
1532 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1538 octeontx_pko_fc_free();
1542 static struct rte_vdev_driver octeontx_pmd_drv = {
1543 .probe = octeontx_probe,
1544 .remove = octeontx_remove,
1547 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1548 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1549 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");