1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <eventdev_pmd.h>
13 #include <rte_alarm.h>
14 #include <rte_branch_prediction.h>
15 #include <rte_bus_vdev.h>
16 #include <rte_cycles.h>
17 #include <rte_debug.h>
19 #include <rte_devargs.h>
20 #include <rte_kvargs.h>
21 #include <rte_malloc.h>
22 #include <rte_mbuf_pool_ops.h>
23 #include <rte_prefetch.h>
25 #include "octeontx_ethdev.h"
26 #include "octeontx_rxtx.h"
27 #include "octeontx_logs.h"
29 struct evdev_priv_data {
30 OFFLOAD_FLAGS; /*Sequence should not be changed */
31 } __rte_cache_aligned;
33 struct octeontx_vdev_init_params {
38 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
40 enum octeontx_link_speed {
41 OCTEONTX_LINK_SPEED_SGMII,
42 OCTEONTX_LINK_SPEED_XAUI,
43 OCTEONTX_LINK_SPEED_RXAUI,
44 OCTEONTX_LINK_SPEED_10G_R,
45 OCTEONTX_LINK_SPEED_40G_R,
46 OCTEONTX_LINK_SPEED_RESERVE1,
47 OCTEONTX_LINK_SPEED_QSGMII,
48 OCTEONTX_LINK_SPEED_RESERVE2
51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE);
52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE);
53 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE);
55 /* Parse integer from integer argument */
57 parse_integer_arg(const char *key __rte_unused,
58 const char *value, void *extra_args)
60 int *i = (int *)extra_args;
64 octeontx_log_err("argument has to be positive.");
72 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
73 struct rte_vdev_device *dev)
75 struct rte_kvargs *kvlist = NULL;
78 static const char * const octeontx_vdev_valid_params[] = {
79 OCTEONTX_VDEV_NR_PORT_ARG,
83 const char *input_args = rte_vdev_device_args(dev);
89 kvlist = rte_kvargs_parse(input_args,
90 octeontx_vdev_valid_params);
94 ret = rte_kvargs_process(kvlist,
95 OCTEONTX_VDEV_NR_PORT_ARG,
103 rte_kvargs_free(kvlist);
108 octeontx_port_open(struct octeontx_nic *nic)
110 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
111 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg;
115 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
116 PMD_INIT_FUNC_TRACE();
118 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
120 octeontx_log_err("failed to open port %d", res);
124 nic->node = bgx_port_conf.node;
125 nic->port_ena = bgx_port_conf.enable;
126 nic->base_ichan = bgx_port_conf.base_chan;
127 nic->base_ochan = bgx_port_conf.base_chan;
128 nic->num_ichans = bgx_port_conf.num_chans;
129 nic->num_ochans = bgx_port_conf.num_chans;
130 nic->bgx_mtu = bgx_port_conf.mtu;
131 nic->bpen = bgx_port_conf.bpen;
132 nic->fcs_strip = bgx_port_conf.fcs_strip;
133 nic->bcast_mode = bgx_port_conf.bcast_mode;
134 nic->mcast_mode = bgx_port_conf.mcast_mode;
135 nic->speed = bgx_port_conf.mode;
137 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg));
139 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg);
141 octeontx_log_err("failed to get port %d fifo cfg", res);
145 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz;
147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
150 octeontx_log_dbg("port opened %d", nic->port_id);
155 octeontx_link_status_print(struct rte_eth_dev *eth_dev,
156 struct rte_eth_link *link)
158 if (link && link->link_status)
159 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s",
160 (eth_dev->data->port_id),
162 link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX ?
163 "full-duplex" : "half-duplex");
165 octeontx_log_info("Port %d: Link Down",
166 (int)(eth_dev->data->port_id));
170 octeontx_link_status_update(struct octeontx_nic *nic,
171 struct rte_eth_link *link)
173 memset(link, 0, sizeof(*link));
175 link->link_status = nic->link_up ? RTE_ETH_LINK_UP : RTE_ETH_LINK_DOWN;
177 switch (nic->speed) {
178 case OCTEONTX_LINK_SPEED_SGMII:
179 link->link_speed = RTE_ETH_SPEED_NUM_1G;
182 case OCTEONTX_LINK_SPEED_XAUI:
183 link->link_speed = RTE_ETH_SPEED_NUM_10G;
186 case OCTEONTX_LINK_SPEED_RXAUI:
187 case OCTEONTX_LINK_SPEED_10G_R:
188 link->link_speed = RTE_ETH_SPEED_NUM_10G;
190 case OCTEONTX_LINK_SPEED_QSGMII:
191 link->link_speed = RTE_ETH_SPEED_NUM_5G;
193 case OCTEONTX_LINK_SPEED_40G_R:
194 link->link_speed = RTE_ETH_SPEED_NUM_40G;
197 case OCTEONTX_LINK_SPEED_RESERVE1:
198 case OCTEONTX_LINK_SPEED_RESERVE2:
200 link->link_speed = RTE_ETH_SPEED_NUM_NONE;
201 octeontx_log_err("incorrect link speed %d", nic->speed);
205 link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
206 link->link_autoneg = RTE_ETH_LINK_AUTONEG;
210 octeontx_link_status_poll(void *arg)
212 struct octeontx_nic *nic = arg;
213 struct rte_eth_link link;
214 struct rte_eth_dev *dev;
217 PMD_INIT_FUNC_TRACE();
221 res = octeontx_bgx_port_link_status(nic->port_id);
223 octeontx_log_err("Failed to get port %d link status",
226 if (nic->link_up != (uint8_t)res) {
227 nic->link_up = (uint8_t)res;
228 octeontx_link_status_update(nic, &link);
229 octeontx_link_status_print(dev, &link);
230 rte_eth_linkstatus_set(dev, &link);
231 rte_eth_dev_callback_process(dev,
232 RTE_ETH_EVENT_INTR_LSC,
237 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
238 octeontx_link_status_poll, nic);
240 octeontx_log_err("Failed to restart alarm for port %d, err: %d",
245 octeontx_port_close(struct octeontx_nic *nic)
247 PMD_INIT_FUNC_TRACE();
249 rte_eal_alarm_cancel(octeontx_link_status_poll, nic);
250 octeontx_bgx_port_close(nic->port_id);
251 octeontx_log_dbg("port closed %d", nic->port_id);
255 octeontx_port_start(struct octeontx_nic *nic)
257 PMD_INIT_FUNC_TRACE();
259 return octeontx_bgx_port_start(nic->port_id);
263 octeontx_port_stop(struct octeontx_nic *nic)
265 PMD_INIT_FUNC_TRACE();
267 return octeontx_bgx_port_stop(nic->port_id);
271 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
273 struct rte_eth_dev *dev;
277 PMD_INIT_FUNC_TRACE();
280 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
282 octeontx_log_err("failed to set promiscuous mode %d",
287 /* Set proper flag for the mode */
288 dev->data->promiscuous = (en != 0) ? 1 : 0;
290 octeontx_log_dbg("port %d : promiscuous mode %s",
291 nic->port_id, en ? "set" : "unset");
297 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
299 octeontx_mbox_bgx_port_stats_t bgx_stats;
302 PMD_INIT_FUNC_TRACE();
304 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
306 octeontx_log_err("failed to get port stats %d", nic->port_id);
310 stats->ipackets = bgx_stats.rx_packets;
311 stats->ibytes = bgx_stats.rx_bytes;
312 stats->imissed = bgx_stats.rx_dropped;
313 stats->ierrors = bgx_stats.rx_errors;
314 stats->opackets = bgx_stats.tx_packets;
315 stats->obytes = bgx_stats.tx_bytes;
316 stats->oerrors = bgx_stats.tx_errors;
318 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
319 nic->port_id, stats->ipackets, stats->opackets);
325 octeontx_port_stats_clr(struct octeontx_nic *nic)
327 PMD_INIT_FUNC_TRACE();
329 return octeontx_bgx_port_stats_clr(nic->port_id);
333 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
334 struct rte_event_dev_info *info)
336 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
337 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
339 dev_conf->nb_event_ports = info->max_event_ports;
340 dev_conf->nb_event_queues = info->max_event_queues;
342 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
343 dev_conf->nb_event_port_dequeue_depth =
344 info->max_event_port_dequeue_depth;
345 dev_conf->nb_event_port_enqueue_depth =
346 info->max_event_port_enqueue_depth;
347 dev_conf->nb_event_port_enqueue_depth =
348 info->max_event_port_enqueue_depth;
349 dev_conf->nb_events_limit =
350 info->max_num_events;
354 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
356 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
359 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM ||
360 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM)
361 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F;
363 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM ||
364 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM ||
365 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM ||
366 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM)
367 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F;
369 if (!(nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE))
370 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
372 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
373 flags |= OCCTX_TX_MULTI_SEG_F;
379 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
381 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
384 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
385 RTE_ETH_RX_OFFLOAD_UDP_CKSUM))
386 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
388 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
389 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM))
390 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
392 if (nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
393 flags |= OCCTX_RX_MULTI_SEG_F;
394 eth_dev->data->scattered_rx = 1;
395 /* If scatter mode is enabled, TX should also be in multi
396 * seg mode, else memory leak will occur
398 nic->tx_offloads |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
405 octeontx_dev_configure(struct rte_eth_dev *dev)
407 struct rte_eth_dev_data *data = dev->data;
408 struct rte_eth_conf *conf = &data->dev_conf;
409 struct rte_eth_rxmode *rxmode = &conf->rxmode;
410 struct rte_eth_txmode *txmode = &conf->txmode;
411 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
414 PMD_INIT_FUNC_TRACE();
417 if (!rte_eal_has_hugepages()) {
418 octeontx_log_err("huge page is not configured");
422 if (txmode->mq_mode) {
423 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
427 if (rxmode->mq_mode != RTE_ETH_MQ_RX_NONE &&
428 rxmode->mq_mode != RTE_ETH_MQ_RX_RSS) {
429 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
433 if (!(txmode->offloads & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE)) {
434 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
435 txmode->offloads |= RTE_ETH_TX_OFFLOAD_MT_LOCKFREE;
438 if (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) {
439 octeontx_log_err("setting link speed/duplex not supported");
443 if (conf->dcb_capability_en) {
444 octeontx_log_err("DCB enable not supported");
448 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
449 octeontx_log_err("flow director not supported");
453 nic->num_tx_queues = dev->data->nb_tx_queues;
455 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
459 octeontx_log_err("failed to open channel %d no-of-txq %d",
460 nic->base_ochan, nic->num_tx_queues);
464 ret = octeontx_dev_vlan_offload_init(dev);
466 octeontx_log_err("failed to initialize vlan offload");
470 nic->pki.classifier_enable = false;
471 nic->pki.hash_enable = true;
472 nic->pki.initialized = false;
474 nic->rx_offloads |= rxmode->offloads;
475 nic->tx_offloads |= txmode->offloads;
476 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
477 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
483 octeontx_dev_close(struct rte_eth_dev *dev)
485 struct octeontx_txq *txq = NULL;
486 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
490 PMD_INIT_FUNC_TRACE();
491 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
494 rte_event_dev_close(nic->evdev);
496 octeontx_dev_flow_ctrl_fini(dev);
498 octeontx_dev_vlan_offload_fini(dev);
500 ret = octeontx_pko_channel_close(nic->base_ochan);
502 octeontx_log_err("failed to close channel %d VF%d %d %d",
503 nic->base_ochan, nic->port_id, nic->num_tx_queues,
506 /* Free txq resources for this port */
507 for (i = 0; i < nic->num_tx_queues; i++) {
508 txq = dev->data->tx_queues[i];
515 octeontx_port_close(nic);
521 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
523 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
524 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
525 struct rte_eth_dev_data *data = eth_dev->data;
528 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
530 /* Refuse MTU that requires the support of scattered packets
531 * when this feature has not been enabled before.
533 if (data->dev_started && frame_size > buffsz &&
534 !(nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
535 octeontx_log_err("Scatter mode is disabled");
539 /* Check <seg size> * <max_seg> >= max_frame */
540 if ((nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) &&
541 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
544 rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
548 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
552 octeontx_log_info("Received pkt beyond maxlen %d will be dropped",
559 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
561 struct rte_eth_dev *eth_dev = rxq->eth_dev;
562 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
563 struct rte_eth_dev_data *data = eth_dev->data;
564 struct rte_pktmbuf_pool_private *mbp_priv;
565 struct evdev_priv_data *evdev_priv;
566 struct rte_eventdev *dev;
569 /* Get rx buffer size */
570 mbp_priv = rte_mempool_get_priv(rxq->pool);
571 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
573 /* Setup scatter mode if needed by jumbo */
574 if (data->mtu > buffsz) {
575 nic->rx_offloads |= RTE_ETH_RX_OFFLOAD_SCATTER;
576 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
577 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
580 /* Sharing offload flags via eventdev priv region */
581 dev = &rte_eventdevs[rxq->evdev];
582 evdev_priv = dev->data->dev_private;
583 evdev_priv->rx_offload_flags = nic->rx_offload_flags;
584 evdev_priv->tx_offload_flags = nic->tx_offload_flags;
587 nic->mtu = data->mtu;
593 octeontx_dev_start(struct rte_eth_dev *dev)
595 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
596 struct octeontx_rxq *rxq;
599 PMD_INIT_FUNC_TRACE();
600 /* Rechecking if any new offload set to update
601 * rx/tx burst function pointer accordingly.
603 for (i = 0; i < dev->data->nb_rx_queues; i++) {
604 rxq = dev->data->rx_queues[i];
605 octeontx_recheck_rx_offloads(rxq);
608 /* Setting up the mtu */
609 ret = octeontx_dev_mtu_set(dev, nic->mtu);
611 octeontx_log_err("Failed to set default MTU size %d", ret);
618 octeontx_set_tx_function(dev);
619 ret = octeontx_pko_channel_start(nic->base_ochan);
621 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
622 nic->port_id, nic->num_tx_queues, nic->base_ochan,
630 dev->rx_pkt_burst = octeontx_recv_pkts;
631 ret = octeontx_pki_port_start(nic->port_id);
633 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
634 goto channel_stop_error;
640 ret = octeontx_port_start(nic);
642 octeontx_log_err("failed start port %d", ret);
643 goto pki_port_stop_error;
646 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
647 nic->base_ochan, nic->num_tx_queues, nic->port_id);
649 ret = rte_event_dev_start(nic->evdev);
651 octeontx_log_err("failed to start evdev: ret (%d)", ret);
652 goto pki_port_stop_error;
659 octeontx_pki_port_stop(nic->port_id);
661 octeontx_pko_channel_stop(nic->base_ochan);
667 octeontx_dev_stop(struct rte_eth_dev *dev)
669 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
672 PMD_INIT_FUNC_TRACE();
674 rte_event_dev_stop(nic->evdev);
676 ret = octeontx_port_stop(nic);
678 octeontx_log_err("failed to req stop port %d res=%d",
683 ret = octeontx_pki_port_stop(nic->port_id);
685 octeontx_log_err("failed to stop pki port %d res=%d",
690 ret = octeontx_pko_channel_stop(nic->base_ochan);
692 octeontx_log_err("failed to stop channel %d VF%d %d %d",
693 nic->base_ochan, nic->port_id, nic->num_tx_queues,
702 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
704 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
706 PMD_INIT_FUNC_TRACE();
707 return octeontx_port_promisc_set(nic, 1);
711 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
713 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
715 PMD_INIT_FUNC_TRACE();
716 return octeontx_port_promisc_set(nic, 0);
720 octeontx_port_link_status(struct octeontx_nic *nic)
724 PMD_INIT_FUNC_TRACE();
725 res = octeontx_bgx_port_link_status(nic->port_id);
727 octeontx_log_err("failed to get port %d link status",
732 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) {
733 nic->link_up = (uint8_t)res;
736 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
742 * Return 0 means link status changed, -1 means not changed
745 octeontx_dev_link_update(struct rte_eth_dev *dev,
746 int wait_to_complete __rte_unused)
748 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
749 struct rte_eth_link link;
752 PMD_INIT_FUNC_TRACE();
754 res = octeontx_port_link_status(nic);
756 octeontx_log_err("failed to request link status %d", res);
760 octeontx_link_status_update(nic, &link);
761 if (nic->print_flag) {
762 octeontx_link_status_print(nic->dev, &link);
766 return rte_eth_linkstatus_set(dev, &link);
770 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
772 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
774 PMD_INIT_FUNC_TRACE();
775 return octeontx_port_stats(nic, stats);
779 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
781 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
783 PMD_INIT_FUNC_TRACE();
784 return octeontx_port_stats_clr(nic);
788 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
790 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
793 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
795 octeontx_log_err("failed to del MAC address filter on port %d",
800 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
801 struct rte_ether_addr *mac_addr,
803 __rte_unused uint32_t vmdq)
805 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
808 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
811 octeontx_log_err("failed to add MAC address filter on port %d",
820 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
821 struct rte_ether_addr *addr)
823 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
826 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
828 /* Update same mac address to BGX CAM table */
829 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
833 octeontx_log_err("failed to set MAC address on port %d",
841 octeontx_dev_info(struct rte_eth_dev *dev,
842 struct rte_eth_dev_info *dev_info)
844 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
846 /* Autonegotiation may be disabled */
847 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED;
848 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10M | RTE_ETH_LINK_SPEED_100M |
849 RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G |
850 RTE_ETH_LINK_SPEED_40G;
852 /* Min/Max MTU supported */
853 dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
854 dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
855 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
856 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
858 dev_info->max_mac_addrs =
859 octeontx_bgx_port_mac_entries_get(nic->port_id);
860 dev_info->max_rx_queues = 1;
861 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
862 dev_info->min_rx_bufsize = 0;
864 dev_info->default_rxconf = (struct rte_eth_rxconf) {
867 .offloads = OCTEONTX_RX_OFFLOADS,
870 dev_info->default_txconf = (struct rte_eth_txconf) {
872 .offloads = OCTEONTX_TX_OFFLOADS,
875 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
876 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
877 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
878 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
884 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
886 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
887 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
888 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
892 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
895 struct octeontx_txq *txq;
898 PMD_INIT_FUNC_TRACE();
900 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
903 txq = dev->data->tx_queues[qidx];
905 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
907 sizeof(octeontx_dq_t),
909 octeontx_dq_info_getter);
915 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
919 (void)octeontx_port_stop(nic);
920 octeontx_pko_channel_stop(nic->base_ochan);
921 octeontx_pko_channel_close(nic->base_ochan);
922 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
927 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
929 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
931 PMD_INIT_FUNC_TRACE();
932 qidx = qidx % PKO_VF_NUM_DQ;
933 return octeontx_vf_start_tx_queue(dev, nic, qidx);
937 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
943 PMD_INIT_FUNC_TRACE();
945 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
948 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
953 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
955 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
957 PMD_INIT_FUNC_TRACE();
958 qidx = qidx % PKO_VF_NUM_DQ;
960 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
964 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
968 PMD_INIT_FUNC_TRACE();
970 if (dev->data->tx_queues[qid]) {
971 res = octeontx_dev_tx_queue_stop(dev, qid);
973 octeontx_log_err("failed stop tx_queue(%d)\n", qid);
975 rte_free(dev->data->tx_queues[qid]);
980 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
981 uint16_t nb_desc, unsigned int socket_id,
982 const struct rte_eth_txconf *tx_conf __rte_unused)
984 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
985 struct octeontx_txq *txq = NULL;
989 RTE_SET_USED(nb_desc);
990 RTE_SET_USED(socket_id);
992 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
994 /* Socket id check */
995 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
996 socket_id != (unsigned int)nic->node)
997 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
998 socket_id, nic->node);
1000 /* Free memory prior to re-allocation if needed. */
1001 if (dev->data->tx_queues[qidx] != NULL) {
1002 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
1004 octeontx_dev_tx_queue_release(dev, qidx);
1005 dev->data->tx_queues[qidx] = NULL;
1008 /* Allocating tx queue data structure */
1009 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
1010 RTE_CACHE_LINE_SIZE, nic->node);
1012 octeontx_log_err("failed to allocate txq=%d", qidx);
1018 txq->queue_id = dq_num;
1019 dev->data->tx_queues[qidx] = txq;
1020 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1022 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
1024 sizeof(octeontx_dq_t),
1026 octeontx_dq_info_getter);
1032 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
1033 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
1035 txq->dq.fc_status_va);
1047 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
1048 uint16_t nb_desc, unsigned int socket_id,
1049 const struct rte_eth_rxconf *rx_conf,
1050 struct rte_mempool *mb_pool)
1052 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1053 struct rte_mempool_ops *mp_ops = NULL;
1054 struct octeontx_rxq *rxq = NULL;
1055 pki_pktbuf_cfg_t pktbuf_conf;
1056 pki_hash_cfg_t pki_hash;
1057 pki_qos_cfg_t pki_qos;
1061 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
1062 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
1064 RTE_SET_USED(nb_desc);
1066 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
1067 memset(&pki_hash, 0, sizeof(pki_hash));
1068 memset(&pki_qos, 0, sizeof(pki_qos));
1070 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
1071 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
1072 octeontx_log_err("failed to find octeontx_fpavf mempool");
1076 /* Handle forbidden configurations */
1077 if (nic->pki.classifier_enable) {
1078 octeontx_log_err("cannot setup queue %d. "
1079 "Classifier option unsupported", qidx);
1083 port = nic->port_id;
1085 /* Rx deferred start is not supported */
1086 if (rx_conf->rx_deferred_start) {
1087 octeontx_log_err("rx deferred start not supported");
1091 /* Verify queue index */
1092 if (qidx >= dev->data->nb_rx_queues) {
1093 octeontx_log_err("QID %d not supported (0 - %d available)\n",
1094 qidx, (dev->data->nb_rx_queues - 1));
1098 /* Socket id check */
1099 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1100 socket_id != (unsigned int)nic->node)
1101 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1102 socket_id, nic->node);
1104 /* Allocating rx queue data structure */
1105 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1106 RTE_CACHE_LINE_SIZE, nic->node);
1108 octeontx_log_err("failed to allocate rxq=%d", qidx);
1112 if (!nic->pki.initialized) {
1113 pktbuf_conf.port_type = 0;
1114 pki_hash.port_type = 0;
1115 pki_qos.port_type = 0;
1117 pktbuf_conf.mmask.f_wqe_skip = 1;
1118 pktbuf_conf.mmask.f_first_skip = 1;
1119 pktbuf_conf.mmask.f_later_skip = 1;
1120 pktbuf_conf.mmask.f_mbuff_size = 1;
1121 pktbuf_conf.mmask.f_cache_mode = 1;
1123 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1124 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1125 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1126 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1127 RTE_PKTMBUF_HEADROOM -
1128 rte_pktmbuf_priv_size(mb_pool) -
1129 sizeof(struct rte_mbuf));
1131 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1133 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1135 octeontx_log_err("fail to configure pktbuf for port %d",
1140 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1141 "\tmbuf_size:\t0x%0x\n"
1142 "\twqe_skip:\t0x%0x\n"
1143 "\tfirst_skip:\t0x%0x\n"
1144 "\tlater_skip:\t0x%0x\n"
1145 "\tcache_mode:\t%s\n",
1147 pktbuf_conf.mbuff_size,
1148 pktbuf_conf.wqe_skip,
1149 pktbuf_conf.first_skip,
1150 pktbuf_conf.later_skip,
1151 (pktbuf_conf.cache_mode ==
1154 (pktbuf_conf.cache_mode ==
1157 (pktbuf_conf.cache_mode ==
1158 PKI_OPC_MODE_STF1_STT) ?
1159 "STF1_STT" : "STF2_STT");
1161 if (nic->pki.hash_enable) {
1162 pki_hash.tag_dlc = 1;
1163 pki_hash.tag_slc = 1;
1164 pki_hash.tag_dlf = 1;
1165 pki_hash.tag_slf = 1;
1166 pki_hash.tag_prt = 1;
1167 octeontx_pki_port_hash_config(port, &pki_hash);
1170 pool = (uintptr_t)mb_pool->pool_id;
1172 /* Get the gaura Id */
1173 gaura = octeontx_fpa_bufpool_gaura(pool);
1175 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1176 pki_qos.num_entry = 1;
1177 pki_qos.drop_policy = 0;
1178 pki_qos.tag_type = 0L;
1179 pki_qos.qos_entry[0].port_add = 0;
1180 pki_qos.qos_entry[0].gaura = gaura;
1181 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1182 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1183 pki_qos.qos_entry[0].grptag_bad = 0;
1184 pki_qos.qos_entry[0].grptag_ok = 0;
1186 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1188 octeontx_log_err("failed to create QOS port=%d, q=%d",
1193 nic->pki.initialized = true;
1196 rxq->port_id = nic->port_id;
1198 rxq->queue_id = qidx;
1199 rxq->evdev = nic->evdev;
1200 rxq->ev_queues = ev_queues;
1201 rxq->ev_ports = ev_ports;
1202 rxq->pool = mb_pool;
1204 octeontx_recheck_rx_offloads(rxq);
1205 dev->data->rx_queues[qidx] = rxq;
1206 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1212 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1214 rte_free(dev->data->rx_queues[qid]);
1217 static const uint32_t *
1218 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1220 static const uint32_t ptypes[] = {
1222 RTE_PTYPE_L3_IPV4_EXT,
1224 RTE_PTYPE_L3_IPV6_EXT,
1231 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1238 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1242 if (!strcmp(pool, "octeontx_fpavf"))
1248 /* Initialize and register driver with DPDK Application */
1249 static const struct eth_dev_ops octeontx_dev_ops = {
1250 .dev_configure = octeontx_dev_configure,
1251 .dev_infos_get = octeontx_dev_info,
1252 .dev_close = octeontx_dev_close,
1253 .dev_start = octeontx_dev_start,
1254 .dev_stop = octeontx_dev_stop,
1255 .promiscuous_enable = octeontx_dev_promisc_enable,
1256 .promiscuous_disable = octeontx_dev_promisc_disable,
1257 .link_update = octeontx_dev_link_update,
1258 .stats_get = octeontx_dev_stats_get,
1259 .stats_reset = octeontx_dev_stats_reset,
1260 .mac_addr_remove = octeontx_dev_mac_addr_del,
1261 .mac_addr_add = octeontx_dev_mac_addr_add,
1262 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1263 .vlan_offload_set = octeontx_dev_vlan_offload_set,
1264 .vlan_filter_set = octeontx_dev_vlan_filter_set,
1265 .tx_queue_start = octeontx_dev_tx_queue_start,
1266 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1267 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1268 .tx_queue_release = octeontx_dev_tx_queue_release,
1269 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1270 .rx_queue_release = octeontx_dev_rx_queue_release,
1271 .dev_set_link_up = octeontx_dev_set_link_up,
1272 .dev_set_link_down = octeontx_dev_set_link_down,
1273 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1274 .mtu_set = octeontx_dev_mtu_set,
1275 .pool_ops_supported = octeontx_pool_ops,
1276 .flow_ctrl_get = octeontx_dev_flow_ctrl_get,
1277 .flow_ctrl_set = octeontx_dev_flow_ctrl_set,
1280 /* Create Ethdev interface per BGX LMAC ports */
1282 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1287 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1288 struct octeontx_nic *nic = NULL;
1289 struct rte_eth_dev *eth_dev = NULL;
1290 struct rte_eth_dev_data *data;
1291 const char *name = rte_vdev_device_name(dev);
1294 PMD_INIT_FUNC_TRACE();
1296 sprintf(octtx_name, "%s_%d", name, port);
1297 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1298 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1299 if (eth_dev == NULL)
1302 eth_dev->dev_ops = &octeontx_dev_ops;
1303 eth_dev->device = &dev->device;
1304 octeontx_set_tx_function(eth_dev);
1305 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1306 rte_eth_dev_probing_finish(eth_dev);
1310 /* Reserve an ethdev entry */
1311 eth_dev = rte_eth_dev_allocate(octtx_name);
1312 if (eth_dev == NULL) {
1313 octeontx_log_err("failed to allocate rte_eth_dev");
1317 data = eth_dev->data;
1319 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1321 octeontx_log_err("failed to allocate nic structure");
1325 data->dev_private = nic;
1326 pko_vfid = octeontx_pko_get_vfid();
1328 if (pko_vfid == SIZE_MAX) {
1329 octeontx_log_err("failed to get pko vfid");
1334 nic->pko_vfid = pko_vfid;
1335 nic->port_id = port;
1338 res = octeontx_port_open(nic);
1342 /* Rx side port configuration */
1343 res = octeontx_pki_port_open(port);
1345 octeontx_log_err("failed to open PKI port %d", port);
1350 eth_dev->device = &dev->device;
1351 eth_dev->intr_handle = NULL;
1352 eth_dev->data->numa_node = dev->device.numa_node;
1354 data->port_id = eth_dev->data->port_id;
1358 nic->print_flag = -1;
1360 data->dev_link.link_status = RTE_ETH_LINK_DOWN;
1361 data->dev_started = 0;
1362 data->promiscuous = 0;
1363 data->all_multicast = 0;
1364 data->scattered_rx = 0;
1366 /* Get maximum number of supported MAC entries */
1367 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1368 if (max_entries < 0) {
1369 octeontx_log_err("Failed to get max entries for mac addr");
1374 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1375 RTE_ETHER_ADDR_LEN, 0,
1377 if (data->mac_addrs == NULL) {
1378 octeontx_log_err("failed to allocate memory for mac_addrs");
1383 eth_dev->dev_ops = &octeontx_dev_ops;
1385 /* Finally save ethdev pointer to the NIC structure */
1388 if (nic->port_id != data->port_id) {
1389 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1390 data->port_id, nic->port_id);
1392 goto free_mac_addrs;
1395 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
1396 octeontx_link_status_poll, nic);
1398 octeontx_log_err("Failed to start link polling alarm");
1402 /* Update port_id mac to eth_dev */
1403 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1405 /* Update same mac address to BGX CAM table at index 0 */
1406 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1408 res = octeontx_dev_flow_ctrl_init(eth_dev);
1412 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1413 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1414 nic->port_id, nic->port_ena,
1415 nic->base_ochan, nic->num_ochans,
1416 nic->num_tx_queues);
1417 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1419 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1420 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1422 rte_eth_dev_probing_finish(eth_dev);
1423 return data->port_id;
1426 rte_free(data->mac_addrs);
1427 data->mac_addrs = NULL;
1430 octeontx_port_close(nic);
1432 rte_eth_dev_release_port(eth_dev);
1437 /* Un initialize octeontx device */
1439 octeontx_remove(struct rte_vdev_device *dev)
1441 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1442 struct rte_eth_dev *eth_dev = NULL;
1443 struct octeontx_nic *nic = NULL;
1449 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1450 sprintf(octtx_name, "eth_octeontx_%d", i);
1452 eth_dev = rte_eth_dev_allocated(octtx_name);
1453 if (eth_dev == NULL)
1454 continue; /* port already released */
1456 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1457 rte_eth_dev_release_port(eth_dev);
1461 nic = octeontx_pmd_priv(eth_dev);
1462 rte_event_dev_stop(nic->evdev);
1463 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1464 octeontx_dev_close(eth_dev);
1465 rte_eth_dev_release_port(eth_dev);
1468 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1471 /* Free FC resource */
1472 octeontx_pko_fc_free();
1477 /* Initialize octeontx device */
1479 octeontx_probe(struct rte_vdev_device *dev)
1481 const char *dev_name;
1482 static int probe_once;
1483 uint8_t socket_id, qlist;
1484 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1485 struct rte_event_dev_config dev_conf;
1486 const char *eventdev_name = "event_octeontx";
1487 struct rte_event_dev_info info;
1488 struct rte_eth_dev *eth_dev;
1490 struct octeontx_vdev_init_params init_params = {
1491 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1494 dev_name = rte_vdev_device_name(dev);
1496 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1497 strlen(rte_vdev_device_args(dev)) == 0) {
1498 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1500 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1503 /* TODO: request info from primary to set up Rx and Tx */
1504 eth_dev->dev_ops = &octeontx_dev_ops;
1505 eth_dev->device = &dev->device;
1506 rte_eth_dev_probing_finish(eth_dev);
1510 res = octeontx_parse_vdev_init_params(&init_params, dev);
1514 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1515 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1516 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1520 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1522 socket_id = rte_socket_id();
1524 tx_vfcnt = octeontx_pko_vf_count();
1526 if (tx_vfcnt < init_params.nr_port) {
1527 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1528 tx_vfcnt, init_params.nr_port);
1531 evdev = rte_event_dev_get_dev_id(eventdev_name);
1533 octeontx_log_err("eventdev %s not found", eventdev_name);
1537 res = rte_event_dev_info_get(evdev, &info);
1539 octeontx_log_err("failed to eventdev info %d", res);
1543 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1544 info.max_event_queues, info.max_event_ports);
1546 if (octeontx_pko_init_fc(tx_vfcnt))
1549 devconf_set_default_sane_values(&dev_conf, &info);
1550 res = rte_event_dev_configure(evdev, &dev_conf);
1554 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1556 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1559 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1565 /* Enable all queues available */
1566 for (i = 0; i < qnum; i++) {
1567 res = rte_event_queue_setup(evdev, i, NULL);
1569 octeontx_log_err("failed to setup event_q(%d): res %d",
1575 /* Enable all ports available */
1576 for (i = 0; i < pnum; i++) {
1577 res = rte_event_port_setup(evdev, i, NULL);
1580 octeontx_log_err("failed to setup ev port(%d) res=%d",
1587 * Do 1:1 links for ports & queues. All queues would be mapped to
1588 * one port. If there are more ports than queues, then some ports
1589 * won't be linked to any queue.
1591 for (i = 0; i < qnum; i++) {
1592 /* Link one queue to one event port */
1594 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1597 octeontx_log_err("failed to link port (%d): res=%d",
1603 /* Create ethdev interface */
1604 for (i = 0; i < init_params.nr_port; i++) {
1605 port_id = octeontx_create(dev, i, evdev, socket_id);
1607 octeontx_log_err("failed to create device %s",
1613 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1618 octeontx_log_err("interface %s not supported", dev_name);
1619 octeontx_remove(dev);
1623 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1629 octeontx_pko_fc_free();
1633 static struct rte_vdev_driver octeontx_pmd_drv = {
1634 .probe = octeontx_probe,
1635 .remove = octeontx_remove,
1638 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1639 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1640 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");