1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <eventdev_pmd.h>
13 #include <rte_alarm.h>
14 #include <rte_branch_prediction.h>
15 #include <rte_bus_vdev.h>
16 #include <rte_cycles.h>
17 #include <rte_debug.h>
19 #include <rte_devargs.h>
20 #include <rte_kvargs.h>
21 #include <rte_malloc.h>
22 #include <rte_mbuf_pool_ops.h>
23 #include <rte_prefetch.h>
25 #include "octeontx_ethdev.h"
26 #include "octeontx_rxtx.h"
27 #include "octeontx_logs.h"
28 #include "octeontx_stats.h"
30 /* Useful in stopping/closing event device if no of
31 * eth ports are using it.
33 uint16_t evdev_refcnt;
35 #define OCTEONTX_QLM_MODE_SGMII 7
36 #define OCTEONTX_QLM_MODE_XFI 12
38 struct evdev_priv_data {
39 OFFLOAD_FLAGS; /*Sequence should not be changed */
40 } __rte_cache_aligned;
42 struct octeontx_vdev_init_params {
47 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
49 enum octeontx_link_speed {
50 OCTEONTX_LINK_SPEED_SGMII,
51 OCTEONTX_LINK_SPEED_XAUI,
52 OCTEONTX_LINK_SPEED_RXAUI,
53 OCTEONTX_LINK_SPEED_10G_R,
54 OCTEONTX_LINK_SPEED_40G_R,
55 OCTEONTX_LINK_SPEED_RESERVE1,
56 OCTEONTX_LINK_SPEED_QSGMII,
57 OCTEONTX_LINK_SPEED_RESERVE2,
58 OCTEONTX_LINK_SPEED_UNKNOWN = 255
61 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE);
62 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE);
63 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE);
65 /* Parse integer from integer argument */
67 parse_integer_arg(const char *key __rte_unused,
68 const char *value, void *extra_args)
70 int *i = (int *)extra_args;
74 octeontx_log_err("argument has to be positive.");
82 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
83 struct rte_vdev_device *dev)
85 struct rte_kvargs *kvlist = NULL;
88 static const char * const octeontx_vdev_valid_params[] = {
89 OCTEONTX_VDEV_NR_PORT_ARG,
93 const char *input_args = rte_vdev_device_args(dev);
99 kvlist = rte_kvargs_parse(input_args,
100 octeontx_vdev_valid_params);
104 ret = rte_kvargs_process(kvlist,
105 OCTEONTX_VDEV_NR_PORT_ARG,
113 rte_kvargs_free(kvlist);
118 octeontx_port_open(struct octeontx_nic *nic)
120 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
121 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg;
125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
126 PMD_INIT_FUNC_TRACE();
128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
130 octeontx_log_err("failed to open port %d", res);
134 nic->node = bgx_port_conf.node;
135 nic->port_ena = bgx_port_conf.enable;
136 nic->base_ichan = bgx_port_conf.base_chan;
137 nic->base_ochan = bgx_port_conf.base_chan;
138 nic->num_ichans = bgx_port_conf.num_chans;
139 nic->num_ochans = bgx_port_conf.num_chans;
140 nic->bgx_mtu = bgx_port_conf.mtu;
141 nic->bpen = bgx_port_conf.bpen;
142 nic->fcs_strip = bgx_port_conf.fcs_strip;
143 nic->bcast_mode = bgx_port_conf.bcast_mode;
144 nic->mcast_mode = bgx_port_conf.mcast_mode;
145 nic->speed = bgx_port_conf.mode;
147 nic->duplex = RTE_ETH_LINK_FULL_DUPLEX;
148 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg));
150 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg);
152 octeontx_log_err("failed to get port %d fifo cfg", res);
156 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz;
158 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
161 octeontx_log_dbg("port opened %d", nic->port_id);
166 octeontx_link_status_print(struct rte_eth_dev *eth_dev,
167 struct rte_eth_link *link)
169 if (link && link->link_status)
170 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s",
171 (eth_dev->data->port_id),
173 link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX ?
174 "full-duplex" : "half-duplex");
176 octeontx_log_info("Port %d: Link Down",
177 (int)(eth_dev->data->port_id));
180 static inline uint32_t
181 octeontx_parse_link_speeds(uint32_t link_speeds)
183 uint32_t link_speed = OCTEONTX_LINK_SPEED_UNKNOWN;
185 if (link_speeds & RTE_ETH_LINK_SPEED_40G)
186 link_speed = OCTEONTX_LINK_SPEED_40G_R;
188 if (link_speeds & RTE_ETH_LINK_SPEED_10G) {
189 link_speed = OCTEONTX_LINK_SPEED_XAUI;
190 link_speed |= OCTEONTX_LINK_SPEED_RXAUI;
191 link_speed |= OCTEONTX_LINK_SPEED_10G_R;
194 if (link_speeds & RTE_ETH_LINK_SPEED_5G)
195 link_speed = OCTEONTX_LINK_SPEED_QSGMII;
197 if (link_speeds & RTE_ETH_LINK_SPEED_1G)
198 link_speed = OCTEONTX_LINK_SPEED_SGMII;
203 static inline uint8_t
204 octeontx_parse_eth_link_duplex(uint32_t link_speeds)
206 if ((link_speeds & RTE_ETH_LINK_SPEED_10M_HD) ||
207 (link_speeds & RTE_ETH_LINK_SPEED_100M_HD))
208 return RTE_ETH_LINK_HALF_DUPLEX;
210 return RTE_ETH_LINK_FULL_DUPLEX;
214 octeontx_apply_link_speed(struct rte_eth_dev *dev)
216 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
217 struct rte_eth_conf *conf = &dev->data->dev_conf;
218 octeontx_mbox_bgx_port_change_mode_t cfg;
220 if (conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG)
223 cfg.speed = octeontx_parse_link_speeds(conf->link_speeds);
224 cfg.autoneg = (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) ? 1 : 0;
225 cfg.duplex = octeontx_parse_eth_link_duplex(conf->link_speeds);
226 cfg.qlm_mode = ((conf->link_speeds & RTE_ETH_LINK_SPEED_1G) ?
227 OCTEONTX_QLM_MODE_SGMII :
228 (conf->link_speeds & RTE_ETH_LINK_SPEED_10G) ?
229 OCTEONTX_QLM_MODE_XFI : 0);
231 if (cfg.speed != OCTEONTX_LINK_SPEED_UNKNOWN &&
232 (cfg.speed != nic->speed || cfg.duplex != nic->duplex)) {
233 nic->speed = cfg.speed;
234 nic->duplex = cfg.duplex;
235 return octeontx_bgx_port_change_mode(nic->port_id, &cfg);
242 octeontx_link_status_update(struct octeontx_nic *nic,
243 struct rte_eth_link *link)
245 memset(link, 0, sizeof(*link));
247 link->link_status = nic->link_up ? RTE_ETH_LINK_UP : RTE_ETH_LINK_DOWN;
249 switch (nic->speed) {
250 case OCTEONTX_LINK_SPEED_SGMII:
251 link->link_speed = RTE_ETH_SPEED_NUM_1G;
254 case OCTEONTX_LINK_SPEED_XAUI:
255 link->link_speed = RTE_ETH_SPEED_NUM_10G;
258 case OCTEONTX_LINK_SPEED_RXAUI:
259 case OCTEONTX_LINK_SPEED_10G_R:
260 link->link_speed = RTE_ETH_SPEED_NUM_10G;
262 case OCTEONTX_LINK_SPEED_QSGMII:
263 link->link_speed = RTE_ETH_SPEED_NUM_5G;
265 case OCTEONTX_LINK_SPEED_40G_R:
266 link->link_speed = RTE_ETH_SPEED_NUM_40G;
269 case OCTEONTX_LINK_SPEED_RESERVE1:
270 case OCTEONTX_LINK_SPEED_RESERVE2:
272 link->link_speed = RTE_ETH_SPEED_NUM_NONE;
273 octeontx_log_err("incorrect link speed %d", nic->speed);
277 link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
278 link->link_autoneg = RTE_ETH_LINK_AUTONEG;
282 octeontx_link_status_poll(void *arg)
284 struct octeontx_nic *nic = arg;
285 struct rte_eth_link link;
286 struct rte_eth_dev *dev;
289 PMD_INIT_FUNC_TRACE();
293 res = octeontx_bgx_port_link_status(nic->port_id);
295 octeontx_log_err("Failed to get port %d link status",
298 if (nic->link_up != (uint8_t)res) {
299 nic->link_up = (uint8_t)res;
300 octeontx_link_status_update(nic, &link);
301 octeontx_link_status_print(dev, &link);
302 rte_eth_linkstatus_set(dev, &link);
303 rte_eth_dev_callback_process(dev,
304 RTE_ETH_EVENT_INTR_LSC,
309 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
310 octeontx_link_status_poll, nic);
312 octeontx_log_err("Failed to restart alarm for port %d, err: %d",
317 octeontx_port_close(struct octeontx_nic *nic)
319 PMD_INIT_FUNC_TRACE();
321 rte_eal_alarm_cancel(octeontx_link_status_poll, nic);
322 octeontx_bgx_port_close(nic->port_id);
323 octeontx_log_dbg("port closed %d", nic->port_id);
327 octeontx_port_start(struct octeontx_nic *nic)
329 PMD_INIT_FUNC_TRACE();
331 return octeontx_bgx_port_start(nic->port_id);
335 octeontx_port_stop(struct octeontx_nic *nic)
337 PMD_INIT_FUNC_TRACE();
339 return octeontx_bgx_port_stop(nic->port_id);
343 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
345 struct rte_eth_dev *dev;
349 PMD_INIT_FUNC_TRACE();
352 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
354 octeontx_log_err("failed to set promiscuous mode %d",
359 /* Set proper flag for the mode */
360 dev->data->promiscuous = (en != 0) ? 1 : 0;
362 octeontx_log_dbg("port %d : promiscuous mode %s",
363 nic->port_id, en ? "set" : "unset");
369 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
371 octeontx_mbox_bgx_port_stats_t bgx_stats;
374 PMD_INIT_FUNC_TRACE();
376 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
378 octeontx_log_err("failed to get port stats %d", nic->port_id);
382 stats->ipackets = bgx_stats.rx_packets;
383 stats->ibytes = bgx_stats.rx_bytes;
384 stats->imissed = bgx_stats.rx_dropped;
385 stats->ierrors = bgx_stats.rx_errors;
386 stats->opackets = bgx_stats.tx_packets;
387 stats->obytes = bgx_stats.tx_bytes;
388 stats->oerrors = bgx_stats.tx_errors;
390 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
391 nic->port_id, stats->ipackets, stats->opackets);
397 octeontx_port_stats_clr(struct octeontx_nic *nic)
399 PMD_INIT_FUNC_TRACE();
401 return octeontx_bgx_port_stats_clr(nic->port_id);
405 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
406 struct rte_event_dev_info *info)
408 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
409 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
411 dev_conf->nb_event_ports = info->max_event_ports;
412 dev_conf->nb_event_queues = info->max_event_queues;
414 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
415 dev_conf->nb_event_port_dequeue_depth =
416 info->max_event_port_dequeue_depth;
417 dev_conf->nb_event_port_enqueue_depth =
418 info->max_event_port_enqueue_depth;
419 dev_conf->nb_event_port_enqueue_depth =
420 info->max_event_port_enqueue_depth;
421 dev_conf->nb_events_limit =
422 info->max_num_events;
426 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
428 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
431 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM ||
432 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM)
433 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F;
435 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM ||
436 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM ||
437 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM ||
438 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM)
439 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F;
441 if (!(nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE))
442 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
444 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
445 flags |= OCCTX_TX_MULTI_SEG_F;
451 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
453 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
456 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
457 RTE_ETH_RX_OFFLOAD_UDP_CKSUM))
458 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
460 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
461 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM))
462 flags |= OCCTX_RX_OFFLOAD_CSUM_F;
464 if (nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
465 flags |= OCCTX_RX_MULTI_SEG_F;
466 eth_dev->data->scattered_rx = 1;
467 /* If scatter mode is enabled, TX should also be in multi
468 * seg mode, else memory leak will occur
470 nic->tx_offloads |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
477 octeontx_dev_configure(struct rte_eth_dev *dev)
479 struct rte_eth_dev_data *data = dev->data;
480 struct rte_eth_conf *conf = &data->dev_conf;
481 struct rte_eth_rxmode *rxmode = &conf->rxmode;
482 struct rte_eth_txmode *txmode = &conf->txmode;
483 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
486 PMD_INIT_FUNC_TRACE();
489 if (!rte_eal_has_hugepages()) {
490 octeontx_log_err("huge page is not configured");
494 if (txmode->mq_mode) {
495 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
499 if (rxmode->mq_mode != RTE_ETH_MQ_RX_NONE &&
500 rxmode->mq_mode != RTE_ETH_MQ_RX_RSS) {
501 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
505 if (!(txmode->offloads & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE)) {
506 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
507 txmode->offloads |= RTE_ETH_TX_OFFLOAD_MT_LOCKFREE;
510 if (conf->dcb_capability_en) {
511 octeontx_log_err("DCB enable not supported");
515 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
516 octeontx_log_err("flow director not supported");
520 nic->num_tx_queues = dev->data->nb_tx_queues;
522 if (!nic->reconfigure) {
523 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
527 octeontx_log_err("failed to open channel %d no-of-txq %d",
528 nic->base_ochan, nic->num_tx_queues);
532 ret = octeontx_dev_vlan_offload_init(dev);
534 octeontx_log_err("failed to initialize vlan offload");
538 nic->pki.classifier_enable = false;
539 nic->pki.hash_enable = true;
540 nic->pki.initialized = false;
543 nic->rx_offloads |= rxmode->offloads;
544 nic->tx_offloads |= txmode->offloads;
545 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
546 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
548 nic->reconfigure = true;
554 octeontx_dev_close(struct rte_eth_dev *dev)
556 struct octeontx_txq *txq = NULL;
557 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
561 PMD_INIT_FUNC_TRACE();
562 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
565 /* Stopping/closing event device once all eth ports are closed. */
566 if (__atomic_sub_fetch(&evdev_refcnt, 1, __ATOMIC_ACQUIRE) == 0) {
567 rte_event_dev_stop(nic->evdev);
568 rte_event_dev_close(nic->evdev);
571 octeontx_dev_flow_ctrl_fini(dev);
573 octeontx_dev_vlan_offload_fini(dev);
575 ret = octeontx_pko_channel_close(nic->base_ochan);
577 octeontx_log_err("failed to close channel %d VF%d %d %d",
578 nic->base_ochan, nic->port_id, nic->num_tx_queues,
581 /* Free txq resources for this port */
582 for (i = 0; i < nic->num_tx_queues; i++) {
583 txq = dev->data->tx_queues[i];
590 octeontx_port_close(nic);
591 nic->reconfigure = false;
597 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
599 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
600 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
601 struct rte_eth_dev_data *data = eth_dev->data;
604 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
606 /* Refuse MTU that requires the support of scattered packets
607 * when this feature has not been enabled before.
609 if (data->dev_started && frame_size > buffsz &&
610 !(nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
611 octeontx_log_err("Scatter mode is disabled");
615 /* Check <seg size> * <max_seg> >= max_frame */
616 if ((nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) &&
617 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
620 rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
624 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
628 octeontx_log_info("Received pkt beyond maxlen %d will be dropped",
635 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
637 struct rte_eth_dev *eth_dev = rxq->eth_dev;
638 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
639 struct rte_eth_dev_data *data = eth_dev->data;
640 struct rte_pktmbuf_pool_private *mbp_priv;
641 struct evdev_priv_data *evdev_priv;
642 struct rte_eventdev *dev;
645 /* Get rx buffer size */
646 mbp_priv = rte_mempool_get_priv(rxq->pool);
647 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
649 /* Setup scatter mode if needed by jumbo */
650 if (data->mtu > buffsz) {
651 nic->rx_offloads |= RTE_ETH_RX_OFFLOAD_SCATTER;
652 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
653 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
656 /* Sharing offload flags via eventdev priv region */
657 dev = &rte_eventdevs[rxq->evdev];
658 evdev_priv = dev->data->dev_private;
659 evdev_priv->rx_offload_flags = nic->rx_offload_flags;
660 evdev_priv->tx_offload_flags = nic->tx_offload_flags;
663 nic->mtu = data->mtu;
669 octeontx_dev_start(struct rte_eth_dev *dev)
671 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
672 struct octeontx_rxq *rxq;
675 PMD_INIT_FUNC_TRACE();
676 /* Rechecking if any new offload set to update
677 * rx/tx burst function pointer accordingly.
679 for (i = 0; i < dev->data->nb_rx_queues; i++) {
680 rxq = dev->data->rx_queues[i];
681 octeontx_recheck_rx_offloads(rxq);
684 /* Setting up the mtu */
685 ret = octeontx_dev_mtu_set(dev, nic->mtu);
687 octeontx_log_err("Failed to set default MTU size %d", ret);
691 /* Apply new link configurations if changed */
692 ret = octeontx_apply_link_speed(dev);
694 octeontx_log_err("Failed to set link configuration: %d", ret);
701 octeontx_set_tx_function(dev);
702 ret = octeontx_pko_channel_start(nic->base_ochan);
704 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
705 nic->port_id, nic->num_tx_queues, nic->base_ochan,
713 dev->rx_pkt_burst = octeontx_recv_pkts;
714 ret = octeontx_pki_port_start(nic->port_id);
716 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
717 goto channel_stop_error;
723 ret = octeontx_port_start(nic);
725 octeontx_log_err("failed start port %d", ret);
726 goto pki_port_stop_error;
729 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
730 nic->base_ochan, nic->num_tx_queues, nic->port_id);
732 ret = rte_event_dev_start(nic->evdev);
734 octeontx_log_err("failed to start evdev: ret (%d)", ret);
735 goto pki_port_stop_error;
742 octeontx_pki_port_stop(nic->port_id);
744 octeontx_pko_channel_stop(nic->base_ochan);
750 octeontx_dev_stop(struct rte_eth_dev *dev)
752 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
755 PMD_INIT_FUNC_TRACE();
757 ret = octeontx_port_stop(nic);
759 octeontx_log_err("failed to req stop port %d res=%d",
764 ret = octeontx_pki_port_stop(nic->port_id);
766 octeontx_log_err("failed to stop pki port %d res=%d",
771 ret = octeontx_pko_channel_stop(nic->base_ochan);
773 octeontx_log_err("failed to stop channel %d VF%d %d %d",
774 nic->base_ochan, nic->port_id, nic->num_tx_queues,
783 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
785 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
787 PMD_INIT_FUNC_TRACE();
788 return octeontx_port_promisc_set(nic, 1);
792 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
794 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
796 PMD_INIT_FUNC_TRACE();
797 return octeontx_port_promisc_set(nic, 0);
801 octeontx_port_link_status(struct octeontx_nic *nic)
805 PMD_INIT_FUNC_TRACE();
806 res = octeontx_bgx_port_link_status(nic->port_id);
808 octeontx_log_err("failed to get port %d link status",
813 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) {
814 nic->link_up = (uint8_t)res;
817 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
823 * Return 0 means link status changed, -1 means not changed
826 octeontx_dev_link_update(struct rte_eth_dev *dev,
827 int wait_to_complete __rte_unused)
829 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
830 struct rte_eth_link link;
833 PMD_INIT_FUNC_TRACE();
835 res = octeontx_port_link_status(nic);
837 octeontx_log_err("failed to request link status %d", res);
841 octeontx_link_status_update(nic, &link);
842 if (nic->print_flag) {
843 octeontx_link_status_print(nic->dev, &link);
847 return rte_eth_linkstatus_set(dev, &link);
850 static inline int octeontx_dev_total_xstat(void)
852 return NUM_BGX_XSTAT;
856 octeontx_port_xstats(struct octeontx_nic *nic, struct rte_eth_xstat *xstats,
859 octeontx_mbox_bgx_port_stats_t bgx_stats;
860 int stat_cnt, res, si, i;
862 res = octeontx_bgx_port_xstats(nic->port_id, &bgx_stats);
864 octeontx_log_err("failed to get port stats %d", nic->port_id);
870 stat_cnt = (n > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : n;
872 for (i = 0; i < stat_cnt; i++) {
874 xstats[si].value = *(uint64_t *)(((char *)&bgx_stats) +
875 octeontx_bgx_xstats[i].soffset);
878 /*TODO: Similarly fill rest of HW stats */
884 octeontx_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
885 uint64_t *stat_val, unsigned int n)
887 unsigned int i, xstat_cnt = octeontx_dev_total_xstat();
888 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
889 struct rte_eth_xstat xstats[xstat_cnt];
891 octeontx_port_xstats(nic, xstats, xstat_cnt);
892 for (i = 0; i < n; i++) {
893 if (ids[i] >= xstat_cnt) {
894 PMD_INIT_LOG(ERR, "out of range id value");
897 stat_val[i] = xstats[ids[i]].value;
903 octeontx_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
904 struct rte_eth_xstat_name *xstats_names,
912 stat_cnt = (size > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : size;
913 size = size - stat_cnt;
914 for (i = 0; i < stat_cnt; i++) {
915 strlcpy(xstats_names[si].name,
916 octeontx_bgx_xstats[i].sname,
917 sizeof(xstats_names[si].name));
920 /*TODO: Similarly fill rest of HW stats */
923 return octeontx_dev_total_xstat();
927 static void build_xstat_names(struct rte_eth_xstat_name *xstat_names)
931 for (i = 0; i < NUM_BGX_XSTAT; i++) {
932 strlcpy(xstat_names[i].name, octeontx_bgx_xstats[i].sname,
933 RTE_ETH_XSTATS_NAME_SIZE);
938 octeontx_dev_xstats_get_names_by_id(struct rte_eth_dev *dev __rte_unused,
940 struct rte_eth_xstat_name *stat_names,
943 unsigned int i, xstat_cnt = octeontx_dev_total_xstat();
944 struct rte_eth_xstat_name xstat_names[xstat_cnt];
946 build_xstat_names(xstat_names);
947 for (i = 0; i < n; i++) {
948 if (ids[i] >= xstat_cnt) {
949 PMD_INIT_LOG(ERR, "out of range id value");
952 strlcpy(stat_names[i].name, xstat_names[ids[i]].name,
953 sizeof(stat_names[i].name));
955 /*TODO: Similarly fill rest of HW stats */
961 octeontx_dev_xstats_get(struct rte_eth_dev *dev,
962 struct rte_eth_xstat *xstats,
965 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
967 PMD_INIT_FUNC_TRACE();
968 return octeontx_port_xstats(nic, xstats, n);
972 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
974 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
976 PMD_INIT_FUNC_TRACE();
977 return octeontx_port_stats(nic, stats);
981 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
983 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
985 PMD_INIT_FUNC_TRACE();
986 return octeontx_port_stats_clr(nic);
990 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
992 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
995 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
997 octeontx_log_err("failed to del MAC address filter on port %d",
1002 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
1003 struct rte_ether_addr *mac_addr,
1005 __rte_unused uint32_t vmdq)
1007 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1010 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
1013 octeontx_log_err("failed to add MAC address filter on port %d",
1022 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
1023 struct rte_ether_addr *addr)
1025 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1028 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
1030 /* Update same mac address to BGX CAM table */
1031 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
1035 octeontx_log_err("failed to set MAC address on port %d",
1043 octeontx_dev_info(struct rte_eth_dev *dev,
1044 struct rte_eth_dev_info *dev_info)
1046 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1048 /* Autonegotiation may be disabled */
1049 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED;
1050 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10M | RTE_ETH_LINK_SPEED_100M |
1051 RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G |
1052 RTE_ETH_LINK_SPEED_40G;
1054 /* Min/Max MTU supported */
1055 dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
1056 dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
1057 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
1058 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
1060 dev_info->max_mac_addrs =
1061 octeontx_bgx_port_mac_entries_get(nic->port_id);
1062 dev_info->max_rx_queues = 1;
1063 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
1064 dev_info->min_rx_bufsize = 0;
1066 dev_info->default_rxconf = (struct rte_eth_rxconf) {
1067 .rx_free_thresh = 0,
1069 .offloads = OCTEONTX_RX_OFFLOADS,
1072 dev_info->default_txconf = (struct rte_eth_txconf) {
1073 .tx_free_thresh = 0,
1074 .offloads = OCTEONTX_TX_OFFLOADS,
1077 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
1078 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
1079 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
1080 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
1086 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
1088 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
1089 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
1090 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
1094 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
1097 struct octeontx_txq *txq;
1100 PMD_INIT_FUNC_TRACE();
1102 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
1105 txq = dev->data->tx_queues[qidx];
1107 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
1109 sizeof(octeontx_dq_t),
1111 octeontx_dq_info_getter);
1117 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
1121 (void)octeontx_port_stop(nic);
1122 octeontx_pko_channel_stop(nic->base_ochan);
1123 octeontx_pko_channel_close(nic->base_ochan);
1124 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1129 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
1131 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1133 PMD_INIT_FUNC_TRACE();
1134 qidx = qidx % PKO_VF_NUM_DQ;
1135 return octeontx_vf_start_tx_queue(dev, nic, qidx);
1139 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
1145 PMD_INIT_FUNC_TRACE();
1147 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
1150 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1155 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
1157 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1159 PMD_INIT_FUNC_TRACE();
1160 qidx = qidx % PKO_VF_NUM_DQ;
1162 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
1166 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1170 PMD_INIT_FUNC_TRACE();
1172 if (dev->data->tx_queues[qid]) {
1173 res = octeontx_dev_tx_queue_stop(dev, qid);
1175 octeontx_log_err("failed stop tx_queue(%d)\n", qid);
1177 rte_free(dev->data->tx_queues[qid]);
1182 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
1183 uint16_t nb_desc, unsigned int socket_id,
1184 const struct rte_eth_txconf *tx_conf __rte_unused)
1186 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1187 struct octeontx_txq *txq = NULL;
1191 RTE_SET_USED(nb_desc);
1192 RTE_SET_USED(socket_id);
1194 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
1196 /* Socket id check */
1197 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1198 socket_id != (unsigned int)nic->node)
1199 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
1200 socket_id, nic->node);
1202 /* Free memory prior to re-allocation if needed. */
1203 if (dev->data->tx_queues[qidx] != NULL) {
1204 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
1206 octeontx_dev_tx_queue_release(dev, qidx);
1207 dev->data->tx_queues[qidx] = NULL;
1210 /* Allocating tx queue data structure */
1211 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
1212 RTE_CACHE_LINE_SIZE, nic->node);
1214 octeontx_log_err("failed to allocate txq=%d", qidx);
1220 txq->queue_id = dq_num;
1221 dev->data->tx_queues[qidx] = txq;
1222 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1224 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
1226 sizeof(octeontx_dq_t),
1228 octeontx_dq_info_getter);
1234 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
1235 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
1237 txq->dq.fc_status_va);
1248 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
1249 uint16_t nb_desc, unsigned int socket_id,
1250 const struct rte_eth_rxconf *rx_conf,
1251 struct rte_mempool *mb_pool)
1253 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
1254 struct rte_mempool_ops *mp_ops = NULL;
1255 struct octeontx_rxq *rxq = NULL;
1256 pki_pktbuf_cfg_t pktbuf_conf;
1257 pki_hash_cfg_t pki_hash;
1258 pki_qos_cfg_t pki_qos;
1262 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
1263 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
1265 RTE_SET_USED(nb_desc);
1267 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
1268 memset(&pki_hash, 0, sizeof(pki_hash));
1269 memset(&pki_qos, 0, sizeof(pki_qos));
1271 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
1272 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
1273 octeontx_log_err("failed to find octeontx_fpavf mempool");
1277 /* Handle forbidden configurations */
1278 if (nic->pki.classifier_enable) {
1279 octeontx_log_err("cannot setup queue %d. "
1280 "Classifier option unsupported", qidx);
1284 port = nic->port_id;
1286 /* Rx deferred start is not supported */
1287 if (rx_conf->rx_deferred_start) {
1288 octeontx_log_err("rx deferred start not supported");
1292 /* Verify queue index */
1293 if (qidx >= dev->data->nb_rx_queues) {
1294 octeontx_log_err("QID %d not supported (0 - %d available)\n",
1295 qidx, (dev->data->nb_rx_queues - 1));
1299 /* Socket id check */
1300 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1301 socket_id != (unsigned int)nic->node)
1302 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1303 socket_id, nic->node);
1305 /* Allocating rx queue data structure */
1306 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1307 RTE_CACHE_LINE_SIZE, nic->node);
1309 octeontx_log_err("failed to allocate rxq=%d", qidx);
1313 if (!nic->pki.initialized) {
1314 pktbuf_conf.port_type = 0;
1315 pki_hash.port_type = 0;
1316 pki_qos.port_type = 0;
1318 pktbuf_conf.mmask.f_wqe_skip = 1;
1319 pktbuf_conf.mmask.f_first_skip = 1;
1320 pktbuf_conf.mmask.f_later_skip = 1;
1321 pktbuf_conf.mmask.f_mbuff_size = 1;
1322 pktbuf_conf.mmask.f_cache_mode = 1;
1324 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1325 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1326 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1327 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1328 RTE_PKTMBUF_HEADROOM -
1329 rte_pktmbuf_priv_size(mb_pool) -
1330 sizeof(struct rte_mbuf));
1332 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1334 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1336 octeontx_log_err("fail to configure pktbuf for port %d",
1341 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1342 "\tmbuf_size:\t0x%0x\n"
1343 "\twqe_skip:\t0x%0x\n"
1344 "\tfirst_skip:\t0x%0x\n"
1345 "\tlater_skip:\t0x%0x\n"
1346 "\tcache_mode:\t%s\n",
1348 pktbuf_conf.mbuff_size,
1349 pktbuf_conf.wqe_skip,
1350 pktbuf_conf.first_skip,
1351 pktbuf_conf.later_skip,
1352 (pktbuf_conf.cache_mode ==
1355 (pktbuf_conf.cache_mode ==
1358 (pktbuf_conf.cache_mode ==
1359 PKI_OPC_MODE_STF1_STT) ?
1360 "STF1_STT" : "STF2_STT");
1362 if (nic->pki.hash_enable) {
1363 pki_hash.tag_dlc = 1;
1364 pki_hash.tag_slc = 1;
1365 pki_hash.tag_dlf = 1;
1366 pki_hash.tag_slf = 1;
1367 pki_hash.tag_prt = 1;
1368 octeontx_pki_port_hash_config(port, &pki_hash);
1371 pool = (uintptr_t)mb_pool->pool_id;
1373 /* Get the gaura Id */
1374 gaura = octeontx_fpa_bufpool_gaura(pool);
1376 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1377 pki_qos.num_entry = 1;
1378 pki_qos.drop_policy = 0;
1379 pki_qos.tag_type = 0L;
1380 pki_qos.qos_entry[0].port_add = 0;
1381 pki_qos.qos_entry[0].gaura = gaura;
1382 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1383 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1384 pki_qos.qos_entry[0].grptag_bad = 0;
1385 pki_qos.qos_entry[0].grptag_ok = 0;
1387 ret = octeontx_pki_port_create_qos(port, &pki_qos);
1389 octeontx_log_err("failed to create QOS port=%d, q=%d",
1394 nic->pki.initialized = true;
1397 rxq->port_id = nic->port_id;
1399 rxq->queue_id = qidx;
1400 rxq->evdev = nic->evdev;
1401 rxq->ev_queues = ev_queues;
1402 rxq->ev_ports = ev_ports;
1403 rxq->pool = mb_pool;
1405 octeontx_recheck_rx_offloads(rxq);
1406 dev->data->rx_queues[qidx] = rxq;
1407 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1413 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1415 rte_free(dev->data->rx_queues[qid]);
1418 static const uint32_t *
1419 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1421 static const uint32_t ptypes[] = {
1423 RTE_PTYPE_L3_IPV4_EXT,
1425 RTE_PTYPE_L3_IPV6_EXT,
1432 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1439 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1443 if (!strcmp(pool, "octeontx_fpavf"))
1449 /* Initialize and register driver with DPDK Application */
1450 static const struct eth_dev_ops octeontx_dev_ops = {
1451 .dev_configure = octeontx_dev_configure,
1452 .dev_infos_get = octeontx_dev_info,
1453 .dev_close = octeontx_dev_close,
1454 .dev_start = octeontx_dev_start,
1455 .dev_stop = octeontx_dev_stop,
1456 .promiscuous_enable = octeontx_dev_promisc_enable,
1457 .promiscuous_disable = octeontx_dev_promisc_disable,
1458 .link_update = octeontx_dev_link_update,
1459 .stats_get = octeontx_dev_stats_get,
1460 .stats_reset = octeontx_dev_stats_reset,
1461 .mac_addr_remove = octeontx_dev_mac_addr_del,
1462 .mac_addr_add = octeontx_dev_mac_addr_add,
1463 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1464 .vlan_offload_set = octeontx_dev_vlan_offload_set,
1465 .vlan_filter_set = octeontx_dev_vlan_filter_set,
1466 .tx_queue_start = octeontx_dev_tx_queue_start,
1467 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1468 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1469 .tx_queue_release = octeontx_dev_tx_queue_release,
1470 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1471 .rx_queue_release = octeontx_dev_rx_queue_release,
1472 .dev_set_link_up = octeontx_dev_set_link_up,
1473 .dev_set_link_down = octeontx_dev_set_link_down,
1474 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1475 .mtu_set = octeontx_dev_mtu_set,
1476 .pool_ops_supported = octeontx_pool_ops,
1477 .flow_ctrl_get = octeontx_dev_flow_ctrl_get,
1478 .flow_ctrl_set = octeontx_dev_flow_ctrl_set,
1479 .xstats_get = octeontx_dev_xstats_get,
1480 .xstats_get_by_id = octeontx_dev_xstats_get_by_id,
1481 .xstats_get_names = octeontx_dev_xstats_get_names,
1482 .xstats_get_names_by_id = octeontx_dev_xstats_get_names_by_id,
1485 /* Create Ethdev interface per BGX LMAC ports */
1487 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1492 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1493 struct octeontx_nic *nic = NULL;
1494 struct rte_eth_dev *eth_dev = NULL;
1495 struct rte_eth_dev_data *data;
1496 const char *name = rte_vdev_device_name(dev);
1499 PMD_INIT_FUNC_TRACE();
1501 sprintf(octtx_name, "%s_%d", name, port);
1502 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1503 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1504 if (eth_dev == NULL)
1507 eth_dev->dev_ops = &octeontx_dev_ops;
1508 eth_dev->device = &dev->device;
1509 octeontx_set_tx_function(eth_dev);
1510 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1511 rte_eth_dev_probing_finish(eth_dev);
1515 /* Reserve an ethdev entry */
1516 eth_dev = rte_eth_dev_allocate(octtx_name);
1517 if (eth_dev == NULL) {
1518 octeontx_log_err("failed to allocate rte_eth_dev");
1522 data = eth_dev->data;
1524 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1526 octeontx_log_err("failed to allocate nic structure");
1530 data->dev_private = nic;
1531 pko_vfid = octeontx_pko_get_vfid();
1533 if (pko_vfid == SIZE_MAX) {
1534 octeontx_log_err("failed to get pko vfid");
1539 nic->pko_vfid = pko_vfid;
1540 nic->port_id = port;
1542 __atomic_add_fetch(&evdev_refcnt, 1, __ATOMIC_ACQUIRE);
1544 res = octeontx_port_open(nic);
1548 /* Rx side port configuration */
1549 res = octeontx_pki_port_open(port);
1551 octeontx_log_err("failed to open PKI port %d", port);
1556 eth_dev->device = &dev->device;
1557 eth_dev->intr_handle = NULL;
1558 eth_dev->data->numa_node = dev->device.numa_node;
1560 data->port_id = eth_dev->data->port_id;
1564 nic->print_flag = -1;
1565 nic->reconfigure = false;
1567 data->dev_link.link_status = RTE_ETH_LINK_DOWN;
1568 data->dev_started = 0;
1569 data->promiscuous = 0;
1570 data->all_multicast = 0;
1571 data->scattered_rx = 0;
1573 /* Get maximum number of supported MAC entries */
1574 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1575 if (max_entries < 0) {
1576 octeontx_log_err("Failed to get max entries for mac addr");
1581 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1582 RTE_ETHER_ADDR_LEN, 0,
1584 if (data->mac_addrs == NULL) {
1585 octeontx_log_err("failed to allocate memory for mac_addrs");
1590 eth_dev->dev_ops = &octeontx_dev_ops;
1592 /* Finally save ethdev pointer to the NIC structure */
1595 if (nic->port_id != data->port_id) {
1596 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1597 data->port_id, nic->port_id);
1599 goto free_mac_addrs;
1602 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000,
1603 octeontx_link_status_poll, nic);
1605 octeontx_log_err("Failed to start link polling alarm");
1609 /* Update port_id mac to eth_dev */
1610 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1612 /* Update same mac address to BGX CAM table at index 0 */
1613 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1615 res = octeontx_dev_flow_ctrl_init(eth_dev);
1619 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1620 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1621 nic->port_id, nic->port_ena,
1622 nic->base_ochan, nic->num_ochans,
1623 nic->num_tx_queues);
1624 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1626 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1627 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1629 rte_eth_dev_probing_finish(eth_dev);
1630 return data->port_id;
1633 rte_free(data->mac_addrs);
1634 data->mac_addrs = NULL;
1637 octeontx_port_close(nic);
1639 rte_eth_dev_release_port(eth_dev);
1644 /* Un initialize octeontx device */
1646 octeontx_remove(struct rte_vdev_device *dev)
1648 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1649 struct rte_eth_dev *eth_dev = NULL;
1650 struct octeontx_nic *nic = NULL;
1656 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1657 sprintf(octtx_name, "eth_octeontx_%d", i);
1659 eth_dev = rte_eth_dev_allocated(octtx_name);
1660 if (eth_dev == NULL)
1661 continue; /* port already released */
1663 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1664 rte_eth_dev_release_port(eth_dev);
1668 nic = octeontx_pmd_priv(eth_dev);
1669 rte_event_dev_stop(nic->evdev);
1670 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1671 octeontx_dev_close(eth_dev);
1672 rte_eth_dev_release_port(eth_dev);
1675 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1678 /* Free FC resource */
1679 octeontx_pko_fc_free();
1684 /* Initialize octeontx device */
1686 octeontx_probe(struct rte_vdev_device *dev)
1688 const char *dev_name;
1689 static int probe_once;
1690 uint8_t socket_id, qlist;
1691 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1692 struct rte_event_dev_config dev_conf;
1693 const char *eventdev_name = "event_octeontx";
1694 struct rte_event_dev_info info;
1695 struct rte_eth_dev *eth_dev;
1697 struct octeontx_vdev_init_params init_params = {
1698 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1701 dev_name = rte_vdev_device_name(dev);
1703 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1704 strlen(rte_vdev_device_args(dev)) == 0) {
1705 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1707 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1710 /* TODO: request info from primary to set up Rx and Tx */
1711 eth_dev->dev_ops = &octeontx_dev_ops;
1712 eth_dev->device = &dev->device;
1713 rte_eth_dev_probing_finish(eth_dev);
1717 res = octeontx_parse_vdev_init_params(&init_params, dev);
1721 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1722 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1723 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1727 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1729 socket_id = rte_socket_id();
1731 tx_vfcnt = octeontx_pko_vf_count();
1733 if (tx_vfcnt < init_params.nr_port) {
1734 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1735 tx_vfcnt, init_params.nr_port);
1738 evdev = rte_event_dev_get_dev_id(eventdev_name);
1740 octeontx_log_err("eventdev %s not found", eventdev_name);
1744 res = rte_event_dev_info_get(evdev, &info);
1746 octeontx_log_err("failed to eventdev info %d", res);
1750 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1751 info.max_event_queues, info.max_event_ports);
1753 if (octeontx_pko_init_fc(tx_vfcnt))
1756 devconf_set_default_sane_values(&dev_conf, &info);
1757 res = rte_event_dev_configure(evdev, &dev_conf);
1761 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1763 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1766 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1772 /* Enable all queues available */
1773 for (i = 0; i < qnum; i++) {
1774 res = rte_event_queue_setup(evdev, i, NULL);
1776 octeontx_log_err("failed to setup event_q(%d): res %d",
1782 /* Enable all ports available */
1783 for (i = 0; i < pnum; i++) {
1784 res = rte_event_port_setup(evdev, i, NULL);
1787 octeontx_log_err("failed to setup ev port(%d) res=%d",
1793 __atomic_store_n(&evdev_refcnt, 0, __ATOMIC_RELEASE);
1795 * Do 1:1 links for ports & queues. All queues would be mapped to
1796 * one port. If there are more ports than queues, then some ports
1797 * won't be linked to any queue.
1799 for (i = 0; i < qnum; i++) {
1800 /* Link one queue to one event port */
1802 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1805 octeontx_log_err("failed to link port (%d): res=%d",
1811 /* Create ethdev interface */
1812 for (i = 0; i < init_params.nr_port; i++) {
1813 port_id = octeontx_create(dev, i, evdev, socket_id);
1815 octeontx_log_err("failed to create device %s",
1821 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1826 octeontx_log_err("interface %s not supported", dev_name);
1827 octeontx_remove(dev);
1831 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1837 octeontx_pko_fc_free();
1841 static struct rte_vdev_driver octeontx_pmd_drv = {
1842 .probe = octeontx_probe,
1843 .remove = octeontx_remove,
1846 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1847 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1848 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");