1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_prefetch.h>
20 #include <rte_bus_vdev.h>
22 #include "octeontx_ethdev.h"
23 #include "octeontx_rxtx.h"
24 #include "octeontx_logs.h"
26 struct octeontx_vdev_init_params {
30 enum octeontx_link_speed {
31 OCTEONTX_LINK_SPEED_SGMII,
32 OCTEONTX_LINK_SPEED_XAUI,
33 OCTEONTX_LINK_SPEED_RXAUI,
34 OCTEONTX_LINK_SPEED_10G_R,
35 OCTEONTX_LINK_SPEED_40G_R,
36 OCTEONTX_LINK_SPEED_RESERVE1,
37 OCTEONTX_LINK_SPEED_QSGMII,
38 OCTEONTX_LINK_SPEED_RESERVE2
41 /* Parse integer from integer argument */
43 parse_integer_arg(const char *key __rte_unused,
44 const char *value, void *extra_args)
46 int *i = (int *)extra_args;
50 octeontx_log_err("argument has to be positive.");
58 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
59 struct rte_vdev_device *dev)
61 struct rte_kvargs *kvlist = NULL;
64 static const char * const octeontx_vdev_valid_params[] = {
65 OCTEONTX_VDEV_NR_PORT_ARG,
69 const char *input_args = rte_vdev_device_args(dev);
75 kvlist = rte_kvargs_parse(input_args,
76 octeontx_vdev_valid_params);
80 ret = rte_kvargs_process(kvlist,
81 OCTEONTX_VDEV_NR_PORT_ARG,
89 rte_kvargs_free(kvlist);
94 octeontx_port_open(struct octeontx_nic *nic)
96 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
101 PMD_INIT_FUNC_TRACE();
103 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
105 octeontx_log_err("failed to open port %d", res);
109 nic->node = bgx_port_conf.node;
110 nic->port_ena = bgx_port_conf.enable;
111 nic->base_ichan = bgx_port_conf.base_chan;
112 nic->base_ochan = bgx_port_conf.base_chan;
113 nic->num_ichans = bgx_port_conf.num_chans;
114 nic->num_ochans = bgx_port_conf.num_chans;
115 nic->mtu = bgx_port_conf.mtu;
116 nic->bpen = bgx_port_conf.bpen;
117 nic->fcs_strip = bgx_port_conf.fcs_strip;
118 nic->bcast_mode = bgx_port_conf.bcast_mode;
119 nic->mcast_mode = bgx_port_conf.mcast_mode;
120 nic->speed = bgx_port_conf.mode;
122 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
124 octeontx_log_dbg("port opened %d", nic->port_id);
129 octeontx_port_close(struct octeontx_nic *nic)
131 PMD_INIT_FUNC_TRACE();
133 octeontx_bgx_port_close(nic->port_id);
134 octeontx_log_dbg("port closed %d", nic->port_id);
138 octeontx_port_start(struct octeontx_nic *nic)
140 PMD_INIT_FUNC_TRACE();
142 return octeontx_bgx_port_start(nic->port_id);
146 octeontx_port_stop(struct octeontx_nic *nic)
148 PMD_INIT_FUNC_TRACE();
150 return octeontx_bgx_port_stop(nic->port_id);
154 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
156 struct rte_eth_dev *dev;
160 PMD_INIT_FUNC_TRACE();
163 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
165 octeontx_log_err("failed to set promiscuous mode %d",
168 /* Set proper flag for the mode */
169 dev->data->promiscuous = (en != 0) ? 1 : 0;
171 octeontx_log_dbg("port %d : promiscuous mode %s",
172 nic->port_id, en ? "set" : "unset");
176 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
178 octeontx_mbox_bgx_port_stats_t bgx_stats;
181 PMD_INIT_FUNC_TRACE();
183 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
185 octeontx_log_err("failed to get port stats %d", nic->port_id);
189 stats->ipackets = bgx_stats.rx_packets;
190 stats->ibytes = bgx_stats.rx_bytes;
191 stats->imissed = bgx_stats.rx_dropped;
192 stats->ierrors = bgx_stats.rx_errors;
193 stats->opackets = bgx_stats.tx_packets;
194 stats->obytes = bgx_stats.tx_bytes;
195 stats->oerrors = bgx_stats.tx_errors;
197 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
198 nic->port_id, stats->ipackets, stats->opackets);
204 octeontx_port_stats_clr(struct octeontx_nic *nic)
206 PMD_INIT_FUNC_TRACE();
208 octeontx_bgx_port_stats_clr(nic->port_id);
212 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
213 struct rte_event_dev_info *info)
215 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
216 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
218 dev_conf->nb_event_ports = info->max_event_ports;
219 dev_conf->nb_event_queues = info->max_event_queues;
221 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
222 dev_conf->nb_event_port_dequeue_depth =
223 info->max_event_port_dequeue_depth;
224 dev_conf->nb_event_port_enqueue_depth =
225 info->max_event_port_enqueue_depth;
226 dev_conf->nb_event_port_enqueue_depth =
227 info->max_event_port_enqueue_depth;
228 dev_conf->nb_events_limit =
229 info->max_num_events;
233 octeontx_dev_configure(struct rte_eth_dev *dev)
235 struct rte_eth_dev_data *data = dev->data;
236 struct rte_eth_conf *conf = &data->dev_conf;
237 struct rte_eth_rxmode *rxmode = &conf->rxmode;
238 struct rte_eth_txmode *txmode = &conf->txmode;
239 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
242 PMD_INIT_FUNC_TRACE();
245 if (!rte_eal_has_hugepages()) {
246 octeontx_log_err("huge page is not configured");
250 if (txmode->mq_mode) {
251 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
255 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
256 rxmode->mq_mode != ETH_MQ_RX_RSS) {
257 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
261 if (!rxmode->hw_strip_crc) {
262 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
263 rxmode->hw_strip_crc = 1;
266 if (rxmode->hw_ip_checksum) {
267 PMD_INIT_LOG(NOTICE, "rxcksum not supported");
268 rxmode->hw_ip_checksum = 0;
271 if (rxmode->split_hdr_size) {
272 octeontx_log_err("rxmode does not support split header");
276 if (rxmode->hw_vlan_filter) {
277 octeontx_log_err("VLAN filter not supported");
281 if (rxmode->hw_vlan_extend) {
282 octeontx_log_err("VLAN extended not supported");
286 if (rxmode->enable_lro) {
287 octeontx_log_err("LRO not supported");
291 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
292 octeontx_log_err("setting link speed/duplex not supported");
296 if (conf->dcb_capability_en) {
297 octeontx_log_err("DCB enable not supported");
301 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
302 octeontx_log_err("flow director not supported");
306 nic->num_tx_queues = dev->data->nb_tx_queues;
308 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
312 octeontx_log_err("failed to open channel %d no-of-txq %d",
313 nic->base_ochan, nic->num_tx_queues);
317 nic->pki.classifier_enable = false;
318 nic->pki.hash_enable = true;
319 nic->pki.initialized = false;
325 octeontx_dev_close(struct rte_eth_dev *dev)
327 struct octeontx_txq *txq = NULL;
328 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
332 PMD_INIT_FUNC_TRACE();
334 rte_event_dev_close(nic->evdev);
336 ret = octeontx_pko_channel_close(nic->base_ochan);
338 octeontx_log_err("failed to close channel %d VF%d %d %d",
339 nic->base_ochan, nic->port_id, nic->num_tx_queues,
342 /* Free txq resources for this port */
343 for (i = 0; i < nic->num_tx_queues; i++) {
344 txq = dev->data->tx_queues[i];
353 octeontx_dev_start(struct rte_eth_dev *dev)
355 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
360 PMD_INIT_FUNC_TRACE();
364 dev->tx_pkt_burst = octeontx_xmit_pkts;
365 ret = octeontx_pko_channel_start(nic->base_ochan);
367 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
368 nic->port_id, nic->num_tx_queues, nic->base_ochan,
376 dev->rx_pkt_burst = octeontx_recv_pkts;
377 ret = octeontx_pki_port_start(nic->port_id);
379 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
380 goto channel_stop_error;
386 ret = octeontx_port_start(nic);
388 octeontx_log_err("failed start port %d", ret);
389 goto pki_port_stop_error;
392 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
393 nic->base_ochan, nic->num_tx_queues, nic->port_id);
395 ret = rte_event_dev_start(nic->evdev);
397 octeontx_log_err("failed to start evdev: ret (%d)", ret);
398 goto pki_port_stop_error;
405 octeontx_pki_port_stop(nic->port_id);
407 octeontx_pko_channel_stop(nic->base_ochan);
413 octeontx_dev_stop(struct rte_eth_dev *dev)
415 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
418 PMD_INIT_FUNC_TRACE();
420 rte_event_dev_stop(nic->evdev);
422 ret = octeontx_port_stop(nic);
424 octeontx_log_err("failed to req stop port %d res=%d",
429 ret = octeontx_pki_port_stop(nic->port_id);
431 octeontx_log_err("failed to stop pki port %d res=%d",
436 ret = octeontx_pko_channel_stop(nic->base_ochan);
438 octeontx_log_err("failed to stop channel %d VF%d %d %d",
439 nic->base_ochan, nic->port_id, nic->num_tx_queues,
444 dev->tx_pkt_burst = NULL;
445 dev->rx_pkt_burst = NULL;
449 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
451 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
453 PMD_INIT_FUNC_TRACE();
454 octeontx_port_promisc_set(nic, 1);
458 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
460 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
462 PMD_INIT_FUNC_TRACE();
463 octeontx_port_promisc_set(nic, 0);
467 octeontx_atomic_write_link_status(struct rte_eth_dev *dev,
468 struct rte_eth_link *link)
470 struct rte_eth_link *dst = &dev->data->dev_link;
471 struct rte_eth_link *src = link;
473 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
474 *(uint64_t *)src) == 0)
481 octeontx_port_link_status(struct octeontx_nic *nic)
485 PMD_INIT_FUNC_TRACE();
486 res = octeontx_bgx_port_link_status(nic->port_id);
488 octeontx_log_err("failed to get port %d link status",
493 nic->link_up = (uint8_t)res;
494 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
500 * Return 0 means link status changed, -1 means not changed
503 octeontx_dev_link_update(struct rte_eth_dev *dev,
504 int wait_to_complete __rte_unused)
506 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
507 struct rte_eth_link link;
511 PMD_INIT_FUNC_TRACE();
513 res = octeontx_port_link_status(nic);
515 octeontx_log_err("failed to request link status %d", res);
519 link.link_status = nic->link_up;
521 switch (nic->speed) {
522 case OCTEONTX_LINK_SPEED_SGMII:
523 link.link_speed = ETH_SPEED_NUM_1G;
526 case OCTEONTX_LINK_SPEED_XAUI:
527 link.link_speed = ETH_SPEED_NUM_10G;
530 case OCTEONTX_LINK_SPEED_RXAUI:
531 case OCTEONTX_LINK_SPEED_10G_R:
532 link.link_speed = ETH_SPEED_NUM_10G;
534 case OCTEONTX_LINK_SPEED_QSGMII:
535 link.link_speed = ETH_SPEED_NUM_5G;
537 case OCTEONTX_LINK_SPEED_40G_R:
538 link.link_speed = ETH_SPEED_NUM_40G;
541 case OCTEONTX_LINK_SPEED_RESERVE1:
542 case OCTEONTX_LINK_SPEED_RESERVE2:
544 octeontx_log_err("incorrect link speed %d", nic->speed);
548 link.link_duplex = ETH_LINK_AUTONEG;
549 link.link_autoneg = ETH_LINK_SPEED_AUTONEG;
551 return octeontx_atomic_write_link_status(dev, &link);
555 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
557 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
559 PMD_INIT_FUNC_TRACE();
560 return octeontx_port_stats(nic, stats);
564 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
566 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
568 PMD_INIT_FUNC_TRACE();
569 octeontx_port_stats_clr(nic);
573 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
574 struct ether_addr *addr)
576 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
579 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
581 octeontx_log_err("failed to set MAC address on port %d",
586 octeontx_dev_info(struct rte_eth_dev *dev,
587 struct rte_eth_dev_info *dev_info)
591 /* Autonegotiation may be disabled */
592 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
593 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
594 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
597 dev_info->driver_name = RTE_STR(rte_octeontx_pmd);
598 dev_info->max_mac_addrs = 1;
599 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
600 dev_info->max_rx_queues = 1;
601 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
602 dev_info->min_rx_bufsize = 0;
603 dev_info->pci_dev = NULL;
605 dev_info->default_rxconf = (struct rte_eth_rxconf) {
610 dev_info->default_txconf = (struct rte_eth_txconf) {
613 ETH_TXQ_FLAGS_NOMULTSEGS |
614 ETH_TXQ_FLAGS_NOOFFLOADS |
615 ETH_TXQ_FLAGS_NOXSUMS,
618 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
622 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
624 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
625 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
626 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
630 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
633 struct octeontx_txq *txq;
636 PMD_INIT_FUNC_TRACE();
638 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
641 txq = dev->data->tx_queues[qidx];
643 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
645 sizeof(octeontx_dq_t),
647 octeontx_dq_info_getter);
653 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
657 (void)octeontx_port_stop(nic);
658 octeontx_pko_channel_stop(nic->base_ochan);
659 octeontx_pko_channel_close(nic->base_ochan);
660 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
665 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
667 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
669 PMD_INIT_FUNC_TRACE();
670 qidx = qidx % PKO_VF_NUM_DQ;
671 return octeontx_vf_start_tx_queue(dev, nic, qidx);
675 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
681 PMD_INIT_FUNC_TRACE();
683 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
686 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
691 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
693 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
695 PMD_INIT_FUNC_TRACE();
696 qidx = qidx % PKO_VF_NUM_DQ;
698 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
702 octeontx_dev_tx_queue_release(void *tx_queue)
704 struct octeontx_txq *txq = tx_queue;
707 PMD_INIT_FUNC_TRACE();
710 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
712 octeontx_log_err("failed stop tx_queue(%d)\n",
720 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
721 uint16_t nb_desc, unsigned int socket_id,
722 const struct rte_eth_txconf *tx_conf)
724 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
725 struct octeontx_txq *txq = NULL;
729 RTE_SET_USED(nb_desc);
730 RTE_SET_USED(socket_id);
731 RTE_SET_USED(tx_conf);
733 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
735 /* Socket id check */
736 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
737 socket_id != (unsigned int)nic->node)
738 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
739 socket_id, nic->node);
741 /* Free memory prior to re-allocation if needed. */
742 if (dev->data->tx_queues[qidx] != NULL) {
743 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
745 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
746 dev->data->tx_queues[qidx] = NULL;
749 /* Allocating tx queue data structure */
750 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
751 RTE_CACHE_LINE_SIZE, nic->node);
753 octeontx_log_err("failed to allocate txq=%d", qidx);
759 txq->queue_id = dq_num;
760 dev->data->tx_queues[qidx] = txq;
761 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
763 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
765 sizeof(octeontx_dq_t),
767 octeontx_dq_info_getter);
773 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
774 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
776 txq->dq.fc_status_va);
788 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
789 uint16_t nb_desc, unsigned int socket_id,
790 const struct rte_eth_rxconf *rx_conf,
791 struct rte_mempool *mb_pool)
793 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
794 struct rte_mempool_ops *mp_ops = NULL;
795 struct octeontx_rxq *rxq = NULL;
796 pki_pktbuf_cfg_t pktbuf_conf;
797 pki_hash_cfg_t pki_hash;
798 pki_qos_cfg_t pki_qos;
802 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
803 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
805 RTE_SET_USED(nb_desc);
807 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
808 memset(&pki_hash, 0, sizeof(pki_hash));
809 memset(&pki_qos, 0, sizeof(pki_qos));
811 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
812 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
813 octeontx_log_err("failed to find octeontx_fpavf mempool");
817 /* Handle forbidden configurations */
818 if (nic->pki.classifier_enable) {
819 octeontx_log_err("cannot setup queue %d. "
820 "Classifier option unsupported", qidx);
826 /* Rx deferred start is not supported */
827 if (rx_conf->rx_deferred_start) {
828 octeontx_log_err("rx deferred start not supported");
832 /* Verify queue index */
833 if (qidx >= dev->data->nb_rx_queues) {
834 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
835 qidx, (dev->data->nb_rx_queues - 1));
839 /* Socket id check */
840 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
841 socket_id != (unsigned int)nic->node)
842 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
843 socket_id, nic->node);
845 /* Allocating rx queue data structure */
846 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
847 RTE_CACHE_LINE_SIZE, nic->node);
849 octeontx_log_err("failed to allocate rxq=%d", qidx);
853 if (!nic->pki.initialized) {
854 pktbuf_conf.port_type = 0;
855 pki_hash.port_type = 0;
856 pki_qos.port_type = 0;
858 pktbuf_conf.mmask.f_wqe_skip = 1;
859 pktbuf_conf.mmask.f_first_skip = 1;
860 pktbuf_conf.mmask.f_later_skip = 1;
861 pktbuf_conf.mmask.f_mbuff_size = 1;
862 pktbuf_conf.mmask.f_cache_mode = 1;
864 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
865 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
866 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
867 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
868 RTE_PKTMBUF_HEADROOM -
869 sizeof(struct rte_mbuf));
871 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
873 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
875 octeontx_log_err("fail to configure pktbuf for port %d",
880 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
881 "\tmbuf_size:\t0x%0x\n"
882 "\twqe_skip:\t0x%0x\n"
883 "\tfirst_skip:\t0x%0x\n"
884 "\tlater_skip:\t0x%0x\n"
885 "\tcache_mode:\t%s\n",
887 pktbuf_conf.mbuff_size,
888 pktbuf_conf.wqe_skip,
889 pktbuf_conf.first_skip,
890 pktbuf_conf.later_skip,
891 (pktbuf_conf.cache_mode ==
894 (pktbuf_conf.cache_mode ==
897 (pktbuf_conf.cache_mode ==
898 PKI_OPC_MODE_STF1_STT) ?
899 "STF1_STT" : "STF2_STT");
901 if (nic->pki.hash_enable) {
902 pki_hash.tag_dlc = 1;
903 pki_hash.tag_slc = 1;
904 pki_hash.tag_dlf = 1;
905 pki_hash.tag_slf = 1;
906 pki_hash.tag_prt = 1;
907 octeontx_pki_port_hash_config(port, &pki_hash);
910 pool = (uintptr_t)mb_pool->pool_id;
912 /* Get the gpool Id */
913 gaura = octeontx_fpa_bufpool_gpool(pool);
915 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
916 pki_qos.num_entry = 1;
917 pki_qos.drop_policy = 0;
918 pki_qos.tag_type = 0L;
919 pki_qos.qos_entry[0].port_add = 0;
920 pki_qos.qos_entry[0].gaura = gaura;
921 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
922 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
923 pki_qos.qos_entry[0].grptag_bad = 0;
924 pki_qos.qos_entry[0].grptag_ok = 0;
926 ret = octeontx_pki_port_create_qos(port, &pki_qos);
928 octeontx_log_err("failed to create QOS port=%d, q=%d",
933 nic->pki.initialized = true;
936 rxq->port_id = nic->port_id;
938 rxq->queue_id = qidx;
939 rxq->evdev = nic->evdev;
940 rxq->ev_queues = ev_queues;
941 rxq->ev_ports = ev_ports;
943 dev->data->rx_queues[qidx] = rxq;
944 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
949 octeontx_dev_rx_queue_release(void *rxq)
954 static const uint32_t *
955 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
957 static const uint32_t ptypes[] = {
959 RTE_PTYPE_L3_IPV4_EXT,
961 RTE_PTYPE_L3_IPV6_EXT,
968 if (dev->rx_pkt_burst == octeontx_recv_pkts)
975 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
979 if (!strcmp(pool, "octeontx_fpavf"))
985 /* Initialize and register driver with DPDK Application */
986 static const struct eth_dev_ops octeontx_dev_ops = {
987 .dev_configure = octeontx_dev_configure,
988 .dev_infos_get = octeontx_dev_info,
989 .dev_close = octeontx_dev_close,
990 .dev_start = octeontx_dev_start,
991 .dev_stop = octeontx_dev_stop,
992 .promiscuous_enable = octeontx_dev_promisc_enable,
993 .promiscuous_disable = octeontx_dev_promisc_disable,
994 .link_update = octeontx_dev_link_update,
995 .stats_get = octeontx_dev_stats_get,
996 .stats_reset = octeontx_dev_stats_reset,
997 .mac_addr_set = octeontx_dev_default_mac_addr_set,
998 .tx_queue_start = octeontx_dev_tx_queue_start,
999 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1000 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1001 .tx_queue_release = octeontx_dev_tx_queue_release,
1002 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1003 .rx_queue_release = octeontx_dev_rx_queue_release,
1004 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1005 .pool_ops_supported = octeontx_pool_ops,
1008 /* Create Ethdev interface per BGX LMAC ports */
1010 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1014 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1015 struct octeontx_nic *nic = NULL;
1016 struct rte_eth_dev *eth_dev = NULL;
1017 struct rte_eth_dev_data *data = NULL;
1018 const char *name = rte_vdev_device_name(dev);
1020 PMD_INIT_FUNC_TRACE();
1022 sprintf(octtx_name, "%s_%d", name, port);
1023 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1024 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1025 if (eth_dev == NULL)
1028 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1029 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1033 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
1035 octeontx_log_err("failed to allocate devdata");
1040 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1042 octeontx_log_err("failed to allocate nic structure");
1047 nic->port_id = port;
1050 res = octeontx_port_open(nic);
1054 /* Rx side port configuration */
1055 res = octeontx_pki_port_open(port);
1057 octeontx_log_err("failed to open PKI port %d", port);
1062 /* Reserve an ethdev entry */
1063 eth_dev = rte_eth_dev_allocate(octtx_name);
1064 if (eth_dev == NULL) {
1065 octeontx_log_err("failed to allocate rte_eth_dev");
1070 eth_dev->device = &dev->device;
1071 eth_dev->intr_handle = NULL;
1072 eth_dev->data->kdrv = RTE_KDRV_NONE;
1073 eth_dev->data->numa_node = dev->device.numa_node;
1075 rte_memcpy(data, (eth_dev)->data, sizeof(*data));
1076 data->dev_private = nic;
1078 data->port_id = eth_dev->data->port_id;
1079 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
1084 data->dev_link.link_status = ETH_LINK_DOWN;
1085 data->dev_started = 0;
1086 data->promiscuous = 0;
1087 data->all_multicast = 0;
1088 data->scattered_rx = 0;
1090 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1092 if (data->mac_addrs == NULL) {
1093 octeontx_log_err("failed to allocate memory for mac_addrs");
1098 eth_dev->data = data;
1099 eth_dev->dev_ops = &octeontx_dev_ops;
1101 /* Finally save ethdev pointer to the NIC structure */
1104 if (nic->port_id != data->port_id) {
1105 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1106 data->port_id, nic->port_id);
1111 /* Update port_id mac to eth_dev */
1112 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1114 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1115 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1116 nic->port_id, nic->port_ena,
1117 nic->base_ochan, nic->num_ochans,
1118 nic->num_tx_queues);
1119 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1121 return data->port_id;
1125 octeontx_port_close(nic);
1127 if (eth_dev != NULL) {
1128 rte_free(eth_dev->data->mac_addrs);
1131 rte_eth_dev_release_port(eth_dev);
1137 /* Un initialize octeontx device */
1139 octeontx_remove(struct rte_vdev_device *dev)
1141 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1142 struct rte_eth_dev *eth_dev = NULL;
1143 struct octeontx_nic *nic = NULL;
1149 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1150 sprintf(octtx_name, "eth_octeontx_%d", i);
1152 /* reserve an ethdev entry */
1153 eth_dev = rte_eth_dev_allocated(octtx_name);
1154 if (eth_dev == NULL)
1157 nic = octeontx_pmd_priv(eth_dev);
1158 rte_event_dev_stop(nic->evdev);
1159 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1161 rte_free(eth_dev->data->mac_addrs);
1162 rte_free(eth_dev->data->dev_private);
1163 rte_free(eth_dev->data);
1164 rte_eth_dev_release_port(eth_dev);
1165 rte_event_dev_close(nic->evdev);
1168 /* Free FC resource */
1169 octeontx_pko_fc_free();
1174 /* Initialize octeontx device */
1176 octeontx_probe(struct rte_vdev_device *dev)
1178 const char *dev_name;
1179 static int probe_once;
1180 uint8_t socket_id, qlist;
1181 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1182 struct rte_event_dev_config dev_conf;
1183 const char *eventdev_name = "event_octeontx";
1184 struct rte_event_dev_info info;
1186 struct octeontx_vdev_init_params init_params = {
1187 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1190 dev_name = rte_vdev_device_name(dev);
1191 res = octeontx_parse_vdev_init_params(&init_params, dev);
1195 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1196 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1197 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1201 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1203 socket_id = rte_socket_id();
1205 tx_vfcnt = octeontx_pko_vf_count();
1207 if (tx_vfcnt < init_params.nr_port) {
1208 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1209 tx_vfcnt, init_params.nr_port);
1212 evdev = rte_event_dev_get_dev_id(eventdev_name);
1214 octeontx_log_err("eventdev %s not found", eventdev_name);
1218 res = rte_event_dev_info_get(evdev, &info);
1220 octeontx_log_err("failed to eventdev info %d", res);
1224 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1225 info.max_event_queues, info.max_event_ports);
1227 if (octeontx_pko_init_fc(tx_vfcnt))
1230 devconf_set_default_sane_values(&dev_conf, &info);
1231 res = rte_event_dev_configure(evdev, &dev_conf);
1235 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1237 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1240 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1247 * We don't poll on event ports
1248 * that do not have any queues assigned.
1252 "reducing number of active event ports to %d", pnum);
1254 for (i = 0; i < qnum; i++) {
1255 res = rte_event_queue_setup(evdev, i, NULL);
1257 octeontx_log_err("failed to setup event_q(%d): res %d",
1263 for (i = 0; i < pnum; i++) {
1264 res = rte_event_port_setup(evdev, i, NULL);
1267 octeontx_log_err("failed to setup ev port(%d) res=%d",
1271 /* Link one queue to one event port */
1273 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1276 octeontx_log_err("failed to link port (%d): res=%d",
1282 /* Create ethdev interface */
1283 for (i = 0; i < init_params.nr_port; i++) {
1284 port_id = octeontx_create(dev, i, evdev, socket_id);
1286 octeontx_log_err("failed to create device %s",
1292 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1297 octeontx_log_err("interface %s not supported", dev_name);
1298 octeontx_remove(dev);
1307 octeontx_pko_fc_free();
1311 static struct rte_vdev_driver octeontx_pmd_drv = {
1312 .probe = octeontx_probe,
1313 .remove = octeontx_remove,
1316 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1317 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1318 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");