1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
27 struct octeontx_vdev_init_params {
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
34 enum octeontx_link_speed {
35 OCTEONTX_LINK_SPEED_SGMII,
36 OCTEONTX_LINK_SPEED_XAUI,
37 OCTEONTX_LINK_SPEED_RXAUI,
38 OCTEONTX_LINK_SPEED_10G_R,
39 OCTEONTX_LINK_SPEED_40G_R,
40 OCTEONTX_LINK_SPEED_RESERVE1,
41 OCTEONTX_LINK_SPEED_QSGMII,
42 OCTEONTX_LINK_SPEED_RESERVE2
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
49 RTE_INIT(otx_net_init_log)
51 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
52 if (otx_net_logtype_mbox >= 0)
53 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
55 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
56 if (otx_net_logtype_init >= 0)
57 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
59 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
60 if (otx_net_logtype_driver >= 0)
61 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
64 /* Parse integer from integer argument */
66 parse_integer_arg(const char *key __rte_unused,
67 const char *value, void *extra_args)
69 int *i = (int *)extra_args;
73 octeontx_log_err("argument has to be positive.");
81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
82 struct rte_vdev_device *dev)
84 struct rte_kvargs *kvlist = NULL;
87 static const char * const octeontx_vdev_valid_params[] = {
88 OCTEONTX_VDEV_NR_PORT_ARG,
92 const char *input_args = rte_vdev_device_args(dev);
98 kvlist = rte_kvargs_parse(input_args,
99 octeontx_vdev_valid_params);
103 ret = rte_kvargs_process(kvlist,
104 OCTEONTX_VDEV_NR_PORT_ARG,
112 rte_kvargs_free(kvlist);
117 octeontx_port_open(struct octeontx_nic *nic)
119 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
123 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
124 PMD_INIT_FUNC_TRACE();
126 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
128 octeontx_log_err("failed to open port %d", res);
132 nic->node = bgx_port_conf.node;
133 nic->port_ena = bgx_port_conf.enable;
134 nic->base_ichan = bgx_port_conf.base_chan;
135 nic->base_ochan = bgx_port_conf.base_chan;
136 nic->num_ichans = bgx_port_conf.num_chans;
137 nic->num_ochans = bgx_port_conf.num_chans;
138 nic->mtu = bgx_port_conf.mtu;
139 nic->bpen = bgx_port_conf.bpen;
140 nic->fcs_strip = bgx_port_conf.fcs_strip;
141 nic->bcast_mode = bgx_port_conf.bcast_mode;
142 nic->mcast_mode = bgx_port_conf.mcast_mode;
143 nic->speed = bgx_port_conf.mode;
145 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
148 octeontx_log_dbg("port opened %d", nic->port_id);
153 octeontx_port_close(struct octeontx_nic *nic)
155 PMD_INIT_FUNC_TRACE();
157 octeontx_bgx_port_close(nic->port_id);
158 octeontx_log_dbg("port closed %d", nic->port_id);
162 octeontx_port_start(struct octeontx_nic *nic)
164 PMD_INIT_FUNC_TRACE();
166 return octeontx_bgx_port_start(nic->port_id);
170 octeontx_port_stop(struct octeontx_nic *nic)
172 PMD_INIT_FUNC_TRACE();
174 return octeontx_bgx_port_stop(nic->port_id);
178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
180 struct rte_eth_dev *dev;
184 PMD_INIT_FUNC_TRACE();
187 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
189 octeontx_log_err("failed to set promiscuous mode %d",
194 /* Set proper flag for the mode */
195 dev->data->promiscuous = (en != 0) ? 1 : 0;
197 octeontx_log_dbg("port %d : promiscuous mode %s",
198 nic->port_id, en ? "set" : "unset");
204 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
206 octeontx_mbox_bgx_port_stats_t bgx_stats;
209 PMD_INIT_FUNC_TRACE();
211 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
213 octeontx_log_err("failed to get port stats %d", nic->port_id);
217 stats->ipackets = bgx_stats.rx_packets;
218 stats->ibytes = bgx_stats.rx_bytes;
219 stats->imissed = bgx_stats.rx_dropped;
220 stats->ierrors = bgx_stats.rx_errors;
221 stats->opackets = bgx_stats.tx_packets;
222 stats->obytes = bgx_stats.tx_bytes;
223 stats->oerrors = bgx_stats.tx_errors;
225 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
226 nic->port_id, stats->ipackets, stats->opackets);
232 octeontx_port_stats_clr(struct octeontx_nic *nic)
234 PMD_INIT_FUNC_TRACE();
236 return octeontx_bgx_port_stats_clr(nic->port_id);
240 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
241 struct rte_event_dev_info *info)
243 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
244 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
246 dev_conf->nb_event_ports = info->max_event_ports;
247 dev_conf->nb_event_queues = info->max_event_queues;
249 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
250 dev_conf->nb_event_port_dequeue_depth =
251 info->max_event_port_dequeue_depth;
252 dev_conf->nb_event_port_enqueue_depth =
253 info->max_event_port_enqueue_depth;
254 dev_conf->nb_event_port_enqueue_depth =
255 info->max_event_port_enqueue_depth;
256 dev_conf->nb_events_limit =
257 info->max_num_events;
261 octeontx_dev_configure(struct rte_eth_dev *dev)
263 struct rte_eth_dev_data *data = dev->data;
264 struct rte_eth_conf *conf = &data->dev_conf;
265 struct rte_eth_rxmode *rxmode = &conf->rxmode;
266 struct rte_eth_txmode *txmode = &conf->txmode;
267 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
270 PMD_INIT_FUNC_TRACE();
273 if (!rte_eal_has_hugepages()) {
274 octeontx_log_err("huge page is not configured");
278 if (txmode->mq_mode) {
279 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
283 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
284 rxmode->mq_mode != ETH_MQ_RX_RSS) {
285 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
289 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
290 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
291 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
294 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
295 octeontx_log_err("setting link speed/duplex not supported");
299 if (conf->dcb_capability_en) {
300 octeontx_log_err("DCB enable not supported");
304 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
305 octeontx_log_err("flow director not supported");
309 nic->num_tx_queues = dev->data->nb_tx_queues;
311 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
315 octeontx_log_err("failed to open channel %d no-of-txq %d",
316 nic->base_ochan, nic->num_tx_queues);
320 nic->pki.classifier_enable = false;
321 nic->pki.hash_enable = true;
322 nic->pki.initialized = false;
328 octeontx_dev_close(struct rte_eth_dev *dev)
330 struct octeontx_txq *txq = NULL;
331 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
335 PMD_INIT_FUNC_TRACE();
337 rte_event_dev_close(nic->evdev);
339 ret = octeontx_pko_channel_close(nic->base_ochan);
341 octeontx_log_err("failed to close channel %d VF%d %d %d",
342 nic->base_ochan, nic->port_id, nic->num_tx_queues,
345 /* Free txq resources for this port */
346 for (i = 0; i < nic->num_tx_queues; i++) {
347 txq = dev->data->tx_queues[i];
354 /* Free MAC address table */
355 rte_free(dev->data->mac_addrs);
356 dev->data->mac_addrs = NULL;
358 dev->tx_pkt_burst = NULL;
359 dev->rx_pkt_burst = NULL;
363 octeontx_dev_start(struct rte_eth_dev *dev)
365 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
370 PMD_INIT_FUNC_TRACE();
374 dev->tx_pkt_burst = octeontx_xmit_pkts;
375 ret = octeontx_pko_channel_start(nic->base_ochan);
377 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
378 nic->port_id, nic->num_tx_queues, nic->base_ochan,
386 dev->rx_pkt_burst = octeontx_recv_pkts;
387 ret = octeontx_pki_port_start(nic->port_id);
389 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
390 goto channel_stop_error;
396 ret = octeontx_port_start(nic);
398 octeontx_log_err("failed start port %d", ret);
399 goto pki_port_stop_error;
402 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
403 nic->base_ochan, nic->num_tx_queues, nic->port_id);
405 ret = rte_event_dev_start(nic->evdev);
407 octeontx_log_err("failed to start evdev: ret (%d)", ret);
408 goto pki_port_stop_error;
415 octeontx_pki_port_stop(nic->port_id);
417 octeontx_pko_channel_stop(nic->base_ochan);
423 octeontx_dev_stop(struct rte_eth_dev *dev)
425 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
428 PMD_INIT_FUNC_TRACE();
430 rte_event_dev_stop(nic->evdev);
432 ret = octeontx_port_stop(nic);
434 octeontx_log_err("failed to req stop port %d res=%d",
439 ret = octeontx_pki_port_stop(nic->port_id);
441 octeontx_log_err("failed to stop pki port %d res=%d",
446 ret = octeontx_pko_channel_stop(nic->base_ochan);
448 octeontx_log_err("failed to stop channel %d VF%d %d %d",
449 nic->base_ochan, nic->port_id, nic->num_tx_queues,
456 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
458 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
460 PMD_INIT_FUNC_TRACE();
461 return octeontx_port_promisc_set(nic, 1);
465 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
467 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
469 PMD_INIT_FUNC_TRACE();
470 return octeontx_port_promisc_set(nic, 0);
474 octeontx_port_link_status(struct octeontx_nic *nic)
478 PMD_INIT_FUNC_TRACE();
479 res = octeontx_bgx_port_link_status(nic->port_id);
481 octeontx_log_err("failed to get port %d link status",
486 nic->link_up = (uint8_t)res;
487 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
493 * Return 0 means link status changed, -1 means not changed
496 octeontx_dev_link_update(struct rte_eth_dev *dev,
497 int wait_to_complete __rte_unused)
499 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
500 struct rte_eth_link link;
503 PMD_INIT_FUNC_TRACE();
505 res = octeontx_port_link_status(nic);
507 octeontx_log_err("failed to request link status %d", res);
511 link.link_status = nic->link_up;
513 switch (nic->speed) {
514 case OCTEONTX_LINK_SPEED_SGMII:
515 link.link_speed = ETH_SPEED_NUM_1G;
518 case OCTEONTX_LINK_SPEED_XAUI:
519 link.link_speed = ETH_SPEED_NUM_10G;
522 case OCTEONTX_LINK_SPEED_RXAUI:
523 case OCTEONTX_LINK_SPEED_10G_R:
524 link.link_speed = ETH_SPEED_NUM_10G;
526 case OCTEONTX_LINK_SPEED_QSGMII:
527 link.link_speed = ETH_SPEED_NUM_5G;
529 case OCTEONTX_LINK_SPEED_40G_R:
530 link.link_speed = ETH_SPEED_NUM_40G;
533 case OCTEONTX_LINK_SPEED_RESERVE1:
534 case OCTEONTX_LINK_SPEED_RESERVE2:
536 link.link_speed = ETH_SPEED_NUM_NONE;
537 octeontx_log_err("incorrect link speed %d", nic->speed);
541 link.link_duplex = ETH_LINK_FULL_DUPLEX;
542 link.link_autoneg = ETH_LINK_AUTONEG;
544 return rte_eth_linkstatus_set(dev, &link);
548 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
550 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
552 PMD_INIT_FUNC_TRACE();
553 return octeontx_port_stats(nic, stats);
557 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
559 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
561 PMD_INIT_FUNC_TRACE();
562 return octeontx_port_stats_clr(nic);
566 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
568 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
571 ret = octeontx_bgx_port_mac_del(nic->port_id, index);
573 octeontx_log_err("failed to del MAC address filter on port %d",
578 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
579 struct rte_ether_addr *mac_addr,
581 __rte_unused uint32_t vmdq)
583 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
586 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
589 octeontx_log_err("failed to add MAC address filter on port %d",
598 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
599 struct rte_ether_addr *addr)
601 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
602 uint8_t prom_mode = dev->data->promiscuous;
605 dev->data->promiscuous = 0;
606 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
608 /* Update same mac address to BGX CAM table */
609 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
613 dev->data->promiscuous = prom_mode;
614 octeontx_log_err("failed to set MAC address on port %d",
622 octeontx_dev_info(struct rte_eth_dev *dev,
623 struct rte_eth_dev_info *dev_info)
625 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
627 /* Autonegotiation may be disabled */
628 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
629 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
630 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
633 dev_info->max_mac_addrs =
634 octeontx_bgx_port_mac_entries_get(nic->port_id);
635 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
636 dev_info->max_rx_queues = 1;
637 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
638 dev_info->min_rx_bufsize = 0;
640 dev_info->default_rxconf = (struct rte_eth_rxconf) {
643 .offloads = OCTEONTX_RX_OFFLOADS,
646 dev_info->default_txconf = (struct rte_eth_txconf) {
648 .offloads = OCTEONTX_TX_OFFLOADS,
651 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
652 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
653 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
654 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
660 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
662 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
663 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
664 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
668 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
671 struct octeontx_txq *txq;
674 PMD_INIT_FUNC_TRACE();
676 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
679 txq = dev->data->tx_queues[qidx];
681 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
683 sizeof(octeontx_dq_t),
685 octeontx_dq_info_getter);
691 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
695 (void)octeontx_port_stop(nic);
696 octeontx_pko_channel_stop(nic->base_ochan);
697 octeontx_pko_channel_close(nic->base_ochan);
698 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
703 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
705 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
707 PMD_INIT_FUNC_TRACE();
708 qidx = qidx % PKO_VF_NUM_DQ;
709 return octeontx_vf_start_tx_queue(dev, nic, qidx);
713 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
719 PMD_INIT_FUNC_TRACE();
721 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
724 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
729 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
731 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
733 PMD_INIT_FUNC_TRACE();
734 qidx = qidx % PKO_VF_NUM_DQ;
736 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
740 octeontx_dev_tx_queue_release(void *tx_queue)
742 struct octeontx_txq *txq = tx_queue;
745 PMD_INIT_FUNC_TRACE();
748 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
750 octeontx_log_err("failed stop tx_queue(%d)\n",
758 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
759 uint16_t nb_desc, unsigned int socket_id,
760 const struct rte_eth_txconf *tx_conf __rte_unused)
762 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
763 struct octeontx_txq *txq = NULL;
767 RTE_SET_USED(nb_desc);
768 RTE_SET_USED(socket_id);
770 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
772 /* Socket id check */
773 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
774 socket_id != (unsigned int)nic->node)
775 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
776 socket_id, nic->node);
778 /* Free memory prior to re-allocation if needed. */
779 if (dev->data->tx_queues[qidx] != NULL) {
780 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
782 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
783 dev->data->tx_queues[qidx] = NULL;
786 /* Allocating tx queue data structure */
787 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
788 RTE_CACHE_LINE_SIZE, nic->node);
790 octeontx_log_err("failed to allocate txq=%d", qidx);
796 txq->queue_id = dq_num;
797 dev->data->tx_queues[qidx] = txq;
798 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
800 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
802 sizeof(octeontx_dq_t),
804 octeontx_dq_info_getter);
810 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
811 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
813 txq->dq.fc_status_va);
825 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
826 uint16_t nb_desc, unsigned int socket_id,
827 const struct rte_eth_rxconf *rx_conf,
828 struct rte_mempool *mb_pool)
830 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
831 struct rte_mempool_ops *mp_ops = NULL;
832 struct octeontx_rxq *rxq = NULL;
833 pki_pktbuf_cfg_t pktbuf_conf;
834 pki_hash_cfg_t pki_hash;
835 pki_qos_cfg_t pki_qos;
839 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
840 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
842 RTE_SET_USED(nb_desc);
844 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
845 memset(&pki_hash, 0, sizeof(pki_hash));
846 memset(&pki_qos, 0, sizeof(pki_qos));
848 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
849 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
850 octeontx_log_err("failed to find octeontx_fpavf mempool");
854 /* Handle forbidden configurations */
855 if (nic->pki.classifier_enable) {
856 octeontx_log_err("cannot setup queue %d. "
857 "Classifier option unsupported", qidx);
863 /* Rx deferred start is not supported */
864 if (rx_conf->rx_deferred_start) {
865 octeontx_log_err("rx deferred start not supported");
869 /* Verify queue index */
870 if (qidx >= dev->data->nb_rx_queues) {
871 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
872 qidx, (dev->data->nb_rx_queues - 1));
876 /* Socket id check */
877 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
878 socket_id != (unsigned int)nic->node)
879 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
880 socket_id, nic->node);
882 /* Allocating rx queue data structure */
883 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
884 RTE_CACHE_LINE_SIZE, nic->node);
886 octeontx_log_err("failed to allocate rxq=%d", qidx);
890 if (!nic->pki.initialized) {
891 pktbuf_conf.port_type = 0;
892 pki_hash.port_type = 0;
893 pki_qos.port_type = 0;
895 pktbuf_conf.mmask.f_wqe_skip = 1;
896 pktbuf_conf.mmask.f_first_skip = 1;
897 pktbuf_conf.mmask.f_later_skip = 1;
898 pktbuf_conf.mmask.f_mbuff_size = 1;
899 pktbuf_conf.mmask.f_cache_mode = 1;
901 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
902 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
903 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
904 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
905 RTE_PKTMBUF_HEADROOM -
906 rte_pktmbuf_priv_size(mb_pool) -
907 sizeof(struct rte_mbuf));
909 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
911 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
913 octeontx_log_err("fail to configure pktbuf for port %d",
918 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
919 "\tmbuf_size:\t0x%0x\n"
920 "\twqe_skip:\t0x%0x\n"
921 "\tfirst_skip:\t0x%0x\n"
922 "\tlater_skip:\t0x%0x\n"
923 "\tcache_mode:\t%s\n",
925 pktbuf_conf.mbuff_size,
926 pktbuf_conf.wqe_skip,
927 pktbuf_conf.first_skip,
928 pktbuf_conf.later_skip,
929 (pktbuf_conf.cache_mode ==
932 (pktbuf_conf.cache_mode ==
935 (pktbuf_conf.cache_mode ==
936 PKI_OPC_MODE_STF1_STT) ?
937 "STF1_STT" : "STF2_STT");
939 if (nic->pki.hash_enable) {
940 pki_hash.tag_dlc = 1;
941 pki_hash.tag_slc = 1;
942 pki_hash.tag_dlf = 1;
943 pki_hash.tag_slf = 1;
944 pki_hash.tag_prt = 1;
945 octeontx_pki_port_hash_config(port, &pki_hash);
948 pool = (uintptr_t)mb_pool->pool_id;
950 /* Get the gaura Id */
951 gaura = octeontx_fpa_bufpool_gaura(pool);
953 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
954 pki_qos.num_entry = 1;
955 pki_qos.drop_policy = 0;
956 pki_qos.tag_type = 0L;
957 pki_qos.qos_entry[0].port_add = 0;
958 pki_qos.qos_entry[0].gaura = gaura;
959 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
960 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
961 pki_qos.qos_entry[0].grptag_bad = 0;
962 pki_qos.qos_entry[0].grptag_ok = 0;
964 ret = octeontx_pki_port_create_qos(port, &pki_qos);
966 octeontx_log_err("failed to create QOS port=%d, q=%d",
971 nic->pki.initialized = true;
974 rxq->port_id = nic->port_id;
976 rxq->queue_id = qidx;
977 rxq->evdev = nic->evdev;
978 rxq->ev_queues = ev_queues;
979 rxq->ev_ports = ev_ports;
981 dev->data->rx_queues[qidx] = rxq;
982 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
987 octeontx_dev_rx_queue_release(void *rxq)
992 static const uint32_t *
993 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
995 static const uint32_t ptypes[] = {
997 RTE_PTYPE_L3_IPV4_EXT,
999 RTE_PTYPE_L3_IPV6_EXT,
1006 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1013 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1017 if (!strcmp(pool, "octeontx_fpavf"))
1023 /* Initialize and register driver with DPDK Application */
1024 static const struct eth_dev_ops octeontx_dev_ops = {
1025 .dev_configure = octeontx_dev_configure,
1026 .dev_infos_get = octeontx_dev_info,
1027 .dev_close = octeontx_dev_close,
1028 .dev_start = octeontx_dev_start,
1029 .dev_stop = octeontx_dev_stop,
1030 .promiscuous_enable = octeontx_dev_promisc_enable,
1031 .promiscuous_disable = octeontx_dev_promisc_disable,
1032 .link_update = octeontx_dev_link_update,
1033 .stats_get = octeontx_dev_stats_get,
1034 .stats_reset = octeontx_dev_stats_reset,
1035 .mac_addr_remove = octeontx_dev_mac_addr_del,
1036 .mac_addr_add = octeontx_dev_mac_addr_add,
1037 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1038 .tx_queue_start = octeontx_dev_tx_queue_start,
1039 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1040 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1041 .tx_queue_release = octeontx_dev_tx_queue_release,
1042 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1043 .rx_queue_release = octeontx_dev_rx_queue_release,
1044 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1045 .pool_ops_supported = octeontx_pool_ops,
1048 /* Create Ethdev interface per BGX LMAC ports */
1050 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1055 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1056 struct octeontx_nic *nic = NULL;
1057 struct rte_eth_dev *eth_dev = NULL;
1058 struct rte_eth_dev_data *data;
1059 const char *name = rte_vdev_device_name(dev);
1062 PMD_INIT_FUNC_TRACE();
1064 sprintf(octtx_name, "%s_%d", name, port);
1065 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1066 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1067 if (eth_dev == NULL)
1070 eth_dev->dev_ops = &octeontx_dev_ops;
1071 eth_dev->device = &dev->device;
1072 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1073 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1074 rte_eth_dev_probing_finish(eth_dev);
1078 /* Reserve an ethdev entry */
1079 eth_dev = rte_eth_dev_allocate(octtx_name);
1080 if (eth_dev == NULL) {
1081 octeontx_log_err("failed to allocate rte_eth_dev");
1085 data = eth_dev->data;
1087 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1089 octeontx_log_err("failed to allocate nic structure");
1093 data->dev_private = nic;
1094 pko_vfid = octeontx_pko_get_vfid();
1096 if (pko_vfid == SIZE_MAX) {
1097 octeontx_log_err("failed to get pko vfid");
1102 nic->pko_vfid = pko_vfid;
1103 nic->port_id = port;
1106 res = octeontx_port_open(nic);
1110 /* Rx side port configuration */
1111 res = octeontx_pki_port_open(port);
1113 octeontx_log_err("failed to open PKI port %d", port);
1118 eth_dev->device = &dev->device;
1119 eth_dev->intr_handle = NULL;
1120 eth_dev->data->kdrv = RTE_KDRV_NONE;
1121 eth_dev->data->numa_node = dev->device.numa_node;
1123 data->port_id = eth_dev->data->port_id;
1128 data->dev_link.link_status = ETH_LINK_DOWN;
1129 data->dev_started = 0;
1130 data->promiscuous = 0;
1131 data->all_multicast = 0;
1132 data->scattered_rx = 0;
1134 /* Get maximum number of supported MAC entries */
1135 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1136 if (max_entries < 0) {
1137 octeontx_log_err("Failed to get max entries for mac addr");
1142 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1143 RTE_ETHER_ADDR_LEN, 0,
1145 if (data->mac_addrs == NULL) {
1146 octeontx_log_err("failed to allocate memory for mac_addrs");
1151 eth_dev->dev_ops = &octeontx_dev_ops;
1153 /* Finally save ethdev pointer to the NIC structure */
1156 if (nic->port_id != data->port_id) {
1157 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1158 data->port_id, nic->port_id);
1160 goto free_mac_addrs;
1163 /* Update port_id mac to eth_dev */
1164 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1166 /* Update same mac address to BGX CAM table at index 0 */
1167 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1169 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1170 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1171 nic->port_id, nic->port_ena,
1172 nic->base_ochan, nic->num_ochans,
1173 nic->num_tx_queues);
1174 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1176 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1177 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1179 rte_eth_dev_probing_finish(eth_dev);
1180 return data->port_id;
1183 rte_free(data->mac_addrs);
1186 octeontx_port_close(nic);
1188 rte_eth_dev_release_port(eth_dev);
1193 /* Un initialize octeontx device */
1195 octeontx_remove(struct rte_vdev_device *dev)
1197 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1198 struct rte_eth_dev *eth_dev = NULL;
1199 struct octeontx_nic *nic = NULL;
1205 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1206 sprintf(octtx_name, "eth_octeontx_%d", i);
1208 /* reserve an ethdev entry */
1209 eth_dev = rte_eth_dev_allocated(octtx_name);
1210 if (eth_dev == NULL)
1213 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1214 rte_eth_dev_release_port(eth_dev);
1218 nic = octeontx_pmd_priv(eth_dev);
1219 rte_event_dev_stop(nic->evdev);
1220 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1222 rte_eth_dev_release_port(eth_dev);
1223 rte_event_dev_close(nic->evdev);
1226 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1229 /* Free FC resource */
1230 octeontx_pko_fc_free();
1235 /* Initialize octeontx device */
1237 octeontx_probe(struct rte_vdev_device *dev)
1239 const char *dev_name;
1240 static int probe_once;
1241 uint8_t socket_id, qlist;
1242 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1243 struct rte_event_dev_config dev_conf;
1244 const char *eventdev_name = "event_octeontx";
1245 struct rte_event_dev_info info;
1246 struct rte_eth_dev *eth_dev;
1248 struct octeontx_vdev_init_params init_params = {
1249 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1252 dev_name = rte_vdev_device_name(dev);
1254 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1255 strlen(rte_vdev_device_args(dev)) == 0) {
1256 eth_dev = rte_eth_dev_attach_secondary(dev_name);
1258 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1261 /* TODO: request info from primary to set up Rx and Tx */
1262 eth_dev->dev_ops = &octeontx_dev_ops;
1263 eth_dev->device = &dev->device;
1264 rte_eth_dev_probing_finish(eth_dev);
1268 res = octeontx_parse_vdev_init_params(&init_params, dev);
1272 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1273 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1274 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1278 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1280 socket_id = rte_socket_id();
1282 tx_vfcnt = octeontx_pko_vf_count();
1284 if (tx_vfcnt < init_params.nr_port) {
1285 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1286 tx_vfcnt, init_params.nr_port);
1289 evdev = rte_event_dev_get_dev_id(eventdev_name);
1291 octeontx_log_err("eventdev %s not found", eventdev_name);
1295 res = rte_event_dev_info_get(evdev, &info);
1297 octeontx_log_err("failed to eventdev info %d", res);
1301 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1302 info.max_event_queues, info.max_event_ports);
1304 if (octeontx_pko_init_fc(tx_vfcnt))
1307 devconf_set_default_sane_values(&dev_conf, &info);
1308 res = rte_event_dev_configure(evdev, &dev_conf);
1312 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1314 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1317 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1323 /* Enable all queues available */
1324 for (i = 0; i < qnum; i++) {
1325 res = rte_event_queue_setup(evdev, i, NULL);
1327 octeontx_log_err("failed to setup event_q(%d): res %d",
1333 /* Enable all ports available */
1334 for (i = 0; i < pnum; i++) {
1335 res = rte_event_port_setup(evdev, i, NULL);
1338 octeontx_log_err("failed to setup ev port(%d) res=%d",
1345 * Do 1:1 links for ports & queues. All queues would be mapped to
1346 * one port. If there are more ports than queues, then some ports
1347 * won't be linked to any queue.
1349 for (i = 0; i < qnum; i++) {
1350 /* Link one queue to one event port */
1352 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1355 octeontx_log_err("failed to link port (%d): res=%d",
1361 /* Create ethdev interface */
1362 for (i = 0; i < init_params.nr_port; i++) {
1363 port_id = octeontx_create(dev, i, evdev, socket_id);
1365 octeontx_log_err("failed to create device %s",
1371 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1376 octeontx_log_err("interface %s not supported", dev_name);
1377 octeontx_remove(dev);
1381 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1387 octeontx_pko_fc_free();
1391 static struct rte_vdev_driver octeontx_pmd_drv = {
1392 .probe = octeontx_probe,
1393 .remove = octeontx_remove,
1396 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1397 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1398 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");