drivers/net/octeontx/octeontx_ethdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Cavium, Inc
   3  */
   4
   5 #ifndef __OCTEONTX_ETHDEV_H__
   6 #define __OCTEONTX_ETHDEV_H__
   7
   8 #include <stdbool.h>
   9
  10 #include <rte_common.h>
  11 #include <rte_ethdev_driver.h>
  12 #include <rte_eventdev.h>
  13 #include <rte_mempool.h>
  14 #include <rte_memory.h>
  15
  16 #include <octeontx_fpavf.h>
  17
  18 #include "base/octeontx_bgx.h"
  19 #include "base/octeontx_pki_var.h"
  20 #include "base/octeontx_pkivf.h"
  21 #include "base/octeontx_pkovf.h"
  22 #include "base/octeontx_io.h"
  23
  24 #define OCTEONTX_PMD                            net_octeontx
  25 #define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT       12
  26 #define OCTEONTX_VDEV_NR_PORT_ARG               ("nr_port")
  27 #define OCTEONTX_MAX_NAME_LEN                   32
  28
  29 #define OCTEONTX_MAX_BGX_PORTS                  4
  30 #define OCTEONTX_MAX_LMAC_PER_BGX               4
  31
  32 #define OCCTX_RX_NB_SEG_MAX                     6
  33 #define OCCTX_INTR_POLL_INTERVAL_MS             1000
  34 /* VLAN tag inserted by OCCTX_TX_VTAG_ACTION.
  35  * In Tx space is always reserved for this in FRS.
  36  */
  37 #define OCCTX_MAX_VTAG_INS              2
  38 #define OCCTX_MAX_VTAG_ACT_SIZE         (4 * OCCTX_MAX_VTAG_INS)
  39
  40 /* HW config of frame size doesn't include FCS */
  41 #define OCCTX_MAX_HW_FRS                9212
  42 #define OCCTX_MIN_HW_FRS                60
  43
  44 /* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */
  45 #define OCCTX_L2_OVERHEAD       (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
  46                                  OCCTX_MAX_VTAG_ACT_SIZE)
  47
  48 /* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */
  49 #define OCCTX_MAX_FRS   \
  50         (OCCTX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - OCCTX_MAX_VTAG_ACT_SIZE)
  51
  52 #define OCCTX_MIN_FRS           (OCCTX_MIN_HW_FRS + RTE_ETHER_CRC_LEN)
  53
  54 #define OCCTX_MAX_MTU           (OCCTX_MAX_FRS - OCCTX_L2_OVERHEAD)
  55
  56 #define OCTEONTX_RX_OFFLOADS            (DEV_RX_OFFLOAD_CHECKSUM     | \
  57                                          DEV_RX_OFFLOAD_SCATTER      | \
  58                                          DEV_RX_OFFLOAD_JUMBO_FRAME  | \
  59                                          DEV_RX_OFFLOAD_VLAN_FILTER)
  60
  61 #define OCTEONTX_TX_OFFLOADS            (DEV_TX_OFFLOAD_MT_LOCKFREE    |  \
  62                                          DEV_TX_OFFLOAD_MBUF_FAST_FREE |  \
  63                                          DEV_TX_OFFLOAD_MULTI_SEGS)
  64
  65 static inline struct octeontx_nic *
  66 octeontx_pmd_priv(struct rte_eth_dev *dev)
  67 {
  68         return dev->data->dev_private;
  69 }
  70
  71 extern uint16_t
  72 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
  73
  74 struct vlan_entry {
  75         TAILQ_ENTRY(vlan_entry) next;
  76         uint16_t vlan_id;
  77 };
  78
  79 TAILQ_HEAD(octeontx_vlan_filter_tbl, vlan_entry);
  80
  81 struct octeontx_vlan_info {
  82         struct octeontx_vlan_filter_tbl fltr_tbl;
  83         uint8_t filter_on;
  84 };
  85
  86 struct octeontx_fc_info {
  87         enum rte_eth_fc_mode mode;  /**< Link flow control mode */
  88         enum rte_eth_fc_mode def_mode;
  89         uint16_t high_water;
  90         uint16_t low_water;
  91         uint16_t def_highmark;
  92         uint16_t def_lowmark;
  93         uint32_t rx_fifosz;
  94 };
  95
  96 /* Octeontx ethdev nic */
  97 struct octeontx_nic {
  98         struct rte_eth_dev *dev;
  99         int node;
 100         int port_id;
 101         int port_ena;
 102         int base_ichan;
 103         int num_ichans;
 104         int base_ochan;
 105         int num_ochans;
 106         uint8_t evdev;
 107         uint8_t bpen;
 108         uint8_t fcs_strip;
 109         uint8_t bcast_mode;
 110         uint8_t mcast_mode;
 111         uint16_t num_tx_queues;
 112         uint64_t hwcap;
 113         uint8_t pko_vfid;
 114         uint8_t link_up;
 115         uint8_t duplex;
 116         uint8_t speed;
 117         uint16_t bgx_mtu;
 118         uint16_t mtu;
 119         uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
 120         /* Rx port parameters */
 121         struct {
 122                 bool classifier_enable;
 123                 bool hash_enable;
 124                 bool initialized;
 125         } pki;
 126
 127         uint16_t ev_queues;
 128         uint16_t ev_ports;
 129         uint64_t rx_offloads;
 130         uint16_t rx_offload_flags;
 131         uint64_t tx_offloads;
 132         uint16_t tx_offload_flags;
 133         struct octeontx_vlan_info vlan_info;
 134         int print_flag;
 135         struct octeontx_fc_info fc;
 136 } __rte_cache_aligned;
 137
 138 struct octeontx_txq {
 139         uint16_t queue_id;
 140         octeontx_dq_t dq;
 141         struct rte_eth_dev *eth_dev;
 142 } __rte_cache_aligned;
 143
 144 struct octeontx_rxq {
 145         uint16_t queue_id;
 146         uint16_t port_id;
 147         uint8_t evdev;
 148         struct rte_eth_dev *eth_dev;
 149         uint16_t ev_queues;
 150         uint16_t ev_ports;
 151         struct rte_mempool *pool;
 152 } __rte_cache_aligned;
 153
 154 void
 155 octeontx_set_tx_function(struct rte_eth_dev *dev);
 156
 157 /* VLAN */
 158 int octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx);
 159 int octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx);
 160 int octeontx_dev_vlan_offload_init(struct rte_eth_dev *dev);
 161 int octeontx_dev_vlan_offload_fini(struct rte_eth_dev *eth_dev);
 162 int octeontx_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 163 int octeontx_dev_vlan_filter_set(struct rte_eth_dev *dev,
 164                                  uint16_t vlan_id, int on);
 165 int octeontx_dev_set_link_up(struct rte_eth_dev *eth_dev);
 166 int octeontx_dev_set_link_down(struct rte_eth_dev *eth_dev);
 167
 168 /* Flow control */
 169 int octeontx_dev_flow_ctrl_init(struct rte_eth_dev *dev);
 170 int octeontx_dev_flow_ctrl_fini(struct rte_eth_dev *dev);
 171 int octeontx_dev_flow_ctrl_get(struct rte_eth_dev *dev,
 172                                struct rte_eth_fc_conf *fc_conf);
 173 int octeontx_dev_flow_ctrl_set(struct rte_eth_dev *dev,
 174                                struct rte_eth_fc_conf *fc_conf);
 175
 176 #endif /* __OCTEONTX_ETHDEV_H__ */