05fa8988e2a030f103a65bd3283c13ba80642f10
[dpdk.git] / drivers / net / octeontx2 / otx2_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2019 Marvell International Ltd.
3  */
4
5 #include <rte_ethdev_pci.h>
6 #include <rte_io.h>
7 #include <rte_malloc.h>
8
9 #include "otx2_ethdev.h"
10
11 static int
12 otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
13 {
14         RTE_SET_USED(eth_dev);
15
16         return -ENODEV;
17 }
18
19 static int
20 otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)
21 {
22         RTE_SET_USED(eth_dev);
23         RTE_SET_USED(mbox_close);
24
25         return -ENODEV;
26 }
27
28 static int
29 nix_remove(struct rte_pci_device *pci_dev)
30 {
31         struct rte_eth_dev *eth_dev;
32         int rc;
33
34         eth_dev = rte_eth_dev_allocated(pci_dev->device.name);
35         if (eth_dev) {
36                 /* Cleanup eth dev */
37                 rc = otx2_eth_dev_uninit(eth_dev, true);
38                 if (rc)
39                         return rc;
40
41                 rte_eth_dev_pci_release(eth_dev);
42         }
43
44         /* Nothing to be done for secondary processes */
45         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
46                 return 0;
47
48         return 0;
49 }
50
51 static int
52 nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
53 {
54         int rc;
55
56         RTE_SET_USED(pci_drv);
57
58         rc = rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct otx2_eth_dev),
59                                            otx2_eth_dev_init);
60
61         /* On error on secondary, recheck if port exists in primary or
62          * in mid of detach state.
63          */
64         if (rte_eal_process_type() != RTE_PROC_PRIMARY && rc)
65                 if (!rte_eth_dev_allocated(pci_dev->device.name))
66                         return 0;
67         return rc;
68 }
69
70 static const struct rte_pci_id pci_nix_map[] = {
71         {
72                 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_PF)
73         },
74         {
75                 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_VF)
76         },
77         {
78                 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
79                                PCI_DEVID_OCTEONTX2_RVU_AF_VF)
80         },
81         {
82                 .vendor_id = 0,
83         },
84 };
85
86 static struct rte_pci_driver pci_nix = {
87         .id_table = pci_nix_map,
88         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA |
89                         RTE_PCI_DRV_INTR_LSC,
90         .probe = nix_probe,
91         .remove = nix_remove,
92 };
93
94 RTE_PMD_REGISTER_PCI(net_octeontx2, pci_nix);
95 RTE_PMD_REGISTER_PCI_TABLE(net_octeontx2, pci_nix_map);
96 RTE_PMD_REGISTER_KMOD_DEP(net_octeontx2, "vfio-pci");