1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #ifndef __OTX2_ETHDEV_H__
6 #define __OTX2_ETHDEV_H__
10 #include <rte_common.h>
11 #include <rte_ethdev.h>
13 #include "otx2_common.h"
16 #include "otx2_mempool.h"
18 #define OTX2_ETH_DEV_PMD_VERSION "1.0"
20 /* Ethdev HWCAP and Fixup flags. Use from MSB bits to avoid conflict with dev */
22 /* Minimum CQ size should be 4K */
23 #define OTX2_FIXUP_F_MIN_4K_Q BIT_ULL(63)
24 #define otx2_ethdev_fixup_is_min_4k_q(dev) \
25 ((dev)->hwcap & OTX2_FIXUP_F_MIN_4K_Q)
26 /* Limit CQ being full */
27 #define OTX2_FIXUP_F_LIMIT_CQ_FULL BIT_ULL(62)
28 #define otx2_ethdev_fixup_is_limit_cq_full(dev) \
29 ((dev)->hwcap & OTX2_FIXUP_F_LIMIT_CQ_FULL)
31 /* Used for struct otx2_eth_dev::flags */
32 #define OTX2_LINK_CFG_IN_PROGRESS_F BIT_ULL(0)
34 #define NIX_TX_OFFLOAD_CAPA ( \
35 DEV_TX_OFFLOAD_MBUF_FAST_FREE | \
36 DEV_TX_OFFLOAD_MT_LOCKFREE | \
37 DEV_TX_OFFLOAD_VLAN_INSERT | \
38 DEV_TX_OFFLOAD_QINQ_INSERT | \
39 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
40 DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \
41 DEV_TX_OFFLOAD_TCP_CKSUM | \
42 DEV_TX_OFFLOAD_UDP_CKSUM | \
43 DEV_TX_OFFLOAD_SCTP_CKSUM | \
44 DEV_TX_OFFLOAD_MULTI_SEGS | \
45 DEV_TX_OFFLOAD_IPV4_CKSUM)
47 #define NIX_RX_OFFLOAD_CAPA ( \
48 DEV_RX_OFFLOAD_CHECKSUM | \
49 DEV_RX_OFFLOAD_SCTP_CKSUM | \
50 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
51 DEV_RX_OFFLOAD_SCATTER | \
52 DEV_RX_OFFLOAD_JUMBO_FRAME | \
53 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \
54 DEV_RX_OFFLOAD_VLAN_STRIP | \
55 DEV_RX_OFFLOAD_VLAN_FILTER | \
56 DEV_RX_OFFLOAD_QINQ_STRIP | \
57 DEV_RX_OFFLOAD_TIMESTAMP)
60 OTX2_DEV; /* Base class */
61 MARKER otx2_eth_dev_data_start;
63 uint16_t rx_chan_base;
64 uint16_t tx_chan_base;
67 uint8_t lso_tsov4_idx;
68 uint8_t lso_tsov6_idx;
69 uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
70 uint8_t max_mac_entries;
75 uint16_t rx_offload_flags; /* Selected Rx offload flags(NIX_RX_*_F) */
77 uint16_t tx_offload_flags; /* Selected Tx offload flags(NIX_TX_*_F) */
79 uint64_t rx_offload_capa;
80 uint64_t tx_offload_capa;
81 } __rte_cache_aligned;
83 static inline struct otx2_eth_dev *
84 otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
86 return eth_dev->data->dev_private;
90 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);
91 int otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev);
92 int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,
93 struct rte_ether_addr *addr);
95 /* Mac address handling */
96 int otx2_nix_mac_addr_get(struct rte_eth_dev *eth_dev, uint8_t *addr);
97 int otx2_cgx_mac_max_entries_get(struct otx2_eth_dev *dev);
99 #endif /* __OTX2_ETHDEV_H__ */