1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #include "otx2_ethdev.h"
7 #define nix_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__)
8 #define NIX_REG_INFO(reg) {reg, #reg}
10 struct nix_lf_reg_info {
16 nix_lf_reg_info nix_lf_reg[] = {
17 NIX_REG_INFO(NIX_LF_RX_SECRETX(0)),
18 NIX_REG_INFO(NIX_LF_RX_SECRETX(1)),
19 NIX_REG_INFO(NIX_LF_RX_SECRETX(2)),
20 NIX_REG_INFO(NIX_LF_RX_SECRETX(3)),
21 NIX_REG_INFO(NIX_LF_RX_SECRETX(4)),
22 NIX_REG_INFO(NIX_LF_RX_SECRETX(5)),
23 NIX_REG_INFO(NIX_LF_CFG),
24 NIX_REG_INFO(NIX_LF_GINT),
25 NIX_REG_INFO(NIX_LF_GINT_W1S),
26 NIX_REG_INFO(NIX_LF_GINT_ENA_W1C),
27 NIX_REG_INFO(NIX_LF_GINT_ENA_W1S),
28 NIX_REG_INFO(NIX_LF_ERR_INT),
29 NIX_REG_INFO(NIX_LF_ERR_INT_W1S),
30 NIX_REG_INFO(NIX_LF_ERR_INT_ENA_W1C),
31 NIX_REG_INFO(NIX_LF_ERR_INT_ENA_W1S),
32 NIX_REG_INFO(NIX_LF_RAS),
33 NIX_REG_INFO(NIX_LF_RAS_W1S),
34 NIX_REG_INFO(NIX_LF_RAS_ENA_W1C),
35 NIX_REG_INFO(NIX_LF_RAS_ENA_W1S),
36 NIX_REG_INFO(NIX_LF_SQ_OP_ERR_DBG),
37 NIX_REG_INFO(NIX_LF_MNQ_ERR_DBG),
38 NIX_REG_INFO(NIX_LF_SEND_ERR_DBG),
42 nix_lf_get_reg_count(struct otx2_eth_dev *dev)
46 reg_count = RTE_DIM(nix_lf_reg);
48 reg_count += dev->lf_tx_stats;
50 reg_count += dev->lf_rx_stats;
52 reg_count += dev->qints;
53 /* NIX_LF_QINTX_INT */
54 reg_count += dev->qints;
55 /* NIX_LF_QINTX_ENA_W1S */
56 reg_count += dev->qints;
57 /* NIX_LF_QINTX_ENA_W1C */
58 reg_count += dev->qints;
59 /* NIX_LF_CINTX_CNT */
60 reg_count += dev->cints;
61 /* NIX_LF_CINTX_WAIT */
62 reg_count += dev->cints;
63 /* NIX_LF_CINTX_INT */
64 reg_count += dev->cints;
65 /* NIX_LF_CINTX_INT_W1S */
66 reg_count += dev->cints;
67 /* NIX_LF_CINTX_ENA_W1S */
68 reg_count += dev->cints;
69 /* NIX_LF_CINTX_ENA_W1C */
70 reg_count += dev->cints;
76 otx2_nix_reg_dump(struct otx2_eth_dev *dev, uint64_t *data)
78 uintptr_t nix_lf_base = dev->base;
83 dump_stdout = data ? 0 : 1;
85 for (i = 0; i < RTE_DIM(nix_lf_reg); i++) {
86 reg = otx2_read64(nix_lf_base + nix_lf_reg[i].offset);
87 if (dump_stdout && reg)
88 nix_dump("%32s = 0x%" PRIx64,
89 nix_lf_reg[i].name, reg);
95 for (i = 0; i < dev->lf_tx_stats; i++) {
96 reg = otx2_read64(nix_lf_base + NIX_LF_TX_STATX(i));
97 if (dump_stdout && reg)
98 nix_dump("%32s_%d = 0x%" PRIx64,
99 "NIX_LF_TX_STATX", i, reg);
104 /* NIX_LF_RX_STATX */
105 for (i = 0; i < dev->lf_rx_stats; i++) {
106 reg = otx2_read64(nix_lf_base + NIX_LF_RX_STATX(i));
107 if (dump_stdout && reg)
108 nix_dump("%32s_%d = 0x%" PRIx64,
109 "NIX_LF_RX_STATX", i, reg);
114 /* NIX_LF_QINTX_CNT*/
115 for (i = 0; i < dev->qints; i++) {
116 reg = otx2_read64(nix_lf_base + NIX_LF_QINTX_CNT(i));
117 if (dump_stdout && reg)
118 nix_dump("%32s_%d = 0x%" PRIx64,
119 "NIX_LF_QINTX_CNT", i, reg);
124 /* NIX_LF_QINTX_INT */
125 for (i = 0; i < dev->qints; i++) {
126 reg = otx2_read64(nix_lf_base + NIX_LF_QINTX_INT(i));
127 if (dump_stdout && reg)
128 nix_dump("%32s_%d = 0x%" PRIx64,
129 "NIX_LF_QINTX_INT", i, reg);
134 /* NIX_LF_QINTX_ENA_W1S */
135 for (i = 0; i < dev->qints; i++) {
136 reg = otx2_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1S(i));
137 if (dump_stdout && reg)
138 nix_dump("%32s_%d = 0x%" PRIx64,
139 "NIX_LF_QINTX_ENA_W1S", i, reg);
144 /* NIX_LF_QINTX_ENA_W1C */
145 for (i = 0; i < dev->qints; i++) {
146 reg = otx2_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1C(i));
147 if (dump_stdout && reg)
148 nix_dump("%32s_%d = 0x%" PRIx64,
149 "NIX_LF_QINTX_ENA_W1C", i, reg);
154 /* NIX_LF_CINTX_CNT */
155 for (i = 0; i < dev->cints; i++) {
156 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_CNT(i));
157 if (dump_stdout && reg)
158 nix_dump("%32s_%d = 0x%" PRIx64,
159 "NIX_LF_CINTX_CNT", i, reg);
164 /* NIX_LF_CINTX_WAIT */
165 for (i = 0; i < dev->cints; i++) {
166 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_WAIT(i));
167 if (dump_stdout && reg)
168 nix_dump("%32s_%d = 0x%" PRIx64,
169 "NIX_LF_CINTX_WAIT", i, reg);
174 /* NIX_LF_CINTX_INT */
175 for (i = 0; i < dev->cints; i++) {
176 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_INT(i));
177 if (dump_stdout && reg)
178 nix_dump("%32s_%d = 0x%" PRIx64,
179 "NIX_LF_CINTX_INT", i, reg);
184 /* NIX_LF_CINTX_INT_W1S */
185 for (i = 0; i < dev->cints; i++) {
186 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_INT_W1S(i));
187 if (dump_stdout && reg)
188 nix_dump("%32s_%d = 0x%" PRIx64,
189 "NIX_LF_CINTX_INT_W1S", i, reg);
194 /* NIX_LF_CINTX_ENA_W1S */
195 for (i = 0; i < dev->cints; i++) {
196 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1S(i));
197 if (dump_stdout && reg)
198 nix_dump("%32s_%d = 0x%" PRIx64,
199 "NIX_LF_CINTX_ENA_W1S", i, reg);
204 /* NIX_LF_CINTX_ENA_W1C */
205 for (i = 0; i < dev->cints; i++) {
206 reg = otx2_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1C(i));
207 if (dump_stdout && reg)
208 nix_dump("%32s_%d = 0x%" PRIx64,
209 "NIX_LF_CINTX_ENA_W1C", i, reg);
217 otx2_nix_dev_get_reg(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs)
219 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
220 uint64_t *data = regs->data;
223 regs->length = nix_lf_get_reg_count(dev);
229 regs->length == (uint32_t)nix_lf_get_reg_count(dev)) {
230 otx2_nix_reg_dump(dev, data);
238 nix_lf_sq_dump(__otx2_io struct nix_sq_ctx_s *ctx)
240 nix_dump("W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
241 ctx->sqe_way_mask, ctx->cq);
242 nix_dump("W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
243 ctx->sdp_mcast, ctx->substream);
244 nix_dump("W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n",
245 ctx->qint_idx, ctx->ena);
247 nix_dump("W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
248 ctx->sqb_count, ctx->default_chan);
249 nix_dump("W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d",
250 ctx->smq_rr_quantum, ctx->sso_ena);
251 nix_dump("W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
252 ctx->xoff, ctx->cq_ena, ctx->smq);
254 nix_dump("W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
255 ctx->sqe_stype, ctx->sq_int_ena);
256 nix_dump("W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d",
257 ctx->sq_int, ctx->sqb_aura);
258 nix_dump("W2: smq_rr_count \t\t%d\n", ctx->smq_rr_count);
260 nix_dump("W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
261 ctx->smq_next_sq_vld, ctx->smq_pend);
262 nix_dump("W3: smenq_next_sqb_vld \t%d\nW3: head_offset\t\t\t%d",
263 ctx->smenq_next_sqb_vld, ctx->head_offset);
264 nix_dump("W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
265 ctx->smenq_offset, ctx->tail_offset);
266 nix_dump("W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
267 ctx->smq_lso_segnum, ctx->smq_next_sq);
268 nix_dump("W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d",
269 ctx->mnq_dis, ctx->lmt_dis);
270 nix_dump("W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
271 ctx->cq_limit, ctx->max_sqe_size);
273 nix_dump("W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
274 nix_dump("W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
275 nix_dump("W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
276 nix_dump("W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
277 nix_dump("W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
279 nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d",
280 ctx->vfi_lso_vld, ctx->vfi_lso_vlan1_ins_ena);
281 nix_dump("W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
282 ctx->vfi_lso_vlan0_ins_ena, ctx->vfi_lso_mps);
283 nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d",
284 ctx->vfi_lso_sb, ctx->vfi_lso_sizem1);
285 nix_dump("W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total);
287 nix_dump("W10: scm_lso_rem \t\t0x%" PRIx64 "",
288 (uint64_t)ctx->scm_lso_rem);
289 nix_dump("W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
290 nix_dump("W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
291 nix_dump("W14: dropped_octs \t\t0x%" PRIx64 "",
292 (uint64_t)ctx->drop_octs);
293 nix_dump("W15: dropped_pkts \t\t0x%" PRIx64 "",
294 (uint64_t)ctx->drop_pkts);
298 nix_lf_rq_dump(__otx2_io struct nix_rq_ctx_s *ctx)
300 nix_dump("W0: wqe_aura \t\t\t%d\nW0: substream \t\t\t0x%03x",
301 ctx->wqe_aura, ctx->substream);
302 nix_dump("W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d",
303 ctx->cq, ctx->ena_wqwd);
304 nix_dump("W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d",
305 ctx->ipsech_ena, ctx->sso_ena);
306 nix_dump("W0: ena \t\t\t%d\n", ctx->ena);
308 nix_dump("W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d",
309 ctx->lpb_drop_ena, ctx->spb_drop_ena);
310 nix_dump("W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d",
311 ctx->xqe_drop_ena, ctx->wqe_caching);
312 nix_dump("W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d",
313 ctx->pb_caching, ctx->sso_tt);
314 nix_dump("W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d",
315 ctx->sso_grp, ctx->lpb_aura);
316 nix_dump("W1: spb_aura \t\t\t%d\n", ctx->spb_aura);
318 nix_dump("W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d",
319 ctx->xqe_hdr_split, ctx->xqe_imm_copy);
320 nix_dump("W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d",
321 ctx->xqe_imm_size, ctx->later_skip);
322 nix_dump("W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d",
323 ctx->first_skip, ctx->lpb_sizem1);
324 nix_dump("W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d",
325 ctx->spb_ena, ctx->wqe_skip);
326 nix_dump("W2: spb_sizem1 \t\t\t%d\n", ctx->spb_sizem1);
328 nix_dump("W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d",
329 ctx->spb_pool_pass, ctx->spb_pool_drop);
330 nix_dump("W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d",
331 ctx->spb_aura_pass, ctx->spb_aura_drop);
332 nix_dump("W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d",
333 ctx->wqe_pool_pass, ctx->wqe_pool_drop);
334 nix_dump("W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n",
335 ctx->xqe_pass, ctx->xqe_drop);
337 nix_dump("W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d",
338 ctx->qint_idx, ctx->rq_int_ena);
339 nix_dump("W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d",
340 ctx->rq_int, ctx->lpb_pool_pass);
341 nix_dump("W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d",
342 ctx->lpb_pool_drop, ctx->lpb_aura_pass);
343 nix_dump("W4: lpb_aura_drop \t\t%d\n", ctx->lpb_aura_drop);
345 nix_dump("W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d",
346 ctx->flow_tagw, ctx->bad_utag);
347 nix_dump("W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n",
348 ctx->good_utag, ctx->ltag);
350 nix_dump("W6: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
351 nix_dump("W7: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
352 nix_dump("W8: drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
353 nix_dump("W9: drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
354 nix_dump("W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
358 nix_lf_cq_dump(__otx2_io struct nix_cq_ctx_s *ctx)
360 nix_dump("W0: base \t\t\t0x%" PRIx64 "\n", ctx->base);
362 nix_dump("W1: wrptr \t\t\t%" PRIx64 "", (uint64_t)ctx->wrptr);
363 nix_dump("W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d",
364 ctx->avg_con, ctx->cint_idx);
365 nix_dump("W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d",
366 ctx->cq_err, ctx->qint_idx);
367 nix_dump("W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n",
368 ctx->bpid, ctx->bp_ena);
370 nix_dump("W2: update_time \t\t%d\nW2: avg_level \t\t\t%d",
371 ctx->update_time, ctx->avg_level);
372 nix_dump("W2: head \t\t\t%d\nW2: tail \t\t\t%d\n",
373 ctx->head, ctx->tail);
375 nix_dump("W3: cq_err_int_ena \t\t%d\nW3: cq_err_int \t\t\t%d",
376 ctx->cq_err_int_ena, ctx->cq_err_int);
377 nix_dump("W3: qsize \t\t\t%d\nW3: caching \t\t\t%d",
378 ctx->qsize, ctx->caching);
379 nix_dump("W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d",
380 ctx->substream, ctx->ena);
381 nix_dump("W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d",
382 ctx->drop_ena, ctx->drop);
383 nix_dump("W3: bp \t\t\t\t%d\n", ctx->bp);
387 otx2_nix_queues_ctx_dump(struct rte_eth_dev *eth_dev)
389 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
390 int rc, q, rq = eth_dev->data->nb_rx_queues;
391 int sq = eth_dev->data->nb_tx_queues;
392 struct otx2_mbox *mbox = dev->mbox;
393 struct nix_aq_enq_rsp *rsp;
394 struct nix_aq_enq_req *aq;
396 for (q = 0; q < rq; q++) {
397 aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
399 aq->ctype = NIX_AQ_CTYPE_CQ;
400 aq->op = NIX_AQ_INSTOP_READ;
402 rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
404 otx2_err("Failed to get cq context");
407 nix_dump("============== port=%d cq=%d ===============",
408 eth_dev->data->port_id, q);
409 nix_lf_cq_dump(&rsp->cq);
412 for (q = 0; q < rq; q++) {
413 aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
415 aq->ctype = NIX_AQ_CTYPE_RQ;
416 aq->op = NIX_AQ_INSTOP_READ;
418 rc = otx2_mbox_process_msg(mbox, (void **)&rsp);
420 otx2_err("Failed to get rq context");
423 nix_dump("============== port=%d rq=%d ===============",
424 eth_dev->data->port_id, q);
425 nix_lf_rq_dump(&rsp->rq);
427 for (q = 0; q < sq; q++) {
428 aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
430 aq->ctype = NIX_AQ_CTYPE_SQ;
431 aq->op = NIX_AQ_INSTOP_READ;
433 rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
435 otx2_err("Failed to get sq context");
438 nix_dump("============== port=%d sq=%d ===============",
439 eth_dev->data->port_id, q);
440 nix_lf_sq_dump(&rsp->sq);
447 /* Dumps struct nix_cqe_hdr_s and struct nix_rx_parse_s */
449 otx2_nix_cqe_dump(const struct nix_cqe_hdr_s *cq)
451 const struct nix_rx_parse_s *rx =
452 (const struct nix_rx_parse_s *)((const uint64_t *)cq + 1);
454 nix_dump("tag \t\t0x%x\tq \t\t%d\t\tnode \t\t%d\tcqe_type \t%d",
455 cq->tag, cq->q, cq->node, cq->cqe_type);
457 nix_dump("W0: chan \t%d\t\tdesc_sizem1 \t%d",
458 rx->chan, rx->desc_sizem1);
459 nix_dump("W0: imm_copy \t%d\t\texpress \t%d",
460 rx->imm_copy, rx->express);
461 nix_dump("W0: wqwd \t%d\t\terrlev \t\t%d\t\terrcode \t%d",
462 rx->wqwd, rx->errlev, rx->errcode);
463 nix_dump("W0: latype \t%d\t\tlbtype \t\t%d\t\tlctype \t\t%d",
464 rx->latype, rx->lbtype, rx->lctype);
465 nix_dump("W0: ldtype \t%d\t\tletype \t\t%d\t\tlftype \t\t%d",
466 rx->ldtype, rx->letype, rx->lftype);
467 nix_dump("W0: lgtype \t%d \t\tlhtype \t\t%d",
468 rx->lgtype, rx->lhtype);
470 nix_dump("W1: pkt_lenm1 \t%d", rx->pkt_lenm1);
471 nix_dump("W1: l2m \t%d\t\tl2b \t\t%d\t\tl3m \t\t%d\tl3b \t\t%d",
472 rx->l2m, rx->l2b, rx->l3m, rx->l3b);
473 nix_dump("W1: vtag0_valid %d\t\tvtag0_gone \t%d",
474 rx->vtag0_valid, rx->vtag0_gone);
475 nix_dump("W1: vtag1_valid %d\t\tvtag1_gone \t%d",
476 rx->vtag1_valid, rx->vtag1_gone);
477 nix_dump("W1: pkind \t%d", rx->pkind);
478 nix_dump("W1: vtag0_tci \t%d\t\tvtag1_tci \t%d",
479 rx->vtag0_tci, rx->vtag1_tci);
481 nix_dump("W2: laflags \t%d\t\tlbflags\t\t%d\t\tlcflags \t%d",
482 rx->laflags, rx->lbflags, rx->lcflags);
483 nix_dump("W2: ldflags \t%d\t\tleflags\t\t%d\t\tlfflags \t%d",
484 rx->ldflags, rx->leflags, rx->lfflags);
485 nix_dump("W2: lgflags \t%d\t\tlhflags \t%d",
486 rx->lgflags, rx->lhflags);
488 nix_dump("W3: eoh_ptr \t%d\t\twqe_aura \t%d\t\tpb_aura \t%d",
489 rx->eoh_ptr, rx->wqe_aura, rx->pb_aura);
490 nix_dump("W3: match_id \t%d", rx->match_id);
492 nix_dump("W4: laptr \t%d\t\tlbptr \t\t%d\t\tlcptr \t\t%d",
493 rx->laptr, rx->lbptr, rx->lcptr);
494 nix_dump("W4: ldptr \t%d\t\tleptr \t\t%d\t\tlfptr \t\t%d",
495 rx->ldptr, rx->leptr, rx->lfptr);
496 nix_dump("W4: lgptr \t%d\t\tlhptr \t\t%d", rx->lgptr, rx->lhptr);
498 nix_dump("W5: vtag0_ptr \t%d\t\tvtag1_ptr \t%d\t\tflow_key_alg \t%d",
499 rx->vtag0_ptr, rx->vtag1_ptr, rx->flow_key_alg);