common/octeontx2: reduce wait time for mbox messages
[dpdk.git] / drivers / net / octeontx2 / otx2_ethdev_devargs.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2019 Marvell International Ltd.
3  */
4
5 #include <inttypes.h>
6 #include <math.h>
7
8 #include "otx2_ethdev.h"
9
10 static int
11 parse_flow_max_priority(const char *key, const char *value, void *extra_args)
12 {
13         RTE_SET_USED(key);
14         uint16_t val;
15
16         val = atoi(value);
17
18         /* Limit the max priority to 32 */
19         if (val < 1 || val > 32)
20                 return -EINVAL;
21
22         *(uint16_t *)extra_args = val;
23
24         return 0;
25 }
26
27 static int
28 parse_flow_prealloc_size(const char *key, const char *value, void *extra_args)
29 {
30         RTE_SET_USED(key);
31         uint16_t val;
32
33         val = atoi(value);
34
35         /* Limit the prealloc size to 32 */
36         if (val < 1 || val > 32)
37                 return -EINVAL;
38
39         *(uint16_t *)extra_args = val;
40
41         return 0;
42 }
43
44 static int
45 parse_reta_size(const char *key, const char *value, void *extra_args)
46 {
47         RTE_SET_USED(key);
48         uint32_t val;
49
50         val = atoi(value);
51
52         if (val <= ETH_RSS_RETA_SIZE_64)
53                 val = ETH_RSS_RETA_SIZE_64;
54         else if (val > ETH_RSS_RETA_SIZE_64 && val <= ETH_RSS_RETA_SIZE_128)
55                 val = ETH_RSS_RETA_SIZE_128;
56         else if (val > ETH_RSS_RETA_SIZE_128 && val <= ETH_RSS_RETA_SIZE_256)
57                 val = ETH_RSS_RETA_SIZE_256;
58         else
59                 val = NIX_RSS_RETA_SIZE;
60
61         *(uint16_t *)extra_args = val;
62
63         return 0;
64 }
65
66 static int
67 parse_flag(const char *key, const char *value, void *extra_args)
68 {
69         RTE_SET_USED(key);
70
71         *(uint16_t *)extra_args = atoi(value);
72
73         return 0;
74 }
75
76 static int
77 parse_sqb_count(const char *key, const char *value, void *extra_args)
78 {
79         RTE_SET_USED(key);
80         uint32_t val;
81
82         val = atoi(value);
83
84         if (val < NIX_MIN_SQB || val > NIX_MAX_SQB)
85                 return -EINVAL;
86
87         *(uint16_t *)extra_args = val;
88
89         return 0;
90 }
91
92 static int
93 parse_switch_header_type(const char *key, const char *value, void *extra_args)
94 {
95         RTE_SET_USED(key);
96
97         if (strcmp(value, "higig2") == 0)
98                 *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_HIGIG;
99
100         if (strcmp(value, "dsa") == 0)
101                 *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_EDSA;
102
103         return 0;
104 }
105
106 #define OTX2_RSS_RETA_SIZE "reta_size"
107 #define OTX2_SCL_ENABLE "scalar_enable"
108 #define OTX2_MAX_SQB_COUNT "max_sqb_count"
109 #define OTX2_FLOW_PREALLOC_SIZE "flow_prealloc_size"
110 #define OTX2_FLOW_MAX_PRIORITY "flow_max_priority"
111 #define OTX2_SWITCH_HEADER_TYPE "switch_header"
112
113 int
114 otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
115 {
116         uint16_t rss_size = NIX_RSS_RETA_SIZE;
117         uint16_t sqb_count = NIX_MAX_SQB;
118         uint16_t flow_prealloc_size = 8;
119         uint16_t switch_header_type = 0;
120         uint16_t flow_max_priority = 3;
121         uint16_t scalar_enable = 0;
122         struct rte_kvargs *kvlist;
123
124         if (devargs == NULL)
125                 goto null_devargs;
126
127         kvlist = rte_kvargs_parse(devargs->args, NULL);
128         if (kvlist == NULL)
129                 goto exit;
130
131         rte_kvargs_process(kvlist, OTX2_RSS_RETA_SIZE,
132                            &parse_reta_size, &rss_size);
133         rte_kvargs_process(kvlist, OTX2_SCL_ENABLE,
134                            &parse_flag, &scalar_enable);
135         rte_kvargs_process(kvlist, OTX2_MAX_SQB_COUNT,
136                            &parse_sqb_count, &sqb_count);
137         rte_kvargs_process(kvlist, OTX2_FLOW_PREALLOC_SIZE,
138                            &parse_flow_prealloc_size, &flow_prealloc_size);
139         rte_kvargs_process(kvlist, OTX2_FLOW_MAX_PRIORITY,
140                            &parse_flow_max_priority, &flow_max_priority);
141         rte_kvargs_process(kvlist, OTX2_SWITCH_HEADER_TYPE,
142                            &parse_switch_header_type, &switch_header_type);
143         rte_kvargs_free(kvlist);
144
145 null_devargs:
146         dev->scalar_ena = scalar_enable;
147         dev->max_sqb_count = sqb_count;
148         dev->rss_info.rss_size = rss_size;
149         dev->npc_flow.flow_prealloc_size = flow_prealloc_size;
150         dev->npc_flow.flow_max_priority = flow_max_priority;
151         dev->npc_flow.switch_header_type = switch_header_type;
152         return 0;
153
154 exit:
155         return -EINVAL;
156 }
157
158 RTE_PMD_REGISTER_PARAM_STRING(net_octeontx2,
159                               OTX2_RSS_RETA_SIZE "=<64|128|256>"
160                               OTX2_SCL_ENABLE "=1"
161                               OTX2_MAX_SQB_COUNT "=<8-512>"
162                               OTX2_FLOW_PREALLOC_SIZE "=<1-32>"
163                               OTX2_FLOW_MAX_PRIORITY "=<1-32>"
164                               OTX2_SWITCH_HEADER_TYPE "=<higig2|dsa>");