drivers/net/octeontx2/otx2_ethdev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include "otx2_ethdev.h"
   6
   7 void
   8 otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
   9 {
  10         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
  11         struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
  12
  13         devinfo->min_rx_bufsize = NIX_MIN_FRS;
  14         devinfo->max_rx_pktlen = NIX_MAX_FRS;
  15         devinfo->max_rx_queues = RTE_MAX_QUEUES_PER_PORT;
  16         devinfo->max_tx_queues = RTE_MAX_QUEUES_PER_PORT;
  17         devinfo->max_mac_addrs = dev->max_mac_entries;
  18         devinfo->max_vfs = pci_dev->max_vfs;
  19         devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD;
  20         devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD;
  21
  22         devinfo->rx_offload_capa = dev->rx_offload_capa;
  23         devinfo->tx_offload_capa = dev->tx_offload_capa;
  24         devinfo->rx_queue_offload_capa = 0;
  25         devinfo->tx_queue_offload_capa = 0;
  26
  27         devinfo->reta_size = dev->rss_info.rss_size;
  28         devinfo->hash_key_size = NIX_HASH_KEY_SIZE;
  29         devinfo->flow_type_rss_offloads = NIX_RSS_OFFLOAD;
  30
  31         devinfo->default_rxconf = (struct rte_eth_rxconf) {
  32                 .rx_drop_en = 0,
  33                 .offloads = 0,
  34         };
  35
  36         devinfo->default_txconf = (struct rte_eth_txconf) {
  37                 .offloads = 0,
  38         };
  39
  40         devinfo->rx_desc_lim = (struct rte_eth_desc_lim) {
  41                 .nb_max = UINT16_MAX,
  42                 .nb_min = NIX_RX_MIN_DESC,
  43                 .nb_align = NIX_RX_MIN_DESC_ALIGN,
  44                 .nb_seg_max = NIX_RX_NB_SEG_MAX,
  45                 .nb_mtu_seg_max = NIX_RX_NB_SEG_MAX,
  46         };
  47         devinfo->rx_desc_lim.nb_max =
  48                 RTE_ALIGN_MUL_FLOOR(devinfo->rx_desc_lim.nb_max,
  49                                     NIX_RX_MIN_DESC_ALIGN);
  50
  51         devinfo->tx_desc_lim = (struct rte_eth_desc_lim) {
  52                 .nb_max = UINT16_MAX,
  53                 .nb_min = 1,
  54                 .nb_align = 1,
  55                 .nb_seg_max = NIX_TX_NB_SEG_MAX,
  56                 .nb_mtu_seg_max = NIX_TX_NB_SEG_MAX,
  57         };
  58
  59         /* Auto negotiation disabled */
  60         devinfo->speed_capa = ETH_LINK_SPEED_FIXED;
  61         devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
  62                                 ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
  63                                 ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G;
  64 }