1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #include "otx2_ethdev.h"
9 flow_mcam_alloc_counter(struct otx2_mbox *mbox, uint16_t *ctr)
11 struct npc_mcam_alloc_counter_req *req;
12 struct npc_mcam_alloc_counter_rsp *rsp;
15 req = otx2_mbox_alloc_msg_npc_mcam_alloc_counter(mbox);
17 otx2_mbox_msg_send(mbox, 0);
18 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
20 *ctr = rsp->cntr_list[0];
25 otx2_flow_mcam_free_counter(struct otx2_mbox *mbox, uint16_t ctr_id)
27 struct npc_mcam_oper_counter_req *req;
30 req = otx2_mbox_alloc_msg_npc_mcam_free_counter(mbox);
32 otx2_mbox_msg_send(mbox, 0);
33 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
39 otx2_flow_mcam_read_counter(struct otx2_mbox *mbox, uint32_t ctr_id,
42 struct npc_mcam_oper_counter_req *req;
43 struct npc_mcam_oper_counter_rsp *rsp;
46 req = otx2_mbox_alloc_msg_npc_mcam_counter_stats(mbox);
48 otx2_mbox_msg_send(mbox, 0);
49 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
56 otx2_flow_mcam_clear_counter(struct otx2_mbox *mbox, uint32_t ctr_id)
58 struct npc_mcam_oper_counter_req *req;
61 req = otx2_mbox_alloc_msg_npc_mcam_clear_counter(mbox);
63 otx2_mbox_msg_send(mbox, 0);
64 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
70 otx2_flow_mcam_free_entry(struct otx2_mbox *mbox, uint32_t entry)
72 struct npc_mcam_free_entry_req *req;
75 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
77 otx2_mbox_msg_send(mbox, 0);
78 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
84 otx2_flow_mcam_free_all_entries(struct otx2_mbox *mbox)
86 struct npc_mcam_free_entry_req *req;
89 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
91 otx2_mbox_msg_send(mbox, 0);
92 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
98 flow_prep_mcam_ldata(uint8_t *ptr, const uint8_t *data, int len)
102 for (idx = 0; idx < len; idx++)
103 ptr[idx] = data[len - 1 - idx];
107 flow_check_copysz(size_t size, size_t len)
115 flow_mem_is_zero(const void *mem, int len)
120 for (i = 0; i < len; i++) {
128 flow_set_hw_mask(struct otx2_flow_item_info *info,
129 struct npc_xtract_info *xinfo,
135 if (xinfo->enable == 0)
138 if (xinfo->hdr_off < info->hw_hdr_len)
141 max_off = xinfo->hdr_off + xinfo->len - info->hw_hdr_len;
143 if (max_off > info->len)
146 offset = xinfo->hdr_off - info->hw_hdr_len;
147 for (j = offset; j < max_off; j++)
152 otx2_flow_get_hw_supp_mask(struct otx2_parse_state *pst,
153 struct otx2_flow_item_info *info, int lid, int lt)
155 struct npc_xtract_info *xinfo, *lfinfo;
156 char *hw_mask = info->hw_mask;
161 intf = pst->flow->nix_intf;
162 xinfo = pst->npc->prx_dxcfg[intf][lid][lt].xtract;
163 memset(hw_mask, 0, info->len);
165 for (i = 0; i < NPC_MAX_LD; i++) {
166 flow_set_hw_mask(info, &xinfo[i], hw_mask);
169 for (i = 0; i < NPC_MAX_LD; i++) {
171 if (xinfo[i].flags_enable == 0)
174 lf_cfg = pst->npc->prx_lfcfg[i].i;
176 for (j = 0; j < NPC_MAX_LFL; j++) {
177 lfinfo = pst->npc->prx_fxcfg[intf]
179 flow_set_hw_mask(info, &lfinfo[0], hw_mask);
186 flow_update_extraction_data(struct otx2_parse_state *pst,
187 struct otx2_flow_item_info *info,
188 struct npc_xtract_info *xinfo)
190 uint8_t int_info_mask[NPC_MAX_EXTRACT_DATA_LEN];
191 uint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];
192 struct npc_xtract_info *x;
198 hdr_off = x->hdr_off;
200 if (hdr_off < info->hw_hdr_len)
206 otx2_npc_dbg("x->hdr_off = %d, len = %d, info->len = %d,"
207 "x->key_off = %d", x->hdr_off, len, info->len,
210 hdr_off -= info->hw_hdr_len;
212 if (hdr_off + len > info->len)
213 len = info->len - hdr_off;
215 /* Check for over-write of previous layer */
216 if (!flow_mem_is_zero(pst->mcam_mask + x->key_off,
218 /* Cannot support this data match */
219 rte_flow_error_set(pst->error, ENOTSUP,
220 RTE_FLOW_ERROR_TYPE_ITEM,
222 "Extraction unsupported");
226 len = flow_check_copysz((OTX2_MAX_MCAM_WIDTH_DWORDS * 8)
230 rte_flow_error_set(pst->error, ENOTSUP,
231 RTE_FLOW_ERROR_TYPE_ITEM,
237 /* Need to reverse complete structure so that dest addr is at
238 * MSB so as to program the MCAM using mcam_data & mcam_mask
241 flow_prep_mcam_ldata(int_info,
242 (const uint8_t *)info->spec + hdr_off,
244 flow_prep_mcam_ldata(int_info_mask,
245 (const uint8_t *)info->mask + hdr_off,
248 otx2_npc_dbg("Spec: ");
249 for (k = 0; k < info->len; k++)
250 otx2_npc_dbg("0x%.2x ",
251 ((const uint8_t *)info->spec)[k]);
253 otx2_npc_dbg("Int_info: ");
254 for (k = 0; k < info->len; k++)
255 otx2_npc_dbg("0x%.2x ", int_info[k]);
257 memcpy(pst->mcam_mask + x->key_off, int_info_mask, len);
258 memcpy(pst->mcam_data + x->key_off, int_info, len);
260 otx2_npc_dbg("Parse state mcam data & mask");
261 for (idx = 0; idx < len ; idx++)
262 otx2_npc_dbg("data[%d]: 0x%x, mask[%d]: 0x%x", idx,
263 *(pst->mcam_data + idx + x->key_off), idx,
264 *(pst->mcam_mask + idx + x->key_off));
269 otx2_flow_update_parse_state(struct otx2_parse_state *pst,
270 struct otx2_flow_item_info *info, int lid, int lt,
273 struct npc_lid_lt_xtract_info *xinfo;
274 struct otx2_flow_dump_data *dump;
275 struct npc_xtract_info *lfinfo;
279 otx2_npc_dbg("Parse state function info mask total %s",
280 (const uint8_t *)info->mask);
282 pst->layer_mask |= lid;
284 pst->flags[lid] = flags;
286 intf = pst->flow->nix_intf;
287 xinfo = &pst->npc->prx_dxcfg[intf][lid][lt];
288 otx2_npc_dbg("Is_terminating = %d", xinfo->is_terminating);
289 if (xinfo->is_terminating)
292 if (info->spec == NULL) {
293 otx2_npc_dbg("Info spec NULL");
297 for (i = 0; i < NPC_MAX_LD; i++) {
298 rc = flow_update_extraction_data(pst, info, &xinfo->xtract[i]);
303 for (i = 0; i < NPC_MAX_LD; i++) {
304 if (xinfo->xtract[i].flags_enable == 0)
307 lf_cfg = pst->npc->prx_lfcfg[i].i;
309 for (j = 0; j < NPC_MAX_LFL; j++) {
310 lfinfo = pst->npc->prx_fxcfg[intf]
312 rc = flow_update_extraction_data(pst, info,
317 if (lfinfo[0].enable)
324 dump = &pst->flow->dump_data[pst->flow->num_patterns++];
327 /* Next pattern to parse by subsequent layers */
333 flow_range_is_valid(const char *spec, const char *last, const char *mask,
336 /* Mask must be zero or equal to spec as we do not support
337 * non-contiguous ranges.
341 (spec[len] & mask[len]) != (last[len] & mask[len]))
342 return 0; /* False */
349 flow_mask_is_supported(const char *mask, const char *hw_mask, int len)
352 * If no hw_mask, assume nothing is supported.
356 return flow_mem_is_zero(mask, len);
359 if ((mask[len] | hw_mask[len]) != hw_mask[len])
360 return 0; /* False */
366 otx2_flow_parse_item_basic(const struct rte_flow_item *item,
367 struct otx2_flow_item_info *info,
368 struct rte_flow_error *error)
370 /* Item must not be NULL */
372 rte_flow_error_set(error, EINVAL,
373 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
377 /* If spec is NULL, both mask and last must be NULL, this
378 * makes it to match ANY value (eq to mask = 0).
379 * Setting either mask or last without spec is an error
381 if (item->spec == NULL) {
382 if (item->last == NULL && item->mask == NULL) {
386 rte_flow_error_set(error, EINVAL,
387 RTE_FLOW_ERROR_TYPE_ITEM, item,
388 "mask or last set without spec");
392 /* We have valid spec */
393 info->spec = item->spec;
395 /* If mask is not set, use default mask, err if default mask is
398 if (item->mask == NULL) {
399 otx2_npc_dbg("Item mask null, using default mask");
400 if (info->def_mask == NULL) {
401 rte_flow_error_set(error, EINVAL,
402 RTE_FLOW_ERROR_TYPE_ITEM, item,
403 "No mask or default mask given");
406 info->mask = info->def_mask;
408 info->mask = item->mask;
411 /* mask specified must be subset of hw supported mask
412 * mask | hw_mask == hw_mask
414 if (!flow_mask_is_supported(info->mask, info->hw_mask, info->len)) {
415 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
416 item, "Unsupported field in the mask");
420 /* Now we have spec and mask. OTX2 does not support non-contiguous
421 * range. We should have either:
422 * - spec & mask == last & mask or,
426 if (item->last != NULL && !flow_mem_is_zero(item->last, info->len)) {
427 if (!flow_range_is_valid(item->spec, item->last, info->mask,
429 rte_flow_error_set(error, EINVAL,
430 RTE_FLOW_ERROR_TYPE_ITEM, item,
431 "Unsupported range for match");
440 otx2_flow_keyx_compress(uint64_t *data, uint32_t nibble_mask)
442 uint64_t cdata[2] = {0ULL, 0ULL}, nibble;
445 for (i = 0; i < NPC_MAX_KEY_NIBBLES; i++) {
446 if (nibble_mask & (1 << i)) {
447 nibble = (data[i / 16] >> ((i & 0xf) * 4)) & 0xf;
448 cdata[j / 16] |= (nibble << ((j & 0xf) * 4));
458 flow_first_set_bit(uint64_t slab)
462 if ((slab & 0xffffffff) == 0) {
466 if ((slab & 0xffff) == 0) {
470 if ((slab & 0xff) == 0) {
474 if ((slab & 0xf) == 0) {
478 if ((slab & 0x3) == 0) {
482 if ((slab & 0x1) == 0)
489 flow_shift_lv_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
490 struct otx2_npc_flow_info *flow_info,
491 uint32_t old_ent, uint32_t new_ent)
493 struct npc_mcam_shift_entry_req *req;
494 struct npc_mcam_shift_entry_rsp *rsp;
495 struct otx2_flow_list *list;
496 struct rte_flow *flow_iter;
499 otx2_npc_dbg("Old ent:%u new ent:%u priority:%u", old_ent, new_ent,
502 list = &flow_info->flow_list[flow->priority];
504 /* Old entry is disabled & it's contents are moved to new_entry,
505 * new entry is enabled finally.
507 req = otx2_mbox_alloc_msg_npc_mcam_shift_entry(mbox);
508 req->curr_entry[0] = old_ent;
509 req->new_entry[0] = new_ent;
510 req->shift_count = 1;
512 otx2_mbox_msg_send(mbox, 0);
513 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
517 /* Remove old node from list */
518 TAILQ_FOREACH(flow_iter, list, next) {
519 if (flow_iter->mcam_id == old_ent)
520 TAILQ_REMOVE(list, flow_iter, next);
523 /* Insert node with new mcam id at right place */
524 TAILQ_FOREACH(flow_iter, list, next) {
525 if (flow_iter->mcam_id > new_ent)
526 TAILQ_INSERT_BEFORE(flow_iter, flow, next);
531 /* Exchange all required entries with a given priority level */
533 flow_shift_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
534 struct otx2_npc_flow_info *flow_info,
535 struct npc_mcam_alloc_entry_rsp *rsp, int dir, int prio_lvl)
537 struct rte_bitmap *fr_bmp, *fr_bmp_rev, *lv_bmp, *lv_bmp_rev, *bmp;
538 uint32_t e_fr = 0, e_lv = 0, e, e_id = 0, mcam_entries;
539 uint64_t fr_bit_pos = 0, lv_bit_pos = 0, bit_pos = 0;
540 /* Bit position within the slab */
541 uint32_t sl_fr_bit_off = 0, sl_lv_bit_off = 0;
542 /* Overall bit position of the start of slab */
543 /* free & live entry index */
544 int rc_fr = 0, rc_lv = 0, rc = 0, idx = 0;
545 struct otx2_mcam_ents_info *ent_info;
546 /* free & live bitmap slab */
547 uint64_t sl_fr = 0, sl_lv = 0, *sl;
549 fr_bmp = flow_info->free_entries[prio_lvl];
550 fr_bmp_rev = flow_info->free_entries_rev[prio_lvl];
551 lv_bmp = flow_info->live_entries[prio_lvl];
552 lv_bmp_rev = flow_info->live_entries_rev[prio_lvl];
553 ent_info = &flow_info->flow_entry_info[prio_lvl];
554 mcam_entries = flow_info->mcam_entries;
557 /* New entries allocated are always contiguous, but older entries
558 * already in free/live bitmap can be non-contiguous: so return
559 * shifted entries should be in non-contiguous format.
561 while (idx <= rsp->count) {
562 if (!sl_fr && !sl_lv) {
563 /* Lower index elements to be exchanged */
565 rc_fr = rte_bitmap_scan(fr_bmp, &e_fr, &sl_fr);
566 rc_lv = rte_bitmap_scan(lv_bmp, &e_lv, &sl_lv);
567 otx2_npc_dbg("Fwd slab rc fr %u rc lv %u "
568 "e_fr %u e_lv %u", rc_fr, rc_lv,
571 rc_fr = rte_bitmap_scan(fr_bmp_rev,
574 rc_lv = rte_bitmap_scan(lv_bmp_rev,
578 otx2_npc_dbg("Rev slab rc fr %u rc lv %u "
579 "e_fr %u e_lv %u", rc_fr, rc_lv,
585 fr_bit_pos = flow_first_set_bit(sl_fr);
586 e_fr = sl_fr_bit_off + fr_bit_pos;
587 otx2_npc_dbg("Fr_bit_pos 0x%" PRIx64, fr_bit_pos);
593 lv_bit_pos = flow_first_set_bit(sl_lv);
594 e_lv = sl_lv_bit_off + lv_bit_pos;
595 otx2_npc_dbg("Lv_bit_pos 0x%" PRIx64, lv_bit_pos);
600 /* First entry is from free_bmap */
605 bit_pos = fr_bit_pos;
607 e_id = mcam_entries - e - 1;
610 otx2_npc_dbg("Fr e %u e_id %u", e, e_id);
615 bit_pos = lv_bit_pos;
617 e_id = mcam_entries - e - 1;
621 otx2_npc_dbg("Lv e %u e_id %u", e, e_id);
622 if (idx < rsp->count)
624 flow_shift_lv_ent(mbox, flow,
629 rte_bitmap_clear(bmp, e);
630 rte_bitmap_set(bmp, rsp->entry + idx);
631 /* Update entry list, use non-contiguous
634 rsp->entry_list[idx] = e_id;
635 *sl &= ~(1 << bit_pos);
637 /* Update min & max entry identifiers in current
641 ent_info->max_id = rsp->entry + idx;
642 ent_info->min_id = e_id;
644 ent_info->max_id = e_id;
645 ent_info->min_id = rsp->entry;
653 /* Validate if newly allocated entries lie in the correct priority zone
654 * since NPC_MCAM_LOWER_PRIO & NPC_MCAM_HIGHER_PRIO don't ensure zone accuracy.
655 * If not properly aligned, shift entries to do so
658 flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
659 struct otx2_npc_flow_info *flow_info,
660 struct npc_mcam_alloc_entry_rsp *rsp,
663 int prio_idx = 0, rc = 0, needs_shift = 0, idx, prio = flow->priority;
664 struct otx2_mcam_ents_info *info = flow_info->flow_entry_info;
665 int dir = (req_prio == NPC_MCAM_HIGHER_PRIO) ? 1 : -1;
666 uint32_t tot_ent = 0;
668 otx2_npc_dbg("Dir %d, priority = %d", dir, prio);
671 prio_idx = flow_info->flow_max_priority - 1;
673 /* Only live entries needs to be shifted, free entries can just be
674 * moved by bits manipulation.
677 /* For dir = -1(NPC_MCAM_LOWER_PRIO), when shifting,
678 * NPC_MAX_PREALLOC_ENT are exchanged with adjoining higher priority
679 * level entries(lower indexes).
681 * For dir = +1(NPC_MCAM_HIGHER_PRIO), during shift,
682 * NPC_MAX_PREALLOC_ENT are exchanged with adjoining lower priority
683 * level entries(higher indexes) with highest indexes.
686 tot_ent = info[prio_idx].free_ent + info[prio_idx].live_ent;
688 if (dir < 0 && prio_idx != prio &&
689 rsp->entry > info[prio_idx].max_id && tot_ent) {
690 otx2_npc_dbg("Rsp entry %u prio idx %u "
691 "max id %u", rsp->entry, prio_idx,
692 info[prio_idx].max_id);
695 } else if ((dir > 0) && (prio_idx != prio) &&
696 (rsp->entry < info[prio_idx].min_id) && tot_ent) {
697 otx2_npc_dbg("Rsp entry %u prio idx %u "
698 "min id %u", rsp->entry, prio_idx,
699 info[prio_idx].min_id);
703 otx2_npc_dbg("Needs_shift = %d", needs_shift);
706 rc = flow_shift_ent(mbox, flow, flow_info, rsp, dir,
709 for (idx = 0; idx < rsp->count; idx++)
710 rsp->entry_list[idx] = rsp->entry + idx;
712 } while ((prio_idx != prio) && (prio_idx += dir));
718 flow_find_ref_entry(struct otx2_npc_flow_info *flow_info, int *prio,
721 struct otx2_mcam_ents_info *info = flow_info->flow_entry_info;
724 while (step < flow_info->flow_max_priority) {
725 if (((prio_lvl + step) < flow_info->flow_max_priority) &&
726 info[prio_lvl + step].live_ent) {
727 *prio = NPC_MCAM_HIGHER_PRIO;
728 return info[prio_lvl + step].min_id;
731 if (((prio_lvl - step) >= 0) &&
732 info[prio_lvl - step].live_ent) {
733 otx2_npc_dbg("Prio_lvl %u live %u", prio_lvl - step,
734 info[prio_lvl - step].live_ent);
735 *prio = NPC_MCAM_LOWER_PRIO;
736 return info[prio_lvl - step].max_id;
740 *prio = NPC_MCAM_ANY_PRIO;
745 flow_fill_entry_cache(struct otx2_mbox *mbox, struct rte_flow *flow,
746 struct otx2_npc_flow_info *flow_info, uint32_t *free_ent)
748 struct rte_bitmap *free_bmp, *free_bmp_rev, *live_bmp, *live_bmp_rev;
749 struct npc_mcam_alloc_entry_rsp rsp_local;
750 struct npc_mcam_alloc_entry_rsp *rsp_cmd;
751 struct npc_mcam_alloc_entry_req *req;
752 struct npc_mcam_alloc_entry_rsp *rsp;
753 struct otx2_mcam_ents_info *info;
754 uint16_t ref_ent, idx;
757 info = &flow_info->flow_entry_info[flow->priority];
758 free_bmp = flow_info->free_entries[flow->priority];
759 free_bmp_rev = flow_info->free_entries_rev[flow->priority];
760 live_bmp = flow_info->live_entries[flow->priority];
761 live_bmp_rev = flow_info->live_entries_rev[flow->priority];
763 ref_ent = flow_find_ref_entry(flow_info, &prio, flow->priority);
765 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(mbox);
767 req->count = flow_info->flow_prealloc_size;
768 req->priority = prio;
769 req->ref_entry = ref_ent;
771 otx2_npc_dbg("Fill cache ref entry %u prio %u", ref_ent, prio);
773 otx2_mbox_msg_send(mbox, 0);
774 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp_cmd);
779 memcpy(rsp, rsp_cmd, sizeof(*rsp));
781 otx2_npc_dbg("Alloc entry %u count %u , prio = %d", rsp->entry,
784 /* Non-first ent cache fill */
785 if (prio != NPC_MCAM_ANY_PRIO) {
786 flow_validate_and_shift_prio_ent(mbox, flow, flow_info, rsp,
789 /* Copy into response entry list */
790 for (idx = 0; idx < rsp->count; idx++)
791 rsp->entry_list[idx] = rsp->entry + idx;
794 otx2_npc_dbg("Fill entry cache rsp count %u", rsp->count);
795 /* Update free entries, reverse free entries list,
796 * min & max entry ids.
798 for (idx = 0; idx < rsp->count; idx++) {
799 if (unlikely(rsp->entry_list[idx] < info->min_id))
800 info->min_id = rsp->entry_list[idx];
802 if (unlikely(rsp->entry_list[idx] > info->max_id))
803 info->max_id = rsp->entry_list[idx];
805 /* Skip entry to be returned, not to be part of free
808 if (prio == NPC_MCAM_HIGHER_PRIO) {
809 if (unlikely(idx == (rsp->count - 1))) {
810 *free_ent = rsp->entry_list[idx];
814 if (unlikely(!idx)) {
815 *free_ent = rsp->entry_list[idx];
820 rte_bitmap_set(free_bmp, rsp->entry_list[idx]);
821 rte_bitmap_set(free_bmp_rev, flow_info->mcam_entries -
822 rsp->entry_list[idx] - 1);
824 otx2_npc_dbg("Final rsp entry %u rsp entry rev %u",
825 rsp->entry_list[idx],
826 flow_info->mcam_entries - rsp->entry_list[idx] - 1);
829 otx2_npc_dbg("Cache free entry %u, rev = %u", *free_ent,
830 flow_info->mcam_entries - *free_ent - 1);
832 rte_bitmap_set(live_bmp, *free_ent);
833 rte_bitmap_set(live_bmp_rev, flow_info->mcam_entries - *free_ent - 1);
839 flow_check_preallocated_entry_cache(struct otx2_mbox *mbox,
840 struct rte_flow *flow,
841 struct otx2_npc_flow_info *flow_info)
843 struct rte_bitmap *free, *free_rev, *live, *live_rev;
844 uint32_t pos = 0, free_ent = 0, mcam_entries;
845 struct otx2_mcam_ents_info *info;
849 otx2_npc_dbg("Flow priority %u", flow->priority);
851 info = &flow_info->flow_entry_info[flow->priority];
853 free_rev = flow_info->free_entries_rev[flow->priority];
854 free = flow_info->free_entries[flow->priority];
855 live_rev = flow_info->live_entries_rev[flow->priority];
856 live = flow_info->live_entries[flow->priority];
857 mcam_entries = flow_info->mcam_entries;
859 if (info->free_ent) {
860 rc = rte_bitmap_scan(free, &pos, &slab);
862 /* Get free_ent from free entry bitmap */
863 free_ent = pos + __builtin_ctzll(slab);
864 otx2_npc_dbg("Allocated from cache entry %u", free_ent);
865 /* Remove from free bitmaps and add to live ones */
866 rte_bitmap_clear(free, free_ent);
867 rte_bitmap_set(live, free_ent);
868 rte_bitmap_clear(free_rev,
869 mcam_entries - free_ent - 1);
870 rte_bitmap_set(live_rev,
871 mcam_entries - free_ent - 1);
878 otx2_npc_dbg("No free entry:its a mess");
882 rc = flow_fill_entry_cache(mbox, flow, flow_info, &free_ent);
890 otx2_flow_mcam_alloc_and_write(struct rte_flow *flow, struct otx2_mbox *mbox,
891 struct otx2_parse_state *pst,
892 struct otx2_npc_flow_info *flow_info)
894 int use_ctr = (flow->ctr_id == NPC_COUNTER_NONE ? 0 : 1);
895 struct npc_mcam_read_base_rule_rsp *base_rule_rsp;
896 struct npc_mcam_write_entry_req *req;
897 struct mcam_entry *base_entry;
898 struct mbox_msghdr *rsp;
904 rc = flow_mcam_alloc_counter(mbox, &ctr);
909 entry = flow_check_preallocated_entry_cache(mbox, flow, flow_info);
911 otx2_err("Prealloc failed");
912 otx2_flow_mcam_free_counter(mbox, ctr);
913 return NPC_MCAM_ALLOC_FAILED;
917 (void)otx2_mbox_alloc_msg_npc_read_base_steer_rule(mbox);
918 rc = otx2_mbox_process_msg(mbox, (void *)&base_rule_rsp);
920 otx2_err("Failed to fetch VF's base MCAM entry");
923 base_entry = &base_rule_rsp->entry_data;
924 for (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {
925 flow->mcam_data[idx] |= base_entry->kw[idx];
926 flow->mcam_mask[idx] |= base_entry->kw_mask[idx];
930 req = otx2_mbox_alloc_msg_npc_mcam_write_entry(mbox);
931 req->set_cntr = use_ctr;
934 otx2_npc_dbg("Alloc & write entry %u", entry);
937 (flow->nix_intf == OTX2_INTF_RX) ? NPC_MCAM_RX : NPC_MCAM_TX;
938 req->enable_entry = 1;
939 req->entry_data.action = flow->npc_action;
940 req->entry_data.vtag_action = flow->vtag_action;
942 for (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {
943 req->entry_data.kw[idx] = flow->mcam_data[idx];
944 req->entry_data.kw_mask[idx] = flow->mcam_mask[idx];
947 if (flow->nix_intf == OTX2_INTF_RX) {
948 req->entry_data.kw[0] |= flow_info->channel;
949 req->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1);
951 uint16_t pf_func = (flow->npc_action >> 48) & 0xffff;
953 pf_func = htons(pf_func);
954 req->entry_data.kw[0] |= ((uint64_t)pf_func << 32);
955 req->entry_data.kw_mask[0] |= ((uint64_t)0xffff << 32);
958 otx2_mbox_msg_send(mbox, 0);
959 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
963 flow->mcam_id = entry;