1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #include <rte_ethdev_driver.h>
7 #include "otx2_ethdev.h"
9 #define PTP_FREQ_ADJUST (1 << 9)
12 nix_start_timecounters(struct rte_eth_dev *eth_dev)
14 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
16 memset(&dev->systime_tc, 0, sizeof(struct rte_timecounter));
17 memset(&dev->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
18 memset(&dev->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
20 dev->systime_tc.cc_mask = OTX2_CYCLECOUNTER_MASK;
21 dev->rx_tstamp_tc.cc_mask = OTX2_CYCLECOUNTER_MASK;
22 dev->tx_tstamp_tc.cc_mask = OTX2_CYCLECOUNTER_MASK;
26 nix_ptp_config(struct rte_eth_dev *eth_dev, int en)
28 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
29 struct otx2_mbox *mbox = dev->mbox;
32 if (otx2_dev_is_vf(dev))
36 /* Enable time stamping of sent PTP packets. */
37 otx2_mbox_alloc_msg_nix_lf_ptp_tx_enable(mbox);
38 rc = otx2_mbox_process(mbox);
40 otx2_err("MBOX ptp tx conf enable failed: err %d", rc);
43 /* Enable time stamping of received PTP packets. */
44 otx2_mbox_alloc_msg_cgx_ptp_rx_enable(mbox);
46 /* Disable time stamping of sent PTP packets. */
47 otx2_mbox_alloc_msg_nix_lf_ptp_tx_disable(mbox);
48 rc = otx2_mbox_process(mbox);
50 otx2_err("MBOX ptp tx conf disable failed: err %d", rc);
53 /* Disable time stamping of received PTP packets. */
54 otx2_mbox_alloc_msg_cgx_ptp_rx_disable(mbox);
57 return otx2_mbox_process(mbox);
61 otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en)
63 struct otx2_eth_dev *otx2_dev = (struct otx2_eth_dev *)dev;
64 struct rte_eth_dev *eth_dev = otx2_dev->eth_dev;
67 otx2_dev->ptp_en = ptp_en;
68 for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
69 struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[i];
70 rxq->mbuf_initializer =
71 otx2_nix_rxq_mbuf_setup(otx2_dev,
72 eth_dev->data->port_id);
78 otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
80 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
83 if (otx2_ethdev_is_ptp_en(dev)) {
84 otx2_info("PTP mode is already enabled ");
88 /* If we are VF, no further action can be taken */
89 if (otx2_dev_is_vf(dev))
92 if (!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)) {
93 otx2_err("Ptype offload is disabled, it should be enabled");
97 /* Allocating a iova address for tx tstamp */
98 const struct rte_memzone *ts;
99 ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
100 0, OTX2_ALIGN, OTX2_ALIGN,
103 otx2_err("Failed to allocate mem for tx tstamp addr");
105 dev->tstamp.tx_tstamp_iova = ts->iova;
106 dev->tstamp.tx_tstamp = ts->addr;
108 /* System time should be already on by default */
109 nix_start_timecounters(eth_dev);
111 dev->rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
112 dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;
113 dev->tx_offload_flags |= NIX_TX_OFFLOAD_TSTAMP_F;
115 rc = nix_ptp_config(eth_dev, 1);
117 for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
118 struct otx2_eth_txq *txq = eth_dev->data->tx_queues[i];
119 otx2_nix_form_default_desc(txq);
126 otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)
128 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
131 if (!otx2_ethdev_is_ptp_en(dev)) {
132 otx2_nix_dbg("PTP mode is disabled");
136 /* If we are VF, nothing else can be done */
137 if (otx2_dev_is_vf(dev))
140 dev->rx_offloads &= ~DEV_RX_OFFLOAD_TIMESTAMP;
141 dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_TSTAMP_F;
142 dev->tx_offload_flags &= ~NIX_TX_OFFLOAD_TSTAMP_F;
144 rc = nix_ptp_config(eth_dev, 0);
146 for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
147 struct otx2_eth_txq *txq = eth_dev->data->tx_queues[i];
148 otx2_nix_form_default_desc(txq);
155 otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,
156 struct timespec *timestamp,
157 uint32_t __rte_unused flags)
159 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
160 struct otx2_timesync_info *tstamp = &dev->tstamp;
163 if (!tstamp->rx_ready)
166 ns = rte_timecounter_update(&dev->rx_tstamp_tc, tstamp->rx_tstamp);
167 *timestamp = rte_ns_to_timespec(ns);
168 tstamp->rx_ready = 0;
170 otx2_nix_dbg("rx timestamp: %llu sec: %lu nsec %lu",
171 (unsigned long long)tstamp->rx_tstamp, timestamp->tv_sec,
178 otx2_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,
179 struct timespec *timestamp)
181 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
182 struct otx2_timesync_info *tstamp = &dev->tstamp;
185 if (*tstamp->tx_tstamp == 0)
188 ns = rte_timecounter_update(&dev->tx_tstamp_tc, *tstamp->tx_tstamp);
189 *timestamp = rte_ns_to_timespec(ns);
191 otx2_nix_dbg("tx timestamp: %llu sec: %lu nsec %lu",
192 *(unsigned long long *)tstamp->tx_tstamp,
193 timestamp->tv_sec, timestamp->tv_nsec);
195 *tstamp->tx_tstamp = 0;
202 otx2_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta)
204 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
205 struct otx2_mbox *mbox = dev->mbox;
210 /* Adjust the frequent to make tics increments in 10^9 tics per sec */
211 if (delta < PTP_FREQ_ADJUST && delta > -PTP_FREQ_ADJUST) {
212 req = otx2_mbox_alloc_msg_ptp_op(mbox);
213 req->op = PTP_OP_ADJFINE;
214 req->scaled_ppm = delta;
216 rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
220 dev->systime_tc.nsec += delta;
221 dev->rx_tstamp_tc.nsec += delta;
222 dev->tx_tstamp_tc.nsec += delta;
228 otx2_nix_timesync_write_time(struct rte_eth_dev *eth_dev,
229 const struct timespec *ts)
231 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
234 ns = rte_timespec_to_ns(ts);
235 /* Set the time counters to a new value. */
236 dev->systime_tc.nsec = ns;
237 dev->rx_tstamp_tc.nsec = ns;
238 dev->tx_tstamp_tc.nsec = ns;
244 otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev, struct timespec *ts)
246 struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
247 struct otx2_mbox *mbox = dev->mbox;
253 req = otx2_mbox_alloc_msg_ptp_op(mbox);
254 req->op = PTP_OP_GET_CLOCK;
255 rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
259 ns = rte_timecounter_update(&dev->systime_tc, rsp->clk);
260 *ts = rte_ns_to_timespec(ns);
262 otx2_nix_dbg("PTP time read: %ld.%09ld", ts->tv_sec, ts->tv_nsec);