1 /* SPDX-License-Identifier: BSD-3-Clause
5 #include <rte_kvargs.h>
6 #include <rte_ethdev_vdev.h>
7 #include <rte_bus_vdev.h>
13 #define PFE_MAX_MACS 1 /*we can support upto 4 MACs per IF*/
14 #define PFE_VDEV_GEM_ID_ARG "intf"
16 struct pfe_vdev_init_params {
19 static struct pfe *g_pfe;
21 /* TODO: make pfe_svr a runtime option.
22 * Driver should be able to get the SVR
23 * information from HW.
25 unsigned int pfe_svr = SVR_LS1012A_REV1;
26 static void *cbus_emac_base[3];
27 static void *cbus_gpi_base[3];
34 pfe_gemac_init(struct pfe_eth_priv_s *priv)
38 cfg.speed = SPEED_1000M;
39 cfg.duplex = DUPLEX_FULL;
41 gemac_set_config(priv->EMAC_baseaddr, &cfg);
42 gemac_allow_broadcast(priv->EMAC_baseaddr);
43 gemac_enable_1536_rx(priv->EMAC_baseaddr);
44 gemac_enable_stacked_vlan(priv->EMAC_baseaddr);
45 gemac_enable_pause_rx(priv->EMAC_baseaddr);
46 gemac_set_bus_width(priv->EMAC_baseaddr, 64);
47 gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
53 pfe_soc_version_get(void)
55 FILE *svr_file = NULL;
56 unsigned int svr_ver = 0;
58 PMD_INIT_FUNC_TRACE();
60 svr_file = fopen(PFE_SOC_ID_FILE, "r");
62 PFE_PMD_ERR("Unable to open SoC device");
63 return; /* Not supported on this infra */
66 if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
69 PFE_PMD_ERR("Unable to read SoC device");
74 static int pfe_eth_start(struct pfe_eth_priv_s *priv)
76 gpi_enable(priv->GPI_baseaddr);
77 gemac_enable(priv->EMAC_baseaddr);
83 pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
84 __rte_unused from_tx, __rte_unused int n_desc)
86 struct rte_mbuf *mbuf;
89 /* Clean HIF and client queue */
90 while ((mbuf = hif_lib_tx_get_next_complete(&priv->client,
96 rte_pktmbuf_free(mbuf);
103 pfe_eth_flush_tx(struct pfe_eth_priv_s *priv)
107 for (ii = 0; ii < emac_txq_cnt; ii++)
108 pfe_eth_flush_txQ(priv, ii, 0, 0);
112 pfe_eth_event_handler(void *data, int event, __rte_unused int qno)
114 struct pfe_eth_priv_s *priv = data;
117 case EVENT_TXDONE_IND:
118 pfe_eth_flush_tx(priv);
119 hif_lib_event_handler_start(&priv->client, EVENT_TXDONE_IND, 0);
121 case EVENT_HIGH_RX_WM:
130 pfe_eth_open(struct rte_eth_dev *dev)
132 struct pfe_eth_priv_s *priv = dev->data->dev_private;
133 struct hif_client_s *client;
134 struct hif_shm *hif_shm;
137 /* Register client driver with HIF */
138 client = &priv->client;
141 hif_shm = client->pfe->hif.shm;
142 /* TODO please remove the below code of if block, once we add
143 * the proper cleanup in eth_close
145 if (!test_bit(PFE_CL_GEM0 + priv->id,
146 &hif_shm->g_client_status[0])) {
147 /* Register client driver with HIF */
148 memset(client, 0, sizeof(*client));
149 client->id = PFE_CL_GEM0 + priv->id;
150 client->tx_qn = emac_txq_cnt;
151 client->rx_qn = EMAC_RXQ_CNT;
153 client->pfe = priv->pfe;
154 client->port_id = dev->data->port_id;
155 client->event_handler = pfe_eth_event_handler;
157 client->tx_qsize = EMAC_TXQ_DEPTH;
158 client->rx_qsize = EMAC_RXQ_DEPTH;
160 rc = hif_lib_client_register(client);
162 PFE_PMD_ERR("hif_lib_client_register(%d)"
163 " failed", client->id);
168 /* Register client driver with HIF */
169 memset(client, 0, sizeof(*client));
170 client->id = PFE_CL_GEM0 + priv->id;
171 client->tx_qn = emac_txq_cnt;
172 client->rx_qn = EMAC_RXQ_CNT;
174 client->pfe = priv->pfe;
175 client->port_id = dev->data->port_id;
176 client->event_handler = pfe_eth_event_handler;
178 client->tx_qsize = EMAC_TXQ_DEPTH;
179 client->rx_qsize = EMAC_RXQ_DEPTH;
181 rc = hif_lib_client_register(client);
183 PFE_PMD_ERR("hif_lib_client_register(%d) failed",
188 rc = pfe_eth_start(priv);
195 pfe_eth_open_cdev(struct pfe_eth_priv_s *priv)
202 pfe_cdev_fd = open(PFE_CDEV_PATH, O_RDONLY);
203 if (pfe_cdev_fd < 0) {
204 PFE_PMD_WARN("Unable to open PFE device file (%s).\n",
206 PFE_PMD_WARN("Link status update will not be available.\n");
207 priv->link_fd = PFE_CDEV_INVALID_FD;
211 priv->link_fd = pfe_cdev_fd;
217 pfe_eth_close_cdev(struct pfe_eth_priv_s *priv)
222 if (priv->link_fd != PFE_CDEV_INVALID_FD) {
223 close(priv->link_fd);
224 priv->link_fd = PFE_CDEV_INVALID_FD;
229 pfe_eth_stop(struct rte_eth_dev *dev/*, int wake*/)
231 struct pfe_eth_priv_s *priv = dev->data->dev_private;
233 gemac_disable(priv->EMAC_baseaddr);
234 gpi_disable(priv->GPI_baseaddr);
238 pfe_eth_exit(struct rte_eth_dev *dev, struct pfe *pfe)
240 PMD_INIT_FUNC_TRACE();
243 /* Close the device file for link status */
244 pfe_eth_close_cdev(dev->data->dev_private);
246 rte_free(dev->data->mac_addrs);
247 rte_eth_dev_release_port(dev);
252 pfe_eth_close(struct rte_eth_dev *dev)
260 pfe_eth_exit(dev, g_pfe);
262 if (g_pfe->nb_devs == 0) {
264 pfe_hif_lib_exit(g_pfe);
271 pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)
277 pfe_eth_info(struct rte_eth_dev *dev,
278 struct rte_eth_dev_info *dev_info)
280 struct pfe_eth_priv_s *internals = dev->data->dev_private;
282 dev_info->if_index = internals->id;
283 dev_info->max_mac_addrs = PFE_MAX_MACS;
284 dev_info->max_rx_queues = dev->data->nb_rx_queues;
285 dev_info->max_tx_queues = dev->data->nb_tx_queues;
286 dev_info->min_rx_bufsize = HIF_RX_PKT_MIN_SIZE;
287 if (pfe_svr == SVR_LS1012A_REV1)
288 dev_info->max_rx_pktlen = MAX_MTU_ON_REV1 + PFE_ETH_OVERHEAD;
290 dev_info->max_rx_pktlen = JUMBO_FRAME_SIZE;
295 static const struct eth_dev_ops ops = {
296 .dev_start = pfe_eth_open,
297 .dev_stop = pfe_eth_stop,
298 .dev_close = pfe_eth_close,
299 .dev_configure = pfe_eth_configure,
300 .dev_infos_get = pfe_eth_info,
304 pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id)
306 struct rte_eth_dev *eth_dev = NULL;
307 struct pfe_eth_priv_s *priv = NULL;
308 struct ls1012a_eth_platform_data *einfo;
309 struct ls1012a_pfe_platform_data *pfe_info;
312 eth_dev = rte_eth_vdev_allocate(vdev, sizeof(*priv));
316 /* Extract pltform data */
317 pfe_info = (struct ls1012a_pfe_platform_data *)&pfe->platform_data;
319 PFE_PMD_ERR("pfe missing additional platform data");
324 einfo = (struct ls1012a_eth_platform_data *)pfe_info->ls1012a_eth_pdata;
326 /* einfo never be NULL, but no harm in having this check */
328 PFE_PMD_ERR("pfe missing additional gemacs platform data");
333 priv = eth_dev->data->dev_private;
334 priv->ndev = eth_dev;
335 priv->id = einfo[id].gem_id;
338 pfe->eth.eth_priv[id] = priv;
340 /* Set the info in the priv to the current info */
341 priv->einfo = &einfo[id];
342 priv->EMAC_baseaddr = cbus_emac_base[id];
343 priv->PHY_baseaddr = cbus_emac_base[id];
344 priv->GPI_baseaddr = cbus_gpi_base[id];
346 #define HIF_GEMAC_TMUQ_BASE 6
347 priv->low_tmu_q = HIF_GEMAC_TMUQ_BASE + (id * 2);
348 priv->high_tmu_q = priv->low_tmu_q + 1;
350 rte_spinlock_init(&priv->lock);
352 /* Copy the station address into the dev structure, */
353 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
354 ETHER_ADDR_LEN * PFE_MAX_MACS, 0);
355 if (eth_dev->data->mac_addrs == NULL) {
356 PFE_PMD_ERR("Failed to allocate mem %d to store MAC addresses",
357 ETHER_ADDR_LEN * PFE_MAX_MACS);
362 eth_dev->data->mtu = 1500;
363 eth_dev->dev_ops = &ops;
364 pfe_eth_stop(eth_dev);
365 pfe_gemac_init(priv);
367 eth_dev->data->nb_rx_queues = 1;
368 eth_dev->data->nb_tx_queues = 1;
370 /* For link status, open the PFE CDEV; Error from this function
371 * is silently ignored; In case of error, the link status will not
374 pfe_eth_open_cdev(priv);
375 rte_eth_dev_probing_finish(eth_dev);
379 rte_eth_dev_release_port(eth_dev);
384 pfe_get_gemac_if_proprties(struct pfe *pfe,
385 __rte_unused const struct device_node *parent,
386 unsigned int port, unsigned int if_cnt,
387 struct ls1012a_pfe_platform_data *pdata)
389 const struct device_node *gem = NULL;
391 unsigned int ii = 0, phy_id = 0;
393 const void *mac_addr;
395 for (ii = 0; ii < if_cnt; ii++) {
396 gem = of_get_next_child(parent, gem);
399 addr = of_get_property(gem, "reg", &size);
400 if (addr && (rte_be_to_cpu_32((unsigned int)*addr) == port))
405 PFE_PMD_ERR("Failed to find interface = %d", if_cnt);
409 pdata->ls1012a_eth_pdata[port].gem_id = port;
411 mac_addr = of_get_mac_address(gem);
414 memcpy(pdata->ls1012a_eth_pdata[port].mac_addr, mac_addr,
418 addr = of_get_property(gem, "fsl,mdio-mux-val", &size);
420 PFE_PMD_ERR("Invalid mdio-mux-val....");
422 phy_id = rte_be_to_cpu_32((unsigned int)*addr);
423 pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
425 if (pdata->ls1012a_eth_pdata[port].phy_id < 32)
426 pfe->mdio_muxval[pdata->ls1012a_eth_pdata[port].phy_id] =
427 pdata->ls1012a_eth_pdata[port].mdio_muxval;
435 /* Parse integer from integer argument */
437 parse_integer_arg(const char *key __rte_unused,
438 const char *value, void *extra_args)
444 i = strtol(value, &end, 10);
445 if (*end != 0 || errno != 0 || i < 0 || i > 1) {
446 PFE_PMD_ERR("Supported Port IDS are 0 and 1");
450 *((uint32_t *)extra_args) = i;
456 pfe_parse_vdev_init_params(struct pfe_vdev_init_params *params,
457 struct rte_vdev_device *dev)
459 struct rte_kvargs *kvlist = NULL;
462 static const char * const pfe_vdev_valid_params[] = {
467 const char *input_args = rte_vdev_device_args(dev);
472 kvlist = rte_kvargs_parse(input_args, pfe_vdev_valid_params);
476 ret = rte_kvargs_process(kvlist,
480 rte_kvargs_free(kvlist);
485 pmd_pfe_probe(struct rte_vdev_device *vdev)
488 const struct device_node *np;
490 const uint32_t *addr;
491 uint64_t cbus_addr, ddr_size, cbus_size;
492 int rc = -1, fd = -1, gem_id;
493 unsigned int ii, interface_count = 0;
495 struct pfe_vdev_init_params init_params = {
499 name = rte_vdev_device_name(vdev);
500 rc = pfe_parse_vdev_init_params(&init_params, vdev);
504 RTE_LOG(INFO, PMD, "Initializing pmd_pfe for %s Given gem-id %d\n",
505 name, init_params.gem_id);
508 if (g_pfe->nb_devs >= g_pfe->max_intf) {
509 PFE_PMD_ERR("PFE %d dev already created Max is %d",
510 g_pfe->nb_devs, g_pfe->max_intf);
516 g_pfe = rte_zmalloc(NULL, sizeof(*g_pfe), RTE_CACHE_LINE_SIZE);
520 /* Load the device-tree driver */
523 PFE_PMD_ERR("of_init failed with ret: %d", rc);
527 np = of_find_compatible_node(NULL, NULL, "fsl,pfe");
529 PFE_PMD_ERR("Invalid device node");
534 addr = of_get_address(np, 0, &cbus_size, NULL);
536 PFE_PMD_ERR("of_get_address cannot return qman address\n");
539 cbus_addr = of_translate_address(np, addr);
541 PFE_PMD_ERR("of_translate_address failed\n");
545 addr = of_get_address(np, 1, &ddr_size, NULL);
547 PFE_PMD_ERR("of_get_address cannot return qman address\n");
551 g_pfe->ddr_phys_baseaddr = of_translate_address(np, addr);
552 if (!g_pfe->ddr_phys_baseaddr) {
553 PFE_PMD_ERR("of_translate_address failed\n");
557 g_pfe->ddr_baseaddr = pfe_mem_ptov(g_pfe->ddr_phys_baseaddr);
558 g_pfe->ddr_size = ddr_size;
559 g_pfe->cbus_size = cbus_size;
561 fd = open("/dev/mem", O_RDWR);
562 g_pfe->cbus_baseaddr = mmap(NULL, cbus_size, PROT_READ | PROT_WRITE,
563 MAP_SHARED, fd, cbus_addr);
565 if (g_pfe->cbus_baseaddr == MAP_FAILED) {
566 PFE_PMD_ERR("Can not map cbus base");
571 /* Read interface count */
572 prop = of_get_property(np, "fsl,pfe-num-interfaces", &size);
574 PFE_PMD_ERR("Failed to read number of interfaces");
579 interface_count = rte_be_to_cpu_32((unsigned int)*prop);
580 if (interface_count <= 0) {
581 PFE_PMD_ERR("No ethernet interface count : %d",
586 PFE_PMD_INFO("num interfaces = %d ", interface_count);
588 g_pfe->max_intf = interface_count;
589 g_pfe->platform_data.ls1012a_mdio_pdata[0].phy_mask = 0xffffffff;
591 for (ii = 0; ii < interface_count; ii++) {
592 pfe_get_gemac_if_proprties(g_pfe, np, ii, interface_count,
593 &g_pfe->platform_data);
596 pfe_lib_init(g_pfe->cbus_baseaddr, g_pfe->ddr_baseaddr,
597 g_pfe->ddr_phys_baseaddr, g_pfe->ddr_size);
599 PFE_PMD_INFO("CLASS version: %x", readl(CLASS_VERSION));
600 PFE_PMD_INFO("TMU version: %x", readl(TMU_VERSION));
602 PFE_PMD_INFO("BMU1 version: %x", readl(BMU1_BASE_ADDR + BMU_VERSION));
603 PFE_PMD_INFO("BMU2 version: %x", readl(BMU2_BASE_ADDR + BMU_VERSION));
605 PFE_PMD_INFO("EGPI1 version: %x", readl(EGPI1_BASE_ADDR + GPI_VERSION));
606 PFE_PMD_INFO("EGPI2 version: %x", readl(EGPI2_BASE_ADDR + GPI_VERSION));
607 PFE_PMD_INFO("HGPI version: %x", readl(HGPI_BASE_ADDR + GPI_VERSION));
609 PFE_PMD_INFO("HIF version: %x", readl(HIF_VERSION));
610 PFE_PMD_INFO("HIF NOPCY version: %x", readl(HIF_NOCPY_VERSION));
612 cbus_emac_base[0] = EMAC1_BASE_ADDR;
613 cbus_emac_base[1] = EMAC2_BASE_ADDR;
615 cbus_gpi_base[0] = EGPI1_BASE_ADDR;
616 cbus_gpi_base[1] = EGPI2_BASE_ADDR;
618 rc = pfe_hif_lib_init(g_pfe);
622 rc = pfe_hif_init(g_pfe);
625 pfe_soc_version_get();
627 if (init_params.gem_id < 0)
628 gem_id = g_pfe->nb_devs;
630 gem_id = init_params.gem_id;
632 RTE_LOG(INFO, PMD, "Init pmd_pfe for %s gem-id %d(given =%d)\n",
633 name, gem_id, init_params.gem_id);
635 rc = pfe_eth_init(vdev, g_pfe, gem_id);
647 pfe_hif_lib_exit(g_pfe);
651 munmap(g_pfe->cbus_baseaddr, cbus_size);
658 pmd_pfe_remove(struct rte_vdev_device *vdev)
661 struct rte_eth_dev *eth_dev = NULL;
663 name = rte_vdev_device_name(vdev);
667 PFE_PMD_INFO("Closing eventdev sw device %s", name);
672 eth_dev = rte_eth_dev_allocated(name);
676 pfe_eth_exit(eth_dev, g_pfe);
677 munmap(g_pfe->cbus_baseaddr, g_pfe->cbus_size);
679 if (g_pfe->nb_devs == 0) {
681 pfe_hif_lib_exit(g_pfe);
689 struct rte_vdev_driver pmd_pfe_drv = {
690 .probe = pmd_pfe_probe,
691 .remove = pmd_pfe_remove,
694 RTE_PMD_REGISTER_VDEV(PFE_NAME_PMD, pmd_pfe_drv);
695 RTE_PMD_REGISTER_PARAM_STRING(PFE_NAME_PMD, PFE_VDEV_GEM_ID_ARG "=<int> ");
697 RTE_INIT(pfe_pmd_init_log)
699 pfe_logtype_pmd = rte_log_register("pmd.net.pfe");
700 if (pfe_logtype_pmd >= 0)
701 rte_log_set_level(pfe_logtype_pmd, RTE_LOG_NOTICE);