net/tap: fix to populate FDs in secondary process
[dpdk.git] / drivers / net / pfe / pfe_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2018-2019 NXP
3  */
4
5 #include <sys/ioctl.h>
6 #include <sys/epoll.h>
7 #include <rte_kvargs.h>
8 #include <ethdev_vdev.h>
9 #include <rte_bus_vdev.h>
10 #include <rte_ether.h>
11 #include <dpaa_of.h>
12
13 #include "pfe_logs.h"
14 #include "pfe_mod.h"
15
16 #define PFE_MAX_MACS 1 /* we can support up to 4 MACs per IF */
17 #define PFE_VDEV_GEM_ID_ARG     "intf"
18
19 struct pfe_vdev_init_params {
20         int8_t  gem_id;
21 };
22 static struct pfe *g_pfe;
23 /* Supported Rx offloads */
24 static uint64_t dev_rx_offloads_sup =
25                 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
26                 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
27                 RTE_ETH_RX_OFFLOAD_TCP_CKSUM;
28
29 /* Supported Tx offloads */
30 static uint64_t dev_tx_offloads_sup =
31                 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
32                 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
33                 RTE_ETH_TX_OFFLOAD_TCP_CKSUM;
34
35 /* TODO: make pfe_svr a runtime option.
36  * Driver should be able to get the SVR
37  * information from HW.
38  */
39 unsigned int pfe_svr = SVR_LS1012A_REV1;
40 static void *cbus_emac_base[3];
41 static void *cbus_gpi_base[3];
42
43 /* pfe_gemac_init
44  */
45 static int
46 pfe_gemac_init(struct pfe_eth_priv_s *priv)
47 {
48         struct gemac_cfg cfg;
49
50         cfg.speed = SPEED_1000M;
51         cfg.duplex = DUPLEX_FULL;
52
53         gemac_set_config(priv->EMAC_baseaddr, &cfg);
54         gemac_allow_broadcast(priv->EMAC_baseaddr);
55         gemac_enable_1536_rx(priv->EMAC_baseaddr);
56         gemac_enable_stacked_vlan(priv->EMAC_baseaddr);
57         gemac_enable_pause_rx(priv->EMAC_baseaddr);
58         gemac_set_bus_width(priv->EMAC_baseaddr, 64);
59         gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
60
61         return 0;
62 }
63
64 static void
65 pfe_soc_version_get(void)
66 {
67         FILE *svr_file = NULL;
68         unsigned int svr_ver = 0;
69
70         PMD_INIT_FUNC_TRACE();
71
72         svr_file = fopen(PFE_SOC_ID_FILE, "r");
73         if (!svr_file) {
74                 PFE_PMD_ERR("Unable to open SoC device");
75                 return; /* Not supported on this infra */
76         }
77
78         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
79                 pfe_svr = svr_ver;
80         else
81                 PFE_PMD_ERR("Unable to read SoC device");
82
83         fclose(svr_file);
84 }
85
86 static int pfe_eth_start(struct pfe_eth_priv_s *priv)
87 {
88         gpi_enable(priv->GPI_baseaddr);
89         gemac_enable(priv->EMAC_baseaddr);
90
91         return 0;
92 }
93
94 static void
95 pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
96                   __rte_unused from_tx, __rte_unused int n_desc)
97 {
98         struct rte_mbuf *mbuf;
99         unsigned int flags;
100
101         /* Clean HIF and client queue */
102         while ((mbuf = hif_lib_tx_get_next_complete(&priv->client,
103                                                    tx_q_num, &flags,
104                                                    HIF_TX_DESC_NT))) {
105                 if (mbuf) {
106                         mbuf->next = NULL;
107                         mbuf->nb_segs = 1;
108                         rte_pktmbuf_free(mbuf);
109                 }
110         }
111 }
112
113
114 static void
115 pfe_eth_flush_tx(struct pfe_eth_priv_s *priv)
116 {
117         unsigned int ii;
118
119         for (ii = 0; ii < emac_txq_cnt; ii++)
120                 pfe_eth_flush_txQ(priv, ii, 0, 0);
121 }
122
123 static int
124 pfe_eth_event_handler(void *data, int event, __rte_unused int qno)
125 {
126         struct pfe_eth_priv_s *priv = data;
127
128         switch (event) {
129         case EVENT_TXDONE_IND:
130                 pfe_eth_flush_tx(priv);
131                 hif_lib_event_handler_start(&priv->client, EVENT_TXDONE_IND, 0);
132                 break;
133         case EVENT_HIGH_RX_WM:
134         default:
135                 break;
136         }
137
138         return 0;
139 }
140
141 static uint16_t
142 pfe_recv_pkts_on_intr(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
143 {
144         struct hif_client_rx_queue *queue = rxq;
145         struct pfe_eth_priv_s *priv = queue->priv;
146         struct epoll_event epoll_ev;
147         uint64_t ticks = 1;  /* 1 msec */
148         int ret;
149         int have_something, work_done;
150
151 #define RESET_STATUS (HIF_INT | HIF_RXPKT_INT)
152
153         /*TODO can we remove this cleanup from here?*/
154         pfe_tx_do_cleanup(priv->pfe);
155         have_something = pfe_hif_rx_process(priv->pfe, nb_pkts);
156         work_done = hif_lib_receive_pkt(rxq, priv->pfe->hif.shm->pool,
157                         rx_pkts, nb_pkts);
158
159         if (!have_something || !work_done) {
160                 writel(RESET_STATUS, HIF_INT_SRC);
161                 writel(readl(HIF_INT_ENABLE) | HIF_RXPKT_INT, HIF_INT_ENABLE);
162                 ret = epoll_wait(priv->pfe->hif.epoll_fd, &epoll_ev, 1, ticks);
163                 if (ret < 0 && errno != EINTR)
164                         PFE_PMD_ERR("epoll_wait fails with %d\n", errno);
165         }
166
167         return work_done;
168 }
169
170 static uint16_t
171 pfe_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
172 {
173         struct hif_client_rx_queue *queue = rxq;
174         struct pfe_eth_priv_s *priv = queue->priv;
175         struct rte_mempool *pool;
176
177         /*TODO can we remove this cleanup from here?*/
178         pfe_tx_do_cleanup(priv->pfe);
179         pfe_hif_rx_process(priv->pfe, nb_pkts);
180         pool = priv->pfe->hif.shm->pool;
181
182         return hif_lib_receive_pkt(rxq, pool, rx_pkts, nb_pkts);
183 }
184
185 static uint16_t
186 pfe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
187 {
188         struct hif_client_tx_queue *queue = tx_queue;
189         struct pfe_eth_priv_s *priv = queue->priv;
190         struct rte_eth_stats *stats = &priv->stats;
191         int i;
192
193         for (i = 0; i < nb_pkts; i++) {
194                 if (tx_pkts[i]->nb_segs > 1) {
195                         struct rte_mbuf *mbuf;
196                         int j;
197
198                         hif_lib_xmit_pkt(&priv->client, queue->queue_id,
199                                 (void *)(size_t)rte_pktmbuf_iova(tx_pkts[i]),
200                                 tx_pkts[i]->buf_addr + tx_pkts[i]->data_off,
201                                 tx_pkts[i]->data_len, 0x0, HIF_FIRST_BUFFER,
202                                 tx_pkts[i]);
203
204                         mbuf = tx_pkts[i]->next;
205                         for (j = 0; j < (tx_pkts[i]->nb_segs - 2); j++) {
206                                 hif_lib_xmit_pkt(&priv->client, queue->queue_id,
207                                         (void *)(size_t)rte_pktmbuf_iova(mbuf),
208                                         mbuf->buf_addr + mbuf->data_off,
209                                         mbuf->data_len,
210                                         0x0, 0x0, mbuf);
211                                 mbuf = mbuf->next;
212                         }
213
214                         hif_lib_xmit_pkt(&priv->client, queue->queue_id,
215                                         (void *)(size_t)rte_pktmbuf_iova(mbuf),
216                                         mbuf->buf_addr + mbuf->data_off,
217                                         mbuf->data_len,
218                                         0x0, HIF_LAST_BUFFER | HIF_DATA_VALID,
219                                         mbuf);
220                 } else {
221                         hif_lib_xmit_pkt(&priv->client, queue->queue_id,
222                                 (void *)(size_t)rte_pktmbuf_iova(tx_pkts[i]),
223                                 tx_pkts[i]->buf_addr + tx_pkts[i]->data_off,
224                                 tx_pkts[i]->pkt_len, 0 /*ctrl*/,
225                                 HIF_FIRST_BUFFER | HIF_LAST_BUFFER |
226                                 HIF_DATA_VALID,
227                                 tx_pkts[i]);
228                 }
229                 stats->obytes += tx_pkts[i]->pkt_len;
230                 hif_tx_dma_start();
231         }
232         stats->opackets += nb_pkts;
233         pfe_tx_do_cleanup(priv->pfe);
234
235         return nb_pkts;
236 }
237
238 static uint16_t
239 pfe_dummy_xmit_pkts(__rte_unused void *tx_queue,
240                 __rte_unused struct rte_mbuf **tx_pkts,
241                 __rte_unused uint16_t nb_pkts)
242 {
243         return 0;
244 }
245
246 static uint16_t
247 pfe_dummy_recv_pkts(__rte_unused void *rxq,
248                 __rte_unused struct rte_mbuf **rx_pkts,
249                 __rte_unused uint16_t nb_pkts)
250 {
251         return 0;
252 }
253
254 static int
255 pfe_eth_open(struct rte_eth_dev *dev)
256 {
257         struct pfe_eth_priv_s *priv = dev->data->dev_private;
258         struct hif_client_s *client;
259         struct hif_shm *hif_shm;
260         int rc;
261
262         /* Register client driver with HIF */
263         client = &priv->client;
264
265         if (client->pfe) {
266                 hif_shm = client->pfe->hif.shm;
267                 /* TODO please remove the below code of if block, once we add
268                  * the proper cleanup in eth_close
269                  */
270                 if (!test_bit(PFE_CL_GEM0 + priv->id,
271                               &hif_shm->g_client_status[0])) {
272                         /* Register client driver with HIF */
273                         memset(client, 0, sizeof(*client));
274                         client->id = PFE_CL_GEM0 + priv->id;
275                         client->tx_qn = emac_txq_cnt;
276                         client->rx_qn = EMAC_RXQ_CNT;
277                         client->priv = priv;
278                         client->pfe = priv->pfe;
279                         client->port_id = dev->data->port_id;
280                         client->event_handler = pfe_eth_event_handler;
281
282                         client->tx_qsize = EMAC_TXQ_DEPTH;
283                         client->rx_qsize = EMAC_RXQ_DEPTH;
284
285                         rc = hif_lib_client_register(client);
286                         if (rc) {
287                                 PFE_PMD_ERR("hif_lib_client_register(%d)"
288                                             " failed", client->id);
289                                 goto err0;
290                         }
291                 } else {
292                         /* Freeing the packets if already exists */
293                         int ret = 0;
294                         struct rte_mbuf *rx_pkts[32];
295                         /* TODO multiqueue support */
296                         ret = hif_lib_receive_pkt(&client->rx_q[0],
297                                                   hif_shm->pool, rx_pkts, 32);
298                         while (ret) {
299                                 int i;
300                                 for (i = 0; i < ret; i++)
301                                         rte_pktmbuf_free(rx_pkts[i]);
302                                 ret = hif_lib_receive_pkt(&client->rx_q[0],
303                                                           hif_shm->pool,
304                                                           rx_pkts, 32);
305                         }
306                 }
307         } else {
308                 /* Register client driver with HIF */
309                 memset(client, 0, sizeof(*client));
310                 client->id = PFE_CL_GEM0 + priv->id;
311                 client->tx_qn = emac_txq_cnt;
312                 client->rx_qn = EMAC_RXQ_CNT;
313                 client->priv = priv;
314                 client->pfe = priv->pfe;
315                 client->port_id = dev->data->port_id;
316                 client->event_handler = pfe_eth_event_handler;
317
318                 client->tx_qsize = EMAC_TXQ_DEPTH;
319                 client->rx_qsize = EMAC_RXQ_DEPTH;
320
321                 rc = hif_lib_client_register(client);
322                 if (rc) {
323                         PFE_PMD_ERR("hif_lib_client_register(%d) failed",
324                                     client->id);
325                         goto err0;
326                 }
327         }
328         rc = pfe_eth_start(priv);
329         dev->rx_pkt_burst = &pfe_recv_pkts;
330         dev->tx_pkt_burst = &pfe_xmit_pkts;
331         /* If no prefetch is configured. */
332         if (getenv("PFE_INTR_SUPPORT")) {
333                 dev->rx_pkt_burst = &pfe_recv_pkts_on_intr;
334                 PFE_PMD_INFO("PFE INTERRUPT Mode enabled");
335         }
336
337
338 err0:
339         return rc;
340 }
341
342 static int
343 pfe_eth_open_cdev(struct pfe_eth_priv_s *priv)
344 {
345         int pfe_cdev_fd;
346
347         if (priv == NULL)
348                 return -1;
349
350         pfe_cdev_fd = open(PFE_CDEV_PATH, O_RDONLY);
351         if (pfe_cdev_fd < 0) {
352                 PFE_PMD_WARN("Unable to open PFE device file (%s).\n",
353                              PFE_CDEV_PATH);
354                 PFE_PMD_WARN("Link status update will not be available.\n");
355                 priv->link_fd = PFE_CDEV_INVALID_FD;
356                 return -1;
357         }
358
359         priv->link_fd = pfe_cdev_fd;
360
361         return 0;
362 }
363
364 static void
365 pfe_eth_close_cdev(struct pfe_eth_priv_s *priv)
366 {
367         if (priv == NULL)
368                 return;
369
370         if (priv->link_fd != PFE_CDEV_INVALID_FD) {
371                 close(priv->link_fd);
372                 priv->link_fd = PFE_CDEV_INVALID_FD;
373         }
374 }
375
376 static int
377 pfe_eth_stop(struct rte_eth_dev *dev/*, int wake*/)
378 {
379         struct pfe_eth_priv_s *priv = dev->data->dev_private;
380
381         dev->data->dev_started = 0;
382
383         gemac_disable(priv->EMAC_baseaddr);
384         gpi_disable(priv->GPI_baseaddr);
385
386         dev->rx_pkt_burst = &pfe_dummy_recv_pkts;
387         dev->tx_pkt_burst = &pfe_dummy_xmit_pkts;
388
389         return 0;
390 }
391
392 static int
393 pfe_eth_close(struct rte_eth_dev *dev)
394 {
395         int ret;
396         PMD_INIT_FUNC_TRACE();
397
398         if (!dev)
399                 return -1;
400
401         if (!g_pfe)
402                 return -1;
403
404         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
405                 return 0;
406
407         ret = pfe_eth_stop(dev);
408         /* Close the device file for link status */
409         pfe_eth_close_cdev(dev->data->dev_private);
410
411         munmap(g_pfe->cbus_baseaddr, g_pfe->cbus_size);
412         g_pfe->nb_devs--;
413
414         if (g_pfe->nb_devs == 0) {
415                 pfe_hif_exit(g_pfe);
416                 pfe_hif_lib_exit(g_pfe);
417                 rte_free(g_pfe);
418                 g_pfe = NULL;
419         }
420
421         return ret;
422 }
423
424 static int
425 pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)
426 {
427         return 0;
428 }
429
430 static int
431 pfe_eth_info(struct rte_eth_dev *dev,
432                 struct rte_eth_dev_info *dev_info)
433 {
434         dev_info->max_mac_addrs = PFE_MAX_MACS;
435         dev_info->max_rx_queues = dev->data->nb_rx_queues;
436         dev_info->max_tx_queues = dev->data->nb_tx_queues;
437         dev_info->min_rx_bufsize = HIF_RX_PKT_MIN_SIZE;
438         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
439         dev_info->rx_offload_capa = dev_rx_offloads_sup;
440         dev_info->tx_offload_capa = dev_tx_offloads_sup;
441         if (pfe_svr == SVR_LS1012A_REV1) {
442                 dev_info->max_rx_pktlen = MAX_MTU_ON_REV1 + PFE_ETH_OVERHEAD;
443                 dev_info->max_mtu = MAX_MTU_ON_REV1;
444         } else {
445                 dev_info->max_rx_pktlen = JUMBO_FRAME_SIZE;
446                 dev_info->max_mtu = JUMBO_FRAME_SIZE - PFE_ETH_OVERHEAD;
447         }
448
449         return 0;
450 }
451
452 /* Only first mb_pool given on first call of this API will be used
453  * in whole system, also nb_rx_desc and rx_conf are unused params
454  */
455 static int
456 pfe_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
457                 __rte_unused uint16_t nb_rx_desc,
458                 __rte_unused unsigned int socket_id,
459                 __rte_unused const struct rte_eth_rxconf *rx_conf,
460                 struct rte_mempool *mb_pool)
461 {
462         int rc = 0;
463         struct pfe *pfe;
464         struct pfe_eth_priv_s *priv = dev->data->dev_private;
465
466         pfe = priv->pfe;
467
468         if (queue_idx >= EMAC_RXQ_CNT) {
469                 PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
470                                 queue_idx, EMAC_RXQ_CNT);
471                 return -1;
472         }
473
474         if (!pfe->hif.setuped) {
475                 rc = pfe_hif_shm_init(pfe->hif.shm, mb_pool);
476                 if (rc) {
477                         PFE_PMD_ERR("Could not allocate buffer descriptors");
478                         return -1;
479                 }
480
481                 pfe->hif.shm->pool = mb_pool;
482                 if (pfe_hif_init_buffers(&pfe->hif)) {
483                         PFE_PMD_ERR("Could not initialize buffer descriptors");
484                         return -1;
485                 }
486                 hif_init();
487                 hif_rx_enable();
488                 hif_tx_enable();
489                 pfe->hif.setuped = 1;
490         }
491         dev->data->rx_queues[queue_idx] = &priv->client.rx_q[queue_idx];
492         priv->client.rx_q[queue_idx].queue_id = queue_idx;
493
494         return 0;
495 }
496
497 static int
498 pfe_tx_queue_setup(struct rte_eth_dev *dev,
499                    uint16_t queue_idx,
500                    __rte_unused uint16_t nb_desc,
501                    __rte_unused unsigned int socket_id,
502                    __rte_unused const struct rte_eth_txconf *tx_conf)
503 {
504         struct pfe_eth_priv_s *priv = dev->data->dev_private;
505
506         if (queue_idx >= emac_txq_cnt) {
507                 PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
508                                 queue_idx, emac_txq_cnt);
509                 return -1;
510         }
511         dev->data->tx_queues[queue_idx] = &priv->client.tx_q[queue_idx];
512         priv->client.tx_q[queue_idx].queue_id = queue_idx;
513         return 0;
514 }
515
516 static const uint32_t *
517 pfe_supported_ptypes_get(struct rte_eth_dev *dev)
518 {
519         static const uint32_t ptypes[] = {
520                 /*todo -= add more types */
521                 RTE_PTYPE_L2_ETHER,
522                 RTE_PTYPE_L3_IPV4,
523                 RTE_PTYPE_L3_IPV4_EXT,
524                 RTE_PTYPE_L3_IPV6,
525                 RTE_PTYPE_L3_IPV6_EXT,
526                 RTE_PTYPE_L4_TCP,
527                 RTE_PTYPE_L4_UDP,
528                 RTE_PTYPE_L4_SCTP
529         };
530
531         if (dev->rx_pkt_burst == pfe_recv_pkts ||
532                         dev->rx_pkt_burst == pfe_recv_pkts_on_intr)
533                 return ptypes;
534         return NULL;
535 }
536
537 static inline int
538 pfe_eth_atomic_read_link_status(struct rte_eth_dev *dev,
539                                 struct rte_eth_link *link)
540 {
541         struct rte_eth_link *dst = link;
542         struct rte_eth_link *src = &dev->data->dev_link;
543
544         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
545                                 *(uint64_t *)src) == 0)
546                 return -1;
547
548         return 0;
549 }
550
551 static inline int
552 pfe_eth_atomic_write_link_status(struct rte_eth_dev *dev,
553                                  struct rte_eth_link *link)
554 {
555         struct rte_eth_link *dst = &dev->data->dev_link;
556         struct rte_eth_link *src = link;
557
558         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
559                                 *(uint64_t *)src) == 0)
560                 return -1;
561
562         return 0;
563 }
564
565 static int
566 pfe_eth_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
567 {
568         int ret, ioctl_cmd = 0;
569         struct pfe_eth_priv_s *priv = dev->data->dev_private;
570         struct rte_eth_link link, old;
571         unsigned int lstatus = 1;
572
573         memset(&old, 0, sizeof(old));
574         memset(&link, 0, sizeof(struct rte_eth_link));
575
576         pfe_eth_atomic_read_link_status(dev, &old);
577
578         /* Read from PFE CDEV, status of link, if file was successfully
579          * opened.
580          */
581         if (priv->link_fd != PFE_CDEV_INVALID_FD) {
582                 if (priv->id == 0)
583                         ioctl_cmd = PFE_CDEV_ETH0_STATE_GET;
584                 if (priv->id == 1)
585                         ioctl_cmd = PFE_CDEV_ETH1_STATE_GET;
586
587                 ret = ioctl(priv->link_fd, ioctl_cmd, &lstatus);
588                 if (ret != 0) {
589                         PFE_PMD_ERR("Unable to fetch link status (ioctl)\n");
590                         return -1;
591                 }
592                 PFE_PMD_DEBUG("Fetched link state (%d) for dev %d.\n",
593                               lstatus, priv->id);
594         }
595
596         if (old.link_status == lstatus) {
597                 /* no change in status */
598                 PFE_PMD_DEBUG("No change in link status; Not updating.\n");
599                 return -1;
600         }
601
602         link.link_status = lstatus;
603         link.link_speed = RTE_ETH_LINK_SPEED_1G;
604         link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
605         link.link_autoneg = RTE_ETH_LINK_AUTONEG;
606
607         pfe_eth_atomic_write_link_status(dev, &link);
608
609         PFE_PMD_INFO("Port (%d) link is %s\n", dev->data->port_id,
610                      link.link_status ? "up" : "down");
611
612         return 0;
613 }
614
615 static int
616 pfe_promiscuous_enable(struct rte_eth_dev *dev)
617 {
618         struct pfe_eth_priv_s *priv = dev->data->dev_private;
619
620         priv->promisc = 1;
621         dev->data->promiscuous = 1;
622         gemac_enable_copy_all(priv->EMAC_baseaddr);
623
624         return 0;
625 }
626
627 static int
628 pfe_promiscuous_disable(struct rte_eth_dev *dev)
629 {
630         struct pfe_eth_priv_s *priv = dev->data->dev_private;
631
632         priv->promisc = 0;
633         dev->data->promiscuous = 0;
634         gemac_disable_copy_all(priv->EMAC_baseaddr);
635
636         return 0;
637 }
638
639 static int
640 pfe_allmulticast_enable(struct rte_eth_dev *dev)
641 {
642         struct pfe_eth_priv_s *priv = dev->data->dev_private;
643         struct pfe_mac_addr    hash_addr; /* hash register structure */
644
645         /* Set the hash to rx all multicast frames */
646         hash_addr.bottom = 0xFFFFFFFF;
647         hash_addr.top = 0xFFFFFFFF;
648         gemac_set_hash(priv->EMAC_baseaddr, &hash_addr);
649         dev->data->all_multicast = 1;
650
651         return 0;
652 }
653
654 static int
655 pfe_link_down(struct rte_eth_dev *dev)
656 {
657         return pfe_eth_stop(dev);
658 }
659
660 static int
661 pfe_link_up(struct rte_eth_dev *dev)
662 {
663         struct pfe_eth_priv_s *priv = dev->data->dev_private;
664
665         pfe_eth_start(priv);
666         return 0;
667 }
668
669 static int
670 pfe_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
671 {
672         struct pfe_eth_priv_s *priv = dev->data->dev_private;
673         uint16_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
674
675         /*TODO Support VLAN*/
676         return gemac_set_rx(priv->EMAC_baseaddr, frame_size);
677 }
678
679 /* pfe_eth_enet_addr_byte_mac
680  */
681 static int
682 pfe_eth_enet_addr_byte_mac(u8 *enet_byte_addr,
683                            struct pfe_mac_addr *enet_addr)
684 {
685         if (!enet_byte_addr || !enet_addr) {
686                 return -1;
687
688         } else {
689                 enet_addr->bottom = enet_byte_addr[0] |
690                         (enet_byte_addr[1] << 8) |
691                         (enet_byte_addr[2] << 16) |
692                         (enet_byte_addr[3] << 24);
693                 enet_addr->top = enet_byte_addr[4] |
694                         (enet_byte_addr[5] << 8);
695                 return 0;
696         }
697 }
698
699 static int
700 pfe_dev_set_mac_addr(struct rte_eth_dev *dev,
701                        struct rte_ether_addr *addr)
702 {
703         struct pfe_eth_priv_s *priv = dev->data->dev_private;
704         struct pfe_mac_addr spec_addr;
705         int ret;
706
707         ret = pfe_eth_enet_addr_byte_mac(addr->addr_bytes, &spec_addr);
708         if (ret)
709                 return ret;
710
711         gemac_set_laddrN(priv->EMAC_baseaddr,
712                          (struct pfe_mac_addr *)&spec_addr, 1);
713         rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
714         return 0;
715 }
716
717 static int
718 pfe_stats_get(struct rte_eth_dev *dev,
719               struct rte_eth_stats *stats)
720 {
721         struct pfe_eth_priv_s *priv = dev->data->dev_private;
722         struct rte_eth_stats *eth_stats = &priv->stats;
723
724         if (stats == NULL)
725                 return -1;
726
727         memset(stats, 0, sizeof(struct rte_eth_stats));
728
729         stats->ipackets = eth_stats->ipackets;
730         stats->ibytes = eth_stats->ibytes;
731         stats->opackets = eth_stats->opackets;
732         stats->obytes = eth_stats->obytes;
733
734         return 0;
735 }
736
737 static const struct eth_dev_ops ops = {
738         .dev_start = pfe_eth_open,
739         .dev_stop = pfe_eth_stop,
740         .dev_close = pfe_eth_close,
741         .dev_configure = pfe_eth_configure,
742         .dev_infos_get = pfe_eth_info,
743         .rx_queue_setup = pfe_rx_queue_setup,
744         .tx_queue_setup = pfe_tx_queue_setup,
745         .dev_supported_ptypes_get = pfe_supported_ptypes_get,
746         .link_update  = pfe_eth_link_update,
747         .promiscuous_enable   = pfe_promiscuous_enable,
748         .promiscuous_disable  = pfe_promiscuous_disable,
749         .allmulticast_enable  = pfe_allmulticast_enable,
750         .dev_set_link_down    = pfe_link_down,
751         .dev_set_link_up      = pfe_link_up,
752         .mtu_set              = pfe_mtu_set,
753         .mac_addr_set         = pfe_dev_set_mac_addr,
754         .stats_get            = pfe_stats_get,
755 };
756
757 static int
758 pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id)
759 {
760         struct rte_eth_dev *eth_dev = NULL;
761         struct pfe_eth_priv_s *priv = NULL;
762         struct ls1012a_eth_platform_data *einfo;
763         struct ls1012a_pfe_platform_data *pfe_info;
764         struct rte_ether_addr addr;
765         int err;
766
767         eth_dev = rte_eth_vdev_allocate(vdev, sizeof(*priv));
768         if (eth_dev == NULL)
769                 return -ENOMEM;
770
771         /* Extract platform data */
772         pfe_info = (struct ls1012a_pfe_platform_data *)&pfe->platform_data;
773         if (!pfe_info) {
774                 PFE_PMD_ERR("pfe missing additional platform data");
775                 err = -ENODEV;
776                 goto err0;
777         }
778
779         einfo = (struct ls1012a_eth_platform_data *)pfe_info->ls1012a_eth_pdata;
780
781         /* einfo never be NULL, but no harm in having this check */
782         if (!einfo) {
783                 PFE_PMD_ERR("pfe missing additional gemacs platform data");
784                 err = -ENODEV;
785                 goto err0;
786         }
787
788         priv = eth_dev->data->dev_private;
789         priv->ndev = eth_dev;
790         priv->id = einfo[id].gem_id;
791         priv->pfe = pfe;
792
793         pfe->eth.eth_priv[id] = priv;
794
795         /* Set the info in the priv to the current info */
796         priv->einfo = &einfo[id];
797         priv->EMAC_baseaddr = cbus_emac_base[id];
798         priv->PHY_baseaddr = cbus_emac_base[id];
799         priv->GPI_baseaddr = cbus_gpi_base[id];
800
801 #define HIF_GEMAC_TMUQ_BASE     6
802         priv->low_tmu_q = HIF_GEMAC_TMUQ_BASE + (id * 2);
803         priv->high_tmu_q = priv->low_tmu_q + 1;
804
805         rte_spinlock_init(&priv->lock);
806
807         /* Copy the station address into the dev structure, */
808         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
809                         ETHER_ADDR_LEN * PFE_MAX_MACS, 0);
810         if (eth_dev->data->mac_addrs == NULL) {
811                 PFE_PMD_ERR("Failed to allocate mem %d to store MAC addresses",
812                         ETHER_ADDR_LEN * PFE_MAX_MACS);
813                 err = -ENOMEM;
814                 goto err0;
815         }
816
817         memcpy(addr.addr_bytes, priv->einfo->mac_addr,
818                        ETH_ALEN);
819
820         pfe_dev_set_mac_addr(eth_dev, &addr);
821         rte_ether_addr_copy(&addr, &eth_dev->data->mac_addrs[0]);
822
823         eth_dev->data->mtu = 1500;
824         eth_dev->dev_ops = &ops;
825         err = pfe_eth_stop(eth_dev);
826         if (err != 0)
827                 goto err0;
828         pfe_gemac_init(priv);
829
830         eth_dev->data->nb_rx_queues = 1;
831         eth_dev->data->nb_tx_queues = 1;
832
833         /* For link status, open the PFE CDEV; Error from this function
834          * is silently ignored; In case of error, the link status will not
835          * be available.
836          */
837         pfe_eth_open_cdev(priv);
838         rte_eth_dev_probing_finish(eth_dev);
839
840         return 0;
841 err0:
842         rte_eth_dev_release_port(eth_dev);
843         return err;
844 }
845
846 static int
847 pfe_get_gemac_if_proprties(struct pfe *pfe,
848                 __rte_unused const struct device_node *parent,
849                 unsigned int port, unsigned int if_cnt,
850                 struct ls1012a_pfe_platform_data *pdata)
851 {
852         const struct device_node *gem = NULL;
853         size_t size;
854         unsigned int ii = 0, phy_id = 0;
855         const u32 *addr;
856         const void *mac_addr;
857
858         for (ii = 0; ii < if_cnt; ii++) {
859                 gem = of_get_next_child(parent, gem);
860                 if (!gem)
861                         goto err;
862                 addr = of_get_property(gem, "reg", &size);
863                 if (addr && (rte_be_to_cpu_32((unsigned int)*addr) == port))
864                         break;
865         }
866
867         if (ii >= if_cnt) {
868                 PFE_PMD_ERR("Failed to find interface = %d", if_cnt);
869                 goto err;
870         }
871
872         pdata->ls1012a_eth_pdata[port].gem_id = port;
873
874         mac_addr = of_get_mac_address(gem);
875
876         if (mac_addr) {
877                 memcpy(pdata->ls1012a_eth_pdata[port].mac_addr, mac_addr,
878                        ETH_ALEN);
879         }
880
881         addr = of_get_property(gem, "fsl,mdio-mux-val", &size);
882         if (!addr) {
883                 PFE_PMD_ERR("Invalid mdio-mux-val....");
884         } else {
885                 phy_id = rte_be_to_cpu_32((unsigned int)*addr);
886                 pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
887         }
888         if (pdata->ls1012a_eth_pdata[port].phy_id < 32)
889                 pfe->mdio_muxval[pdata->ls1012a_eth_pdata[port].phy_id] =
890                          pdata->ls1012a_eth_pdata[port].mdio_muxval;
891
892         return 0;
893
894 err:
895         return -1;
896 }
897
898 /* Parse integer from integer argument */
899 static int
900 parse_integer_arg(const char *key __rte_unused,
901                 const char *value, void *extra_args)
902 {
903         int i;
904         char *end;
905         errno = 0;
906
907         i = strtol(value, &end, 10);
908         if (*end != 0 || errno != 0 || i < 0 || i > 1) {
909                 PFE_PMD_ERR("Supported Port IDS are 0 and 1");
910                 return -EINVAL;
911         }
912
913         *((uint32_t *)extra_args) = i;
914
915         return 0;
916 }
917
918 static int
919 pfe_parse_vdev_init_params(struct pfe_vdev_init_params *params,
920                            struct rte_vdev_device *dev)
921 {
922         struct rte_kvargs *kvlist = NULL;
923         int ret = 0;
924
925         static const char * const pfe_vdev_valid_params[] = {
926                 PFE_VDEV_GEM_ID_ARG,
927                 NULL
928         };
929
930         const char *input_args = rte_vdev_device_args(dev);
931
932         if (!input_args)
933                 return -1;
934
935         kvlist = rte_kvargs_parse(input_args, pfe_vdev_valid_params);
936         if (kvlist == NULL)
937                 return -1;
938
939         ret = rte_kvargs_process(kvlist,
940                                 PFE_VDEV_GEM_ID_ARG,
941                                 &parse_integer_arg,
942                                 &params->gem_id);
943         rte_kvargs_free(kvlist);
944         return ret;
945 }
946
947 static int
948 pmd_pfe_probe(struct rte_vdev_device *vdev)
949 {
950         const u32 *prop;
951         const struct device_node *np;
952         const char *name;
953         const uint32_t *addr;
954         uint64_t cbus_addr, ddr_size, cbus_size;
955         int rc = -1, fd = -1, gem_id;
956         unsigned int ii, interface_count = 0;
957         size_t size = 0;
958         struct pfe_vdev_init_params init_params = {
959                 .gem_id = -1
960         };
961
962         name = rte_vdev_device_name(vdev);
963         rc = pfe_parse_vdev_init_params(&init_params, vdev);
964         if (rc < 0)
965                 return -EINVAL;
966
967         PFE_PMD_LOG(INFO, "Initializing pmd_pfe for %s Given gem-id %d",
968                 name, init_params.gem_id);
969
970         if (g_pfe) {
971                 if (g_pfe->nb_devs >= g_pfe->max_intf) {
972                         PFE_PMD_ERR("PFE %d dev already created Max is %d",
973                                 g_pfe->nb_devs, g_pfe->max_intf);
974                         return -EINVAL;
975                 }
976                 goto eth_init;
977         }
978
979         g_pfe = rte_zmalloc(NULL, sizeof(*g_pfe), RTE_CACHE_LINE_SIZE);
980         if (g_pfe == NULL)
981                 return  -EINVAL;
982
983         /* Load the device-tree driver */
984         rc = of_init();
985         if (rc) {
986                 PFE_PMD_ERR("of_init failed with ret: %d", rc);
987                 goto err;
988         }
989
990         np = of_find_compatible_node(NULL, NULL, "fsl,pfe");
991         if (!np) {
992                 PFE_PMD_ERR("Invalid device node");
993                 rc = -EINVAL;
994                 goto err;
995         }
996
997         addr = of_get_address(np, 0, &cbus_size, NULL);
998         if (!addr) {
999                 PFE_PMD_ERR("of_get_address cannot return qman address\n");
1000                 goto err;
1001         }
1002         cbus_addr = of_translate_address(np, addr);
1003         if (!cbus_addr) {
1004                 PFE_PMD_ERR("of_translate_address failed\n");
1005                 goto err;
1006         }
1007
1008         addr = of_get_address(np, 1, &ddr_size, NULL);
1009         if (!addr) {
1010                 PFE_PMD_ERR("of_get_address cannot return qman address\n");
1011                 goto err;
1012         }
1013
1014         g_pfe->ddr_phys_baseaddr = of_translate_address(np, addr);
1015         if (!g_pfe->ddr_phys_baseaddr) {
1016                 PFE_PMD_ERR("of_translate_address failed\n");
1017                 goto err;
1018         }
1019
1020         g_pfe->ddr_baseaddr = pfe_mem_ptov(g_pfe->ddr_phys_baseaddr);
1021         g_pfe->ddr_size = ddr_size;
1022         g_pfe->cbus_size = cbus_size;
1023
1024         fd = open("/dev/mem", O_RDWR);
1025         g_pfe->cbus_baseaddr = mmap(NULL, cbus_size, PROT_READ | PROT_WRITE,
1026                                         MAP_SHARED, fd, cbus_addr);
1027         close(fd);
1028         if (g_pfe->cbus_baseaddr == MAP_FAILED) {
1029                 PFE_PMD_ERR("Can not map cbus base");
1030                 rc = -EINVAL;
1031                 goto err;
1032         }
1033
1034         /* Read interface count */
1035         prop = of_get_property(np, "fsl,pfe-num-interfaces", &size);
1036         if (!prop) {
1037                 PFE_PMD_ERR("Failed to read number of interfaces");
1038                 rc = -ENXIO;
1039                 goto err_prop;
1040         }
1041
1042         interface_count = rte_be_to_cpu_32((unsigned int)*prop);
1043         if (interface_count <= 0) {
1044                 PFE_PMD_ERR("No ethernet interface count : %d",
1045                                 interface_count);
1046                 rc = -ENXIO;
1047                 goto err_prop;
1048         }
1049         PFE_PMD_INFO("num interfaces = %d ", interface_count);
1050
1051         g_pfe->max_intf  = interface_count;
1052         g_pfe->platform_data.ls1012a_mdio_pdata[0].phy_mask = 0xffffffff;
1053
1054         for (ii = 0; ii < interface_count; ii++) {
1055                 pfe_get_gemac_if_proprties(g_pfe, np, ii, interface_count,
1056                                            &g_pfe->platform_data);
1057         }
1058
1059         pfe_lib_init(g_pfe->cbus_baseaddr, g_pfe->ddr_baseaddr,
1060                      g_pfe->ddr_phys_baseaddr, g_pfe->ddr_size);
1061
1062         PFE_PMD_INFO("CLASS version: %x", readl(CLASS_VERSION));
1063         PFE_PMD_INFO("TMU version: %x", readl(TMU_VERSION));
1064
1065         PFE_PMD_INFO("BMU1 version: %x", readl(BMU1_BASE_ADDR + BMU_VERSION));
1066         PFE_PMD_INFO("BMU2 version: %x", readl(BMU2_BASE_ADDR + BMU_VERSION));
1067
1068         PFE_PMD_INFO("EGPI1 version: %x", readl(EGPI1_BASE_ADDR + GPI_VERSION));
1069         PFE_PMD_INFO("EGPI2 version: %x", readl(EGPI2_BASE_ADDR + GPI_VERSION));
1070         PFE_PMD_INFO("HGPI version: %x", readl(HGPI_BASE_ADDR + GPI_VERSION));
1071
1072         PFE_PMD_INFO("HIF version: %x", readl(HIF_VERSION));
1073         PFE_PMD_INFO("HIF NOPCY version: %x", readl(HIF_NOCPY_VERSION));
1074
1075         cbus_emac_base[0] = EMAC1_BASE_ADDR;
1076         cbus_emac_base[1] = EMAC2_BASE_ADDR;
1077
1078         cbus_gpi_base[0] = EGPI1_BASE_ADDR;
1079         cbus_gpi_base[1] = EGPI2_BASE_ADDR;
1080
1081         rc = pfe_hif_lib_init(g_pfe);
1082         if (rc < 0)
1083                 goto err_hif_lib;
1084
1085         rc = pfe_hif_init(g_pfe);
1086         if (rc < 0)
1087                 goto err_hif;
1088         pfe_soc_version_get();
1089 eth_init:
1090         if (init_params.gem_id < 0)
1091                 gem_id = g_pfe->nb_devs;
1092         else
1093                 gem_id = init_params.gem_id;
1094
1095         PFE_PMD_LOG(INFO, "Init pmd_pfe for %s gem-id %d(given =%d)",
1096                 name, gem_id, init_params.gem_id);
1097
1098         rc = pfe_eth_init(vdev, g_pfe, gem_id);
1099         if (rc < 0)
1100                 goto err_eth;
1101         else
1102                 g_pfe->nb_devs++;
1103
1104         return 0;
1105
1106 err_eth:
1107         pfe_hif_exit(g_pfe);
1108
1109 err_hif:
1110         pfe_hif_lib_exit(g_pfe);
1111
1112 err_hif_lib:
1113 err_prop:
1114         munmap(g_pfe->cbus_baseaddr, cbus_size);
1115 err:
1116         rte_free(g_pfe);
1117         return rc;
1118 }
1119
1120 static int
1121 pmd_pfe_remove(struct rte_vdev_device *vdev)
1122 {
1123         const char *name;
1124         struct rte_eth_dev *eth_dev = NULL;
1125         int ret = 0;
1126
1127         name = rte_vdev_device_name(vdev);
1128         if (name == NULL)
1129                 return -EINVAL;
1130
1131         PFE_PMD_INFO("Closing eventdev sw device %s", name);
1132
1133         if (!g_pfe)
1134                 return 0;
1135
1136         eth_dev = rte_eth_dev_allocated(name);
1137         if (eth_dev) {
1138                 pfe_eth_close(eth_dev);
1139                 ret = rte_eth_dev_release_port(eth_dev);
1140         }
1141
1142         return ret;
1143 }
1144
1145 static
1146 struct rte_vdev_driver pmd_pfe_drv = {
1147         .probe = pmd_pfe_probe,
1148         .remove = pmd_pfe_remove,
1149 };
1150
1151 RTE_PMD_REGISTER_VDEV(PFE_NAME_PMD, pmd_pfe_drv);
1152 RTE_PMD_REGISTER_PARAM_STRING(PFE_NAME_PMD, PFE_VDEV_GEM_ID_ARG "=<int> ");
1153 RTE_LOG_REGISTER_DEFAULT(pfe_logtype_pmd, NOTICE);