1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018-2019 NXP
7 #include <rte_kvargs.h>
8 #include <ethdev_vdev.h>
9 #include <rte_bus_vdev.h>
10 #include <rte_ether.h>
16 #define PFE_MAX_MACS 1 /* we can support up to 4 MACs per IF */
17 #define PFE_VDEV_GEM_ID_ARG "intf"
19 struct pfe_vdev_init_params {
22 static struct pfe *g_pfe;
23 /* Supported Rx offloads */
24 static uint64_t dev_rx_offloads_sup =
25 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
26 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
27 RTE_ETH_RX_OFFLOAD_TCP_CKSUM;
29 /* Supported Tx offloads */
30 static uint64_t dev_tx_offloads_sup =
31 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
32 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
33 RTE_ETH_TX_OFFLOAD_TCP_CKSUM;
35 /* TODO: make pfe_svr a runtime option.
36 * Driver should be able to get the SVR
37 * information from HW.
39 unsigned int pfe_svr = SVR_LS1012A_REV1;
40 static void *cbus_emac_base[3];
41 static void *cbus_gpi_base[3];
46 pfe_gemac_init(struct pfe_eth_priv_s *priv)
50 cfg.speed = SPEED_1000M;
51 cfg.duplex = DUPLEX_FULL;
53 gemac_set_config(priv->EMAC_baseaddr, &cfg);
54 gemac_allow_broadcast(priv->EMAC_baseaddr);
55 gemac_enable_1536_rx(priv->EMAC_baseaddr);
56 gemac_enable_stacked_vlan(priv->EMAC_baseaddr);
57 gemac_enable_pause_rx(priv->EMAC_baseaddr);
58 gemac_set_bus_width(priv->EMAC_baseaddr, 64);
59 gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
65 pfe_soc_version_get(void)
67 FILE *svr_file = NULL;
68 unsigned int svr_ver = 0;
70 PMD_INIT_FUNC_TRACE();
72 svr_file = fopen(PFE_SOC_ID_FILE, "r");
74 PFE_PMD_ERR("Unable to open SoC device");
75 return; /* Not supported on this infra */
78 if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
81 PFE_PMD_ERR("Unable to read SoC device");
86 static int pfe_eth_start(struct pfe_eth_priv_s *priv)
88 gpi_enable(priv->GPI_baseaddr);
89 gemac_enable(priv->EMAC_baseaddr);
95 pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
96 __rte_unused from_tx, __rte_unused int n_desc)
98 struct rte_mbuf *mbuf;
101 /* Clean HIF and client queue */
102 while ((mbuf = hif_lib_tx_get_next_complete(&priv->client,
108 rte_pktmbuf_free(mbuf);
115 pfe_eth_flush_tx(struct pfe_eth_priv_s *priv)
119 for (ii = 0; ii < emac_txq_cnt; ii++)
120 pfe_eth_flush_txQ(priv, ii, 0, 0);
124 pfe_eth_event_handler(void *data, int event, __rte_unused int qno)
126 struct pfe_eth_priv_s *priv = data;
129 case EVENT_TXDONE_IND:
130 pfe_eth_flush_tx(priv);
131 hif_lib_event_handler_start(&priv->client, EVENT_TXDONE_IND, 0);
133 case EVENT_HIGH_RX_WM:
142 pfe_recv_pkts_on_intr(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
144 struct hif_client_rx_queue *queue = rxq;
145 struct pfe_eth_priv_s *priv = queue->priv;
146 struct epoll_event epoll_ev;
147 uint64_t ticks = 1; /* 1 msec */
149 int have_something, work_done;
151 #define RESET_STATUS (HIF_INT | HIF_RXPKT_INT)
153 /*TODO can we remove this cleanup from here?*/
154 pfe_tx_do_cleanup(priv->pfe);
155 have_something = pfe_hif_rx_process(priv->pfe, nb_pkts);
156 work_done = hif_lib_receive_pkt(rxq, priv->pfe->hif.shm->pool,
159 if (!have_something || !work_done) {
160 writel(RESET_STATUS, HIF_INT_SRC);
161 writel(readl(HIF_INT_ENABLE) | HIF_RXPKT_INT, HIF_INT_ENABLE);
162 ret = epoll_wait(priv->pfe->hif.epoll_fd, &epoll_ev, 1, ticks);
163 if (ret < 0 && errno != EINTR)
164 PFE_PMD_ERR("epoll_wait fails with %d\n", errno);
171 pfe_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
173 struct hif_client_rx_queue *queue = rxq;
174 struct pfe_eth_priv_s *priv = queue->priv;
175 struct rte_mempool *pool;
177 /*TODO can we remove this cleanup from here?*/
178 pfe_tx_do_cleanup(priv->pfe);
179 pfe_hif_rx_process(priv->pfe, nb_pkts);
180 pool = priv->pfe->hif.shm->pool;
182 return hif_lib_receive_pkt(rxq, pool, rx_pkts, nb_pkts);
186 pfe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
188 struct hif_client_tx_queue *queue = tx_queue;
189 struct pfe_eth_priv_s *priv = queue->priv;
190 struct rte_eth_stats *stats = &priv->stats;
193 for (i = 0; i < nb_pkts; i++) {
194 if (tx_pkts[i]->nb_segs > 1) {
195 struct rte_mbuf *mbuf;
198 hif_lib_xmit_pkt(&priv->client, queue->queue_id,
199 (void *)(size_t)rte_pktmbuf_iova(tx_pkts[i]),
200 tx_pkts[i]->buf_addr + tx_pkts[i]->data_off,
201 tx_pkts[i]->data_len, 0x0, HIF_FIRST_BUFFER,
204 mbuf = tx_pkts[i]->next;
205 for (j = 0; j < (tx_pkts[i]->nb_segs - 2); j++) {
206 hif_lib_xmit_pkt(&priv->client, queue->queue_id,
207 (void *)(size_t)rte_pktmbuf_iova(mbuf),
208 mbuf->buf_addr + mbuf->data_off,
214 hif_lib_xmit_pkt(&priv->client, queue->queue_id,
215 (void *)(size_t)rte_pktmbuf_iova(mbuf),
216 mbuf->buf_addr + mbuf->data_off,
218 0x0, HIF_LAST_BUFFER | HIF_DATA_VALID,
221 hif_lib_xmit_pkt(&priv->client, queue->queue_id,
222 (void *)(size_t)rte_pktmbuf_iova(tx_pkts[i]),
223 tx_pkts[i]->buf_addr + tx_pkts[i]->data_off,
224 tx_pkts[i]->pkt_len, 0 /*ctrl*/,
225 HIF_FIRST_BUFFER | HIF_LAST_BUFFER |
229 stats->obytes += tx_pkts[i]->pkt_len;
232 stats->opackets += nb_pkts;
233 pfe_tx_do_cleanup(priv->pfe);
239 pfe_dummy_xmit_pkts(__rte_unused void *tx_queue,
240 __rte_unused struct rte_mbuf **tx_pkts,
241 __rte_unused uint16_t nb_pkts)
247 pfe_dummy_recv_pkts(__rte_unused void *rxq,
248 __rte_unused struct rte_mbuf **rx_pkts,
249 __rte_unused uint16_t nb_pkts)
255 pfe_eth_open(struct rte_eth_dev *dev)
257 struct pfe_eth_priv_s *priv = dev->data->dev_private;
258 struct hif_client_s *client;
259 struct hif_shm *hif_shm;
262 /* Register client driver with HIF */
263 client = &priv->client;
266 hif_shm = client->pfe->hif.shm;
267 /* TODO please remove the below code of if block, once we add
268 * the proper cleanup in eth_close
270 if (!test_bit(PFE_CL_GEM0 + priv->id,
271 &hif_shm->g_client_status[0])) {
272 /* Register client driver with HIF */
273 memset(client, 0, sizeof(*client));
274 client->id = PFE_CL_GEM0 + priv->id;
275 client->tx_qn = emac_txq_cnt;
276 client->rx_qn = EMAC_RXQ_CNT;
278 client->pfe = priv->pfe;
279 client->port_id = dev->data->port_id;
280 client->event_handler = pfe_eth_event_handler;
282 client->tx_qsize = EMAC_TXQ_DEPTH;
283 client->rx_qsize = EMAC_RXQ_DEPTH;
285 rc = hif_lib_client_register(client);
287 PFE_PMD_ERR("hif_lib_client_register(%d)"
288 " failed", client->id);
292 /* Freeing the packets if already exists */
294 struct rte_mbuf *rx_pkts[32];
295 /* TODO multiqueue support */
296 ret = hif_lib_receive_pkt(&client->rx_q[0],
297 hif_shm->pool, rx_pkts, 32);
300 for (i = 0; i < ret; i++)
301 rte_pktmbuf_free(rx_pkts[i]);
302 ret = hif_lib_receive_pkt(&client->rx_q[0],
308 /* Register client driver with HIF */
309 memset(client, 0, sizeof(*client));
310 client->id = PFE_CL_GEM0 + priv->id;
311 client->tx_qn = emac_txq_cnt;
312 client->rx_qn = EMAC_RXQ_CNT;
314 client->pfe = priv->pfe;
315 client->port_id = dev->data->port_id;
316 client->event_handler = pfe_eth_event_handler;
318 client->tx_qsize = EMAC_TXQ_DEPTH;
319 client->rx_qsize = EMAC_RXQ_DEPTH;
321 rc = hif_lib_client_register(client);
323 PFE_PMD_ERR("hif_lib_client_register(%d) failed",
328 rc = pfe_eth_start(priv);
329 dev->rx_pkt_burst = &pfe_recv_pkts;
330 dev->tx_pkt_burst = &pfe_xmit_pkts;
331 /* If no prefetch is configured. */
332 if (getenv("PFE_INTR_SUPPORT")) {
333 dev->rx_pkt_burst = &pfe_recv_pkts_on_intr;
334 PFE_PMD_INFO("PFE INTERRUPT Mode enabled");
343 pfe_eth_open_cdev(struct pfe_eth_priv_s *priv)
350 pfe_cdev_fd = open(PFE_CDEV_PATH, O_RDONLY);
351 if (pfe_cdev_fd < 0) {
352 PFE_PMD_WARN("Unable to open PFE device file (%s).\n",
354 PFE_PMD_WARN("Link status update will not be available.\n");
355 priv->link_fd = PFE_CDEV_INVALID_FD;
359 priv->link_fd = pfe_cdev_fd;
365 pfe_eth_close_cdev(struct pfe_eth_priv_s *priv)
370 if (priv->link_fd != PFE_CDEV_INVALID_FD) {
371 close(priv->link_fd);
372 priv->link_fd = PFE_CDEV_INVALID_FD;
377 pfe_eth_stop(struct rte_eth_dev *dev/*, int wake*/)
379 struct pfe_eth_priv_s *priv = dev->data->dev_private;
381 dev->data->dev_started = 0;
383 gemac_disable(priv->EMAC_baseaddr);
384 gpi_disable(priv->GPI_baseaddr);
386 dev->rx_pkt_burst = &pfe_dummy_recv_pkts;
387 dev->tx_pkt_burst = &pfe_dummy_xmit_pkts;
393 pfe_eth_close(struct rte_eth_dev *dev)
396 PMD_INIT_FUNC_TRACE();
404 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
407 ret = pfe_eth_stop(dev);
408 /* Close the device file for link status */
409 pfe_eth_close_cdev(dev->data->dev_private);
411 munmap(g_pfe->cbus_baseaddr, g_pfe->cbus_size);
414 if (g_pfe->nb_devs == 0) {
416 pfe_hif_lib_exit(g_pfe);
425 pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)
431 pfe_eth_info(struct rte_eth_dev *dev,
432 struct rte_eth_dev_info *dev_info)
434 dev_info->max_mac_addrs = PFE_MAX_MACS;
435 dev_info->max_rx_queues = dev->data->nb_rx_queues;
436 dev_info->max_tx_queues = dev->data->nb_tx_queues;
437 dev_info->min_rx_bufsize = HIF_RX_PKT_MIN_SIZE;
438 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
439 dev_info->rx_offload_capa = dev_rx_offloads_sup;
440 dev_info->tx_offload_capa = dev_tx_offloads_sup;
441 if (pfe_svr == SVR_LS1012A_REV1) {
442 dev_info->max_rx_pktlen = MAX_MTU_ON_REV1 + PFE_ETH_OVERHEAD;
443 dev_info->max_mtu = MAX_MTU_ON_REV1;
445 dev_info->max_rx_pktlen = JUMBO_FRAME_SIZE;
446 dev_info->max_mtu = JUMBO_FRAME_SIZE - PFE_ETH_OVERHEAD;
452 /* Only first mb_pool given on first call of this API will be used
453 * in whole system, also nb_rx_desc and rx_conf are unused params
456 pfe_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
457 __rte_unused uint16_t nb_rx_desc,
458 __rte_unused unsigned int socket_id,
459 __rte_unused const struct rte_eth_rxconf *rx_conf,
460 struct rte_mempool *mb_pool)
464 struct pfe_eth_priv_s *priv = dev->data->dev_private;
468 if (queue_idx >= EMAC_RXQ_CNT) {
469 PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
470 queue_idx, EMAC_RXQ_CNT);
474 if (!pfe->hif.setuped) {
475 rc = pfe_hif_shm_init(pfe->hif.shm, mb_pool);
477 PFE_PMD_ERR("Could not allocate buffer descriptors");
481 pfe->hif.shm->pool = mb_pool;
482 if (pfe_hif_init_buffers(&pfe->hif)) {
483 PFE_PMD_ERR("Could not initialize buffer descriptors");
489 pfe->hif.setuped = 1;
491 dev->data->rx_queues[queue_idx] = &priv->client.rx_q[queue_idx];
492 priv->client.rx_q[queue_idx].queue_id = queue_idx;
498 pfe_tx_queue_setup(struct rte_eth_dev *dev,
500 __rte_unused uint16_t nb_desc,
501 __rte_unused unsigned int socket_id,
502 __rte_unused const struct rte_eth_txconf *tx_conf)
504 struct pfe_eth_priv_s *priv = dev->data->dev_private;
506 if (queue_idx >= emac_txq_cnt) {
507 PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
508 queue_idx, emac_txq_cnt);
511 dev->data->tx_queues[queue_idx] = &priv->client.tx_q[queue_idx];
512 priv->client.tx_q[queue_idx].queue_id = queue_idx;
516 static const uint32_t *
517 pfe_supported_ptypes_get(struct rte_eth_dev *dev)
519 static const uint32_t ptypes[] = {
520 /*todo -= add more types */
523 RTE_PTYPE_L3_IPV4_EXT,
525 RTE_PTYPE_L3_IPV6_EXT,
531 if (dev->rx_pkt_burst == pfe_recv_pkts ||
532 dev->rx_pkt_burst == pfe_recv_pkts_on_intr)
538 pfe_eth_atomic_read_link_status(struct rte_eth_dev *dev,
539 struct rte_eth_link *link)
541 struct rte_eth_link *dst = link;
542 struct rte_eth_link *src = &dev->data->dev_link;
544 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
545 *(uint64_t *)src) == 0)
552 pfe_eth_atomic_write_link_status(struct rte_eth_dev *dev,
553 struct rte_eth_link *link)
555 struct rte_eth_link *dst = &dev->data->dev_link;
556 struct rte_eth_link *src = link;
558 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
559 *(uint64_t *)src) == 0)
566 pfe_eth_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
568 int ret, ioctl_cmd = 0;
569 struct pfe_eth_priv_s *priv = dev->data->dev_private;
570 struct rte_eth_link link, old;
571 unsigned int lstatus = 1;
573 memset(&old, 0, sizeof(old));
574 memset(&link, 0, sizeof(struct rte_eth_link));
576 pfe_eth_atomic_read_link_status(dev, &old);
578 /* Read from PFE CDEV, status of link, if file was successfully
581 if (priv->link_fd != PFE_CDEV_INVALID_FD) {
583 ioctl_cmd = PFE_CDEV_ETH0_STATE_GET;
585 ioctl_cmd = PFE_CDEV_ETH1_STATE_GET;
587 ret = ioctl(priv->link_fd, ioctl_cmd, &lstatus);
589 PFE_PMD_ERR("Unable to fetch link status (ioctl)\n");
590 /* use dummy link value */
591 link.link_status = 1;
593 PFE_PMD_DEBUG("Fetched link state (%d) for dev %d.\n",
597 if (old.link_status == lstatus) {
598 /* no change in status */
599 PFE_PMD_DEBUG("No change in link status; Not updating.\n");
603 link.link_status = lstatus;
604 link.link_speed = RTE_ETH_LINK_SPEED_1G;
605 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
606 link.link_autoneg = RTE_ETH_LINK_AUTONEG;
608 pfe_eth_atomic_write_link_status(dev, &link);
610 PFE_PMD_INFO("Port (%d) link is %s\n", dev->data->port_id,
611 link.link_status ? "up" : "down");
617 pfe_promiscuous_enable(struct rte_eth_dev *dev)
619 struct pfe_eth_priv_s *priv = dev->data->dev_private;
622 dev->data->promiscuous = 1;
623 gemac_enable_copy_all(priv->EMAC_baseaddr);
629 pfe_promiscuous_disable(struct rte_eth_dev *dev)
631 struct pfe_eth_priv_s *priv = dev->data->dev_private;
634 dev->data->promiscuous = 0;
635 gemac_disable_copy_all(priv->EMAC_baseaddr);
641 pfe_allmulticast_enable(struct rte_eth_dev *dev)
643 struct pfe_eth_priv_s *priv = dev->data->dev_private;
644 struct pfe_mac_addr hash_addr; /* hash register structure */
646 /* Set the hash to rx all multicast frames */
647 hash_addr.bottom = 0xFFFFFFFF;
648 hash_addr.top = 0xFFFFFFFF;
649 gemac_set_hash(priv->EMAC_baseaddr, &hash_addr);
650 dev->data->all_multicast = 1;
656 pfe_link_down(struct rte_eth_dev *dev)
658 return pfe_eth_stop(dev);
662 pfe_link_up(struct rte_eth_dev *dev)
664 struct pfe_eth_priv_s *priv = dev->data->dev_private;
671 pfe_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
673 struct pfe_eth_priv_s *priv = dev->data->dev_private;
674 uint16_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
676 /*TODO Support VLAN*/
677 return gemac_set_rx(priv->EMAC_baseaddr, frame_size);
680 /* pfe_eth_enet_addr_byte_mac
683 pfe_eth_enet_addr_byte_mac(u8 *enet_byte_addr,
684 struct pfe_mac_addr *enet_addr)
686 if (!enet_byte_addr || !enet_addr) {
690 enet_addr->bottom = enet_byte_addr[0] |
691 (enet_byte_addr[1] << 8) |
692 (enet_byte_addr[2] << 16) |
693 (enet_byte_addr[3] << 24);
694 enet_addr->top = enet_byte_addr[4] |
695 (enet_byte_addr[5] << 8);
701 pfe_dev_set_mac_addr(struct rte_eth_dev *dev,
702 struct rte_ether_addr *addr)
704 struct pfe_eth_priv_s *priv = dev->data->dev_private;
705 struct pfe_mac_addr spec_addr;
708 ret = pfe_eth_enet_addr_byte_mac(addr->addr_bytes, &spec_addr);
712 gemac_set_laddrN(priv->EMAC_baseaddr,
713 (struct pfe_mac_addr *)&spec_addr, 1);
714 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
719 pfe_stats_get(struct rte_eth_dev *dev,
720 struct rte_eth_stats *stats)
722 struct pfe_eth_priv_s *priv = dev->data->dev_private;
723 struct rte_eth_stats *eth_stats = &priv->stats;
728 memset(stats, 0, sizeof(struct rte_eth_stats));
730 stats->ipackets = eth_stats->ipackets;
731 stats->ibytes = eth_stats->ibytes;
732 stats->opackets = eth_stats->opackets;
733 stats->obytes = eth_stats->obytes;
738 static const struct eth_dev_ops ops = {
739 .dev_start = pfe_eth_open,
740 .dev_stop = pfe_eth_stop,
741 .dev_close = pfe_eth_close,
742 .dev_configure = pfe_eth_configure,
743 .dev_infos_get = pfe_eth_info,
744 .rx_queue_setup = pfe_rx_queue_setup,
745 .tx_queue_setup = pfe_tx_queue_setup,
746 .dev_supported_ptypes_get = pfe_supported_ptypes_get,
747 .link_update = pfe_eth_link_update,
748 .promiscuous_enable = pfe_promiscuous_enable,
749 .promiscuous_disable = pfe_promiscuous_disable,
750 .allmulticast_enable = pfe_allmulticast_enable,
751 .dev_set_link_down = pfe_link_down,
752 .dev_set_link_up = pfe_link_up,
753 .mtu_set = pfe_mtu_set,
754 .mac_addr_set = pfe_dev_set_mac_addr,
755 .stats_get = pfe_stats_get,
759 pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id)
761 struct rte_eth_dev *eth_dev = NULL;
762 struct pfe_eth_priv_s *priv = NULL;
763 struct ls1012a_eth_platform_data *einfo;
764 struct ls1012a_pfe_platform_data *pfe_info;
765 struct rte_ether_addr addr;
768 eth_dev = rte_eth_vdev_allocate(vdev, sizeof(*priv));
772 /* Extract pltform data */
773 pfe_info = (struct ls1012a_pfe_platform_data *)&pfe->platform_data;
775 PFE_PMD_ERR("pfe missing additional platform data");
780 einfo = (struct ls1012a_eth_platform_data *)pfe_info->ls1012a_eth_pdata;
782 /* einfo never be NULL, but no harm in having this check */
784 PFE_PMD_ERR("pfe missing additional gemacs platform data");
789 priv = eth_dev->data->dev_private;
790 priv->ndev = eth_dev;
791 priv->id = einfo[id].gem_id;
794 pfe->eth.eth_priv[id] = priv;
796 /* Set the info in the priv to the current info */
797 priv->einfo = &einfo[id];
798 priv->EMAC_baseaddr = cbus_emac_base[id];
799 priv->PHY_baseaddr = cbus_emac_base[id];
800 priv->GPI_baseaddr = cbus_gpi_base[id];
802 #define HIF_GEMAC_TMUQ_BASE 6
803 priv->low_tmu_q = HIF_GEMAC_TMUQ_BASE + (id * 2);
804 priv->high_tmu_q = priv->low_tmu_q + 1;
806 rte_spinlock_init(&priv->lock);
808 /* Copy the station address into the dev structure, */
809 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
810 ETHER_ADDR_LEN * PFE_MAX_MACS, 0);
811 if (eth_dev->data->mac_addrs == NULL) {
812 PFE_PMD_ERR("Failed to allocate mem %d to store MAC addresses",
813 ETHER_ADDR_LEN * PFE_MAX_MACS);
818 memcpy(addr.addr_bytes, priv->einfo->mac_addr,
821 pfe_dev_set_mac_addr(eth_dev, &addr);
822 rte_ether_addr_copy(&addr, ð_dev->data->mac_addrs[0]);
824 eth_dev->data->mtu = 1500;
825 eth_dev->dev_ops = &ops;
826 err = pfe_eth_stop(eth_dev);
829 pfe_gemac_init(priv);
831 eth_dev->data->nb_rx_queues = 1;
832 eth_dev->data->nb_tx_queues = 1;
834 /* For link status, open the PFE CDEV; Error from this function
835 * is silently ignored; In case of error, the link status will not
838 pfe_eth_open_cdev(priv);
839 rte_eth_dev_probing_finish(eth_dev);
843 rte_eth_dev_release_port(eth_dev);
848 pfe_get_gemac_if_proprties(struct pfe *pfe,
849 __rte_unused const struct device_node *parent,
850 unsigned int port, unsigned int if_cnt,
851 struct ls1012a_pfe_platform_data *pdata)
853 const struct device_node *gem = NULL;
855 unsigned int ii = 0, phy_id = 0;
857 const void *mac_addr;
859 for (ii = 0; ii < if_cnt; ii++) {
860 gem = of_get_next_child(parent, gem);
863 addr = of_get_property(gem, "reg", &size);
864 if (addr && (rte_be_to_cpu_32((unsigned int)*addr) == port))
869 PFE_PMD_ERR("Failed to find interface = %d", if_cnt);
873 pdata->ls1012a_eth_pdata[port].gem_id = port;
875 mac_addr = of_get_mac_address(gem);
878 memcpy(pdata->ls1012a_eth_pdata[port].mac_addr, mac_addr,
882 addr = of_get_property(gem, "fsl,mdio-mux-val", &size);
884 PFE_PMD_ERR("Invalid mdio-mux-val....");
886 phy_id = rte_be_to_cpu_32((unsigned int)*addr);
887 pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
889 if (pdata->ls1012a_eth_pdata[port].phy_id < 32)
890 pfe->mdio_muxval[pdata->ls1012a_eth_pdata[port].phy_id] =
891 pdata->ls1012a_eth_pdata[port].mdio_muxval;
899 /* Parse integer from integer argument */
901 parse_integer_arg(const char *key __rte_unused,
902 const char *value, void *extra_args)
908 i = strtol(value, &end, 10);
909 if (*end != 0 || errno != 0 || i < 0 || i > 1) {
910 PFE_PMD_ERR("Supported Port IDS are 0 and 1");
914 *((uint32_t *)extra_args) = i;
920 pfe_parse_vdev_init_params(struct pfe_vdev_init_params *params,
921 struct rte_vdev_device *dev)
923 struct rte_kvargs *kvlist = NULL;
926 static const char * const pfe_vdev_valid_params[] = {
931 const char *input_args = rte_vdev_device_args(dev);
936 kvlist = rte_kvargs_parse(input_args, pfe_vdev_valid_params);
940 ret = rte_kvargs_process(kvlist,
944 rte_kvargs_free(kvlist);
949 pmd_pfe_probe(struct rte_vdev_device *vdev)
952 const struct device_node *np;
954 const uint32_t *addr;
955 uint64_t cbus_addr, ddr_size, cbus_size;
956 int rc = -1, fd = -1, gem_id;
957 unsigned int ii, interface_count = 0;
959 struct pfe_vdev_init_params init_params = {
963 name = rte_vdev_device_name(vdev);
964 rc = pfe_parse_vdev_init_params(&init_params, vdev);
968 PFE_PMD_LOG(INFO, "Initializing pmd_pfe for %s Given gem-id %d",
969 name, init_params.gem_id);
972 if (g_pfe->nb_devs >= g_pfe->max_intf) {
973 PFE_PMD_ERR("PFE %d dev already created Max is %d",
974 g_pfe->nb_devs, g_pfe->max_intf);
980 g_pfe = rte_zmalloc(NULL, sizeof(*g_pfe), RTE_CACHE_LINE_SIZE);
984 /* Load the device-tree driver */
987 PFE_PMD_ERR("of_init failed with ret: %d", rc);
991 np = of_find_compatible_node(NULL, NULL, "fsl,pfe");
993 PFE_PMD_ERR("Invalid device node");
998 addr = of_get_address(np, 0, &cbus_size, NULL);
1000 PFE_PMD_ERR("of_get_address cannot return qman address\n");
1003 cbus_addr = of_translate_address(np, addr);
1005 PFE_PMD_ERR("of_translate_address failed\n");
1009 addr = of_get_address(np, 1, &ddr_size, NULL);
1011 PFE_PMD_ERR("of_get_address cannot return qman address\n");
1015 g_pfe->ddr_phys_baseaddr = of_translate_address(np, addr);
1016 if (!g_pfe->ddr_phys_baseaddr) {
1017 PFE_PMD_ERR("of_translate_address failed\n");
1021 g_pfe->ddr_baseaddr = pfe_mem_ptov(g_pfe->ddr_phys_baseaddr);
1022 g_pfe->ddr_size = ddr_size;
1023 g_pfe->cbus_size = cbus_size;
1025 fd = open("/dev/mem", O_RDWR);
1026 g_pfe->cbus_baseaddr = mmap(NULL, cbus_size, PROT_READ | PROT_WRITE,
1027 MAP_SHARED, fd, cbus_addr);
1029 if (g_pfe->cbus_baseaddr == MAP_FAILED) {
1030 PFE_PMD_ERR("Can not map cbus base");
1035 /* Read interface count */
1036 prop = of_get_property(np, "fsl,pfe-num-interfaces", &size);
1038 PFE_PMD_ERR("Failed to read number of interfaces");
1043 interface_count = rte_be_to_cpu_32((unsigned int)*prop);
1044 if (interface_count <= 0) {
1045 PFE_PMD_ERR("No ethernet interface count : %d",
1050 PFE_PMD_INFO("num interfaces = %d ", interface_count);
1052 g_pfe->max_intf = interface_count;
1053 g_pfe->platform_data.ls1012a_mdio_pdata[0].phy_mask = 0xffffffff;
1055 for (ii = 0; ii < interface_count; ii++) {
1056 pfe_get_gemac_if_proprties(g_pfe, np, ii, interface_count,
1057 &g_pfe->platform_data);
1060 pfe_lib_init(g_pfe->cbus_baseaddr, g_pfe->ddr_baseaddr,
1061 g_pfe->ddr_phys_baseaddr, g_pfe->ddr_size);
1063 PFE_PMD_INFO("CLASS version: %x", readl(CLASS_VERSION));
1064 PFE_PMD_INFO("TMU version: %x", readl(TMU_VERSION));
1066 PFE_PMD_INFO("BMU1 version: %x", readl(BMU1_BASE_ADDR + BMU_VERSION));
1067 PFE_PMD_INFO("BMU2 version: %x", readl(BMU2_BASE_ADDR + BMU_VERSION));
1069 PFE_PMD_INFO("EGPI1 version: %x", readl(EGPI1_BASE_ADDR + GPI_VERSION));
1070 PFE_PMD_INFO("EGPI2 version: %x", readl(EGPI2_BASE_ADDR + GPI_VERSION));
1071 PFE_PMD_INFO("HGPI version: %x", readl(HGPI_BASE_ADDR + GPI_VERSION));
1073 PFE_PMD_INFO("HIF version: %x", readl(HIF_VERSION));
1074 PFE_PMD_INFO("HIF NOPCY version: %x", readl(HIF_NOCPY_VERSION));
1076 cbus_emac_base[0] = EMAC1_BASE_ADDR;
1077 cbus_emac_base[1] = EMAC2_BASE_ADDR;
1079 cbus_gpi_base[0] = EGPI1_BASE_ADDR;
1080 cbus_gpi_base[1] = EGPI2_BASE_ADDR;
1082 rc = pfe_hif_lib_init(g_pfe);
1086 rc = pfe_hif_init(g_pfe);
1089 pfe_soc_version_get();
1091 if (init_params.gem_id < 0)
1092 gem_id = g_pfe->nb_devs;
1094 gem_id = init_params.gem_id;
1096 PFE_PMD_LOG(INFO, "Init pmd_pfe for %s gem-id %d(given =%d)",
1097 name, gem_id, init_params.gem_id);
1099 rc = pfe_eth_init(vdev, g_pfe, gem_id);
1108 pfe_hif_exit(g_pfe);
1111 pfe_hif_lib_exit(g_pfe);
1115 munmap(g_pfe->cbus_baseaddr, cbus_size);
1122 pmd_pfe_remove(struct rte_vdev_device *vdev)
1125 struct rte_eth_dev *eth_dev = NULL;
1128 name = rte_vdev_device_name(vdev);
1132 PFE_PMD_INFO("Closing eventdev sw device %s", name);
1137 eth_dev = rte_eth_dev_allocated(name);
1139 pfe_eth_close(eth_dev);
1140 ret = rte_eth_dev_release_port(eth_dev);
1147 struct rte_vdev_driver pmd_pfe_drv = {
1148 .probe = pmd_pfe_probe,
1149 .remove = pmd_pfe_remove,
1152 RTE_PMD_REGISTER_VDEV(PFE_NAME_PMD, pmd_pfe_drv);
1153 RTE_PMD_REGISTER_PARAM_STRING(PFE_NAME_PMD, PFE_VDEV_GEM_ID_ARG "=<int> ");
1154 RTE_LOG_REGISTER_DEFAULT(pfe_logtype_pmd, NOTICE);