net/qede/base: move code bits
[dpdk.git] / drivers / net / qede / base / bcm_osal.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include <rte_memzone.h>
10 #include <rte_errno.h>
11
12 #include "bcm_osal.h"
13 #include "ecore.h"
14 #include "ecore_hw.h"
15 #include "ecore_iov_api.h"
16 #include "ecore_mcp_api.h"
17 #include "ecore_l2_api.h"
18
19
20 unsigned long qede_log2_align(unsigned long n)
21 {
22         unsigned long ret = n ? 1 : 0;
23         unsigned long _n = n >> 1;
24
25         while (_n) {
26                 _n >>= 1;
27                 ret <<= 1;
28         }
29
30         if (ret < n)
31                 ret <<= 1;
32
33         return ret;
34 }
35
36 u32 qede_osal_log2(u32 val)
37 {
38         u32 log = 0;
39
40         while (val >>= 1)
41                 log++;
42
43         return log;
44 }
45
46 inline void qede_set_bit(u32 nr, unsigned long *addr)
47 {
48         __sync_fetch_and_or(addr, (1UL << nr));
49 }
50
51 inline void qede_clr_bit(u32 nr, unsigned long *addr)
52 {
53         __sync_fetch_and_and(addr, ~(1UL << nr));
54 }
55
56 inline bool qede_test_bit(u32 nr, unsigned long *addr)
57 {
58         bool res;
59
60         rte_mb();
61         res = ((*addr) & (1UL << nr)) != 0;
62         rte_mb();
63         return res;
64 }
65
66 static inline u32 qede_ffb(unsigned long word)
67 {
68         unsigned long first_bit;
69
70         first_bit = __builtin_ffsl(word);
71         return first_bit ? (first_bit - 1) : OSAL_BITS_PER_UL;
72 }
73
74 inline u32 qede_find_first_bit(unsigned long *addr, u32 limit)
75 {
76         u32 i;
77         u32 nwords = 0;
78         OSAL_BUILD_BUG_ON(!limit);
79         nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
80         for (i = 0; i < nwords; i++)
81                 if (addr[i] != 0)
82                         break;
83
84         return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffb(addr[i]);
85 }
86
87 static inline u32 qede_ffz(unsigned long word)
88 {
89         unsigned long first_zero;
90
91         first_zero = __builtin_ffsl(~word);
92         return first_zero ? (first_zero - 1) : OSAL_BITS_PER_UL;
93 }
94
95 inline u32 qede_find_first_zero_bit(unsigned long *addr, u32 limit)
96 {
97         u32 i;
98         u32 nwords = 0;
99         OSAL_BUILD_BUG_ON(!limit);
100         nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
101         for (i = 0; i < nwords; i++)
102                 if (~(addr[i] != 0))
103                         break;
104         return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffz(addr[i]);
105 }
106
107 void qede_vf_fill_driver_data(struct ecore_hwfn *hwfn,
108                               __rte_unused struct vf_pf_resc_request *resc_req,
109                               struct ecore_vf_acquire_sw_info *vf_sw_info)
110 {
111         vf_sw_info->os_type = VFPF_ACQUIRE_OS_LINUX_USERSPACE;
112         vf_sw_info->override_fw_version = 1;
113 }
114
115 void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
116                               dma_addr_t *phys, size_t size)
117 {
118         const struct rte_memzone *mz;
119         char mz_name[RTE_MEMZONE_NAMESIZE];
120         uint32_t core_id = rte_lcore_id();
121         unsigned int socket_id;
122
123         OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
124         snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
125                                         (unsigned long)rte_get_timer_cycles());
126         if (core_id == (unsigned int)LCORE_ID_ANY)
127                 core_id = 0;
128         socket_id = rte_lcore_to_socket_id(core_id);
129         mz = rte_memzone_reserve_aligned(mz_name, size,
130                                          socket_id, 0, RTE_CACHE_LINE_SIZE);
131         if (!mz) {
132                 DP_ERR(p_dev, "Unable to allocate DMA memory "
133                        "of size %zu bytes - %s\n",
134                        size, rte_strerror(rte_errno));
135                 *phys = 0;
136                 return OSAL_NULL;
137         }
138         *phys = mz->phys_addr;
139         DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
140                    "size=%zu phys=0x%" PRIx64 " virt=%p on socket=%u\n",
141                    mz->len, mz->phys_addr, mz->addr, socket_id);
142         return mz->addr;
143 }
144
145 void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev,
146                                       dma_addr_t *phys, size_t size, int align)
147 {
148         const struct rte_memzone *mz;
149         char mz_name[RTE_MEMZONE_NAMESIZE];
150         uint32_t core_id = rte_lcore_id();
151         unsigned int socket_id;
152
153         OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
154         snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
155                                         (unsigned long)rte_get_timer_cycles());
156         if (core_id == (unsigned int)LCORE_ID_ANY)
157                 core_id = 0;
158         socket_id = rte_lcore_to_socket_id(core_id);
159         mz = rte_memzone_reserve_aligned(mz_name, size, socket_id, 0, align);
160         if (!mz) {
161                 DP_ERR(p_dev, "Unable to allocate DMA memory "
162                        "of size %zu bytes - %s\n",
163                        size, rte_strerror(rte_errno));
164                 *phys = 0;
165                 return OSAL_NULL;
166         }
167         *phys = mz->phys_addr;
168         DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
169                    "aligned memory size=%zu phys=0x%" PRIx64 " virt=%p core=%d\n",
170                    mz->len, mz->phys_addr, mz->addr, core_id);
171         return mz->addr;
172 }
173
174 #ifdef CONFIG_ECORE_ZIPPED_FW
175 u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
176                     u8 *input_buf, u32 max_size, u8 *unzip_buf)
177 {
178         int rc;
179
180         p_hwfn->stream->next_in = input_buf;
181         p_hwfn->stream->avail_in = input_len;
182         p_hwfn->stream->next_out = unzip_buf;
183         p_hwfn->stream->avail_out = max_size;
184
185         rc = inflateInit2(p_hwfn->stream, MAX_WBITS);
186
187         if (rc != Z_OK) {
188                 DP_ERR(p_hwfn,
189                            "zlib init failed, rc = %d\n", rc);
190                 return 0;
191         }
192
193         rc = inflate(p_hwfn->stream, Z_FINISH);
194         inflateEnd(p_hwfn->stream);
195
196         if (rc != Z_OK && rc != Z_STREAM_END) {
197                 DP_ERR(p_hwfn,
198                            "FW unzip error: %s, rc=%d\n", p_hwfn->stream->msg,
199                            rc);
200                 return 0;
201         }
202
203         return p_hwfn->stream->total_out / 4;
204 }
205 #endif
206
207 void
208 qede_get_mcp_proto_stats(struct ecore_dev *edev,
209                          enum ecore_mcp_protocol_type type,
210                          union ecore_mcp_protocol_stats *stats)
211 {
212         struct ecore_eth_stats lan_stats;
213
214         if (type == ECORE_MCP_LAN_STATS) {
215                 ecore_get_vport_stats(edev, &lan_stats);
216                 stats->lan_stats.ucast_rx_pkts = lan_stats.rx_ucast_pkts;
217                 stats->lan_stats.ucast_tx_pkts = lan_stats.tx_ucast_pkts;
218                 stats->lan_stats.fcs_err = -1;
219         } else {
220                 DP_INFO(edev, "Statistics request type %d not supported\n",
221                        type);
222         }
223 }