1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
7 #include <rte_memzone.h>
13 #include "ecore_dev_api.h"
14 #include "ecore_iov_api.h"
15 #include "ecore_mcp_api.h"
16 #include "ecore_l2_api.h"
18 /* Array of memzone pointers */
19 static const struct rte_memzone *ecore_mz_mapping[RTE_MAX_MEMZONE];
20 /* Counter to track current memzone allocated */
21 static uint16_t ecore_mz_count;
23 unsigned long qede_log2_align(unsigned long n)
25 unsigned long ret = n ? 1 : 0;
26 unsigned long _n = n >> 1;
39 u32 qede_osal_log2(u32 val)
49 static inline u32 qede_ffb(unsigned long word)
51 unsigned long first_bit;
53 first_bit = __builtin_ffsl(word);
54 return first_bit ? (first_bit - 1) : OSAL_BITS_PER_UL;
57 inline u32 qede_find_first_bit(unsigned long *addr, u32 limit)
61 OSAL_BUILD_BUG_ON(!limit);
62 nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
63 for (i = 0; i < nwords; i++)
67 return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffb(addr[i]);
70 static inline u32 qede_ffz(unsigned long word)
72 unsigned long first_zero;
74 first_zero = __builtin_ffsl(~word);
75 return first_zero ? (first_zero - 1) : OSAL_BITS_PER_UL;
78 inline u32 qede_find_first_zero_bit(u32 *addr, u32 limit)
82 OSAL_BUILD_BUG_ON(!limit);
83 nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
84 for (i = 0; i < nwords && ~(addr[i]) == 0; i++);
85 return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffz(addr[i]);
88 void qede_vf_fill_driver_data(struct ecore_hwfn *hwfn,
89 __rte_unused struct vf_pf_resc_request *resc_req,
90 struct ecore_vf_acquire_sw_info *vf_sw_info)
92 vf_sw_info->os_type = VFPF_ACQUIRE_OS_LINUX_USERSPACE;
93 vf_sw_info->override_fw_version = 1;
96 void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
97 dma_addr_t *phys, size_t size)
99 const struct rte_memzone *mz;
100 char mz_name[RTE_MEMZONE_NAMESIZE];
101 uint32_t core_id = rte_lcore_id();
102 unsigned int socket_id;
104 if (ecore_mz_count >= RTE_MAX_MEMZONE) {
105 DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
111 OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
112 snprintf(mz_name, sizeof(mz_name), "%lx",
113 (unsigned long)rte_get_timer_cycles());
114 if (core_id == (unsigned int)LCORE_ID_ANY)
115 core_id = rte_get_master_lcore();
116 socket_id = rte_lcore_to_socket_id(core_id);
117 mz = rte_memzone_reserve_aligned(mz_name, size, socket_id,
118 RTE_MEMZONE_IOVA_CONTIG, RTE_CACHE_LINE_SIZE);
120 DP_ERR(p_dev, "Unable to allocate DMA memory "
121 "of size %zu bytes - %s\n",
122 size, rte_strerror(rte_errno));
127 ecore_mz_mapping[ecore_mz_count++] = mz;
128 DP_VERBOSE(p_dev, ECORE_MSG_SP,
129 "Allocated dma memory size=%zu phys=0x%lx"
130 " virt=%p core=%d\n",
131 mz->len, (unsigned long)mz->iova, mz->addr, core_id);
135 void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev,
136 dma_addr_t *phys, size_t size, int align)
138 const struct rte_memzone *mz;
139 char mz_name[RTE_MEMZONE_NAMESIZE];
140 uint32_t core_id = rte_lcore_id();
141 unsigned int socket_id;
143 if (ecore_mz_count >= RTE_MAX_MEMZONE) {
144 DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
150 OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
151 snprintf(mz_name, sizeof(mz_name), "%lx",
152 (unsigned long)rte_get_timer_cycles());
153 if (core_id == (unsigned int)LCORE_ID_ANY)
154 core_id = rte_get_master_lcore();
155 socket_id = rte_lcore_to_socket_id(core_id);
156 mz = rte_memzone_reserve_aligned(mz_name, size, socket_id,
157 RTE_MEMZONE_IOVA_CONTIG, align);
159 DP_ERR(p_dev, "Unable to allocate DMA memory "
160 "of size %zu bytes - %s\n",
161 size, rte_strerror(rte_errno));
166 ecore_mz_mapping[ecore_mz_count++] = mz;
167 DP_VERBOSE(p_dev, ECORE_MSG_SP,
168 "Allocated aligned dma memory size=%zu phys=0x%lx"
169 " virt=%p core=%d\n",
170 mz->len, (unsigned long)mz->iova, mz->addr, core_id);
174 void osal_dma_free_mem(struct ecore_dev *p_dev, dma_addr_t phys)
178 for (j = 0 ; j < ecore_mz_count; j++) {
179 if (phys == ecore_mz_mapping[j]->iova) {
180 DP_VERBOSE(p_dev, ECORE_MSG_SP,
181 "Free memzone %s\n", ecore_mz_mapping[j]->name);
182 rte_memzone_free(ecore_mz_mapping[j]);
183 while (j < ecore_mz_count - 1) {
184 ecore_mz_mapping[j] = ecore_mz_mapping[j + 1];
192 DP_ERR(p_dev, "Unexpected memory free request\n");
195 #ifdef CONFIG_ECORE_ZIPPED_FW
196 u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
197 u8 *input_buf, u32 max_size, u8 *unzip_buf)
201 p_hwfn->stream->next_in = input_buf;
202 p_hwfn->stream->avail_in = input_len;
203 p_hwfn->stream->next_out = unzip_buf;
204 p_hwfn->stream->avail_out = max_size;
206 rc = inflateInit2(p_hwfn->stream, MAX_WBITS);
210 "zlib init failed, rc = %d\n", rc);
214 rc = inflate(p_hwfn->stream, Z_FINISH);
215 inflateEnd(p_hwfn->stream);
217 if (rc != Z_OK && rc != Z_STREAM_END) {
219 "FW unzip error: %s, rc=%d\n", p_hwfn->stream->msg,
224 return p_hwfn->stream->total_out / 4;
229 qede_get_mcp_proto_stats(struct ecore_dev *edev,
230 enum ecore_mcp_protocol_type type,
231 union ecore_mcp_protocol_stats *stats)
233 struct ecore_eth_stats lan_stats;
235 if (type == ECORE_MCP_LAN_STATS) {
236 ecore_get_vport_stats(edev, &lan_stats);
239 stats->lan_stats.ucast_rx_pkts = lan_stats.common.rx_ucast_pkts;
240 stats->lan_stats.ucast_tx_pkts = lan_stats.common.tx_ucast_pkts;
242 stats->lan_stats.fcs_err = -1;
244 DP_INFO(edev, "Statistics request type %d not supported\n",
249 static void qede_hw_err_handler(void *dev, enum ecore_hw_err_type err_type)
251 struct ecore_dev *edev = dev;
254 case ECORE_HW_ERR_FAN_FAIL:
257 case ECORE_HW_ERR_MFW_RESP_FAIL:
258 case ECORE_HW_ERR_HW_ATTN:
259 case ECORE_HW_ERR_DMAE_FAIL:
260 case ECORE_HW_ERR_RAMROD_FAIL:
261 case ECORE_HW_ERR_FW_ASSERT:
262 OSAL_SAVE_FW_DUMP(0); /* Using port 0 as default port_id */
266 DP_NOTICE(edev, false, "Unknown HW error [%d]\n", err_type);
272 qede_hw_err_notify(struct ecore_hwfn *p_hwfn, enum ecore_hw_err_type err_type)
277 case ECORE_HW_ERR_FAN_FAIL:
278 strcpy(err_str, "Fan Failure");
280 case ECORE_HW_ERR_MFW_RESP_FAIL:
281 strcpy(err_str, "MFW Response Failure");
283 case ECORE_HW_ERR_HW_ATTN:
284 strcpy(err_str, "HW Attention");
286 case ECORE_HW_ERR_DMAE_FAIL:
287 strcpy(err_str, "DMAE Failure");
289 case ECORE_HW_ERR_RAMROD_FAIL:
290 strcpy(err_str, "Ramrod Failure");
292 case ECORE_HW_ERR_FW_ASSERT:
293 strcpy(err_str, "FW Assertion");
296 strcpy(err_str, "Unknown");
299 DP_ERR(p_hwfn, "HW error occurred [%s]\n", err_str);
301 qede_hw_err_handler(p_hwfn->p_dev, err_type);
303 ecore_int_attn_clr_enable(p_hwfn->p_dev, true);
306 u32 qede_crc32(u32 crc, u8 *ptr, u32 length)
312 for (i = 0; i < 8; i++)
313 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
318 void qed_set_platform_str(struct ecore_hwfn *p_hwfn,
319 char *buf_str, u32 buf_size)
321 snprintf(buf_str, buf_size, "%s.", rte_version());