2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include "ecore_sp_commands.h"
12 #include "ecore_dcbx.h"
13 #include "ecore_cxt.h"
14 #include "ecore_gtt_reg_addr.h"
15 #include "ecore_iro.h"
16 #include "ecore_iov_api.h"
18 #define ECORE_DCBX_MAX_MIB_READ_TRY (100)
19 #define ECORE_ETH_TYPE_DEFAULT (0)
21 #define ECORE_DCBX_INVALID_PRIORITY 0xFF
23 /* Get Traffic Class from priority traffic class table, 4 bits represent
24 * the traffic class corresponding to the priority.
26 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
27 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
29 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
31 return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
35 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
37 u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
40 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
41 return ecore_dcbx_app_ethtype(app_info_bitmap);
43 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
46 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
48 return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
52 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
54 u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
57 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
58 return ecore_dcbx_app_port(app_info_bitmap);
60 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
63 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
68 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
70 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
72 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
75 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
76 u16 proto_id, bool ieee)
80 if (!p_hwfn->p_dcbx_info->iwarp_port)
84 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
85 DCBX_APP_SF_IEEE_TCP_PORT);
87 port = ecore_dcbx_app_port(app_info_bitmap);
89 return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
93 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
94 struct ecore_dcbx_results *p_data)
96 enum dcbx_protocol_type id;
99 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
100 p_data->dcbx_enabled);
102 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
103 id = ecore_dcbx_app_update[i].id;
105 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
106 "%s info: update %d, enable %d, prio %d, tc %d,"
107 " num_active_tc %d dscp_enable = %d dscp_val = %d\n",
108 ecore_dcbx_app_update[i].name,
109 p_data->arr[id].update,
110 p_data->arr[id].enable, p_data->arr[id].priority,
111 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
112 p_data->arr[id].dscp_enable,
113 p_data->arr[id].dscp_val);
118 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
119 struct ecore_hwfn *p_hwfn,
120 bool enable, u8 prio, u8 tc,
121 enum dcbx_protocol_type type,
122 enum ecore_pci_personality personality)
124 struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
126 /* PF update ramrod data */
127 p_data->arr[type].enable = enable;
128 p_data->arr[type].priority = prio;
129 p_data->arr[type].tc = tc;
130 p_data->arr[type].dscp_enable = dscp->enabled;
131 if (p_data->arr[type].dscp_enable) {
134 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
135 if (prio == dscp->dscp_pri_map[i]) {
136 p_data->arr[type].dscp_val = i;
141 if (enable && p_data->arr[type].dscp_enable)
142 p_data->arr[type].update = UPDATE_DCB_DSCP;
144 p_data->arr[type].update = UPDATE_DCB;
146 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
149 if (p_hwfn->hw_info.personality == personality)
150 p_hwfn->hw_info.offload_tc = tc;
153 /* Update app protocol data and hw_info fields with the TLV info */
155 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
156 struct ecore_hwfn *p_hwfn,
157 bool enable, u8 prio, u8 tc,
158 enum dcbx_protocol_type type)
160 enum ecore_pci_personality personality;
161 enum dcbx_protocol_type id;
162 const char *name; /* @DPDK */
165 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
166 id = ecore_dcbx_app_update[i].id;
171 personality = ecore_dcbx_app_update[i].personality;
172 name = ecore_dcbx_app_update[i].name;
174 ecore_dcbx_set_params(p_data, p_hwfn, enable,
175 prio, tc, type, personality);
179 static enum _ecore_status_t
180 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
182 u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
183 u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
184 enum _ecore_status_t rc = ECORE_SUCCESS;
186 /* Bitmap 1 corresponds to priority 0, return priority 0 */
187 if (pri_bitmap == 1) {
192 /* Choose the highest priority */
193 while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) {
194 pri_mask = 1 << index;
195 if (pri_bitmap & pri_mask)
200 if (pri < ECORE_MAX_PFC_PRIORITIES)
209 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
210 u32 app_prio_bitmap, u16 id,
211 enum dcbx_protocol_type *type, bool ieee)
213 if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
214 *type = DCBX_PROTOCOL_ETH;
216 *type = DCBX_MAX_PROTOCOL_TYPE;
218 "No action required, App TLV id = 0x%x"
219 " app_prio_bitmap = 0x%x\n",
220 id, app_prio_bitmap);
227 /* Parse app TLV's to update TC information in hw_info structure for
228 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
230 static enum _ecore_status_t
231 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
232 struct ecore_dcbx_results *p_data,
233 struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
234 int count, u8 dcbx_version)
236 enum dcbx_protocol_type type;
241 enum _ecore_status_t rc = ECORE_SUCCESS;
244 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
245 "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
246 count, pri_tc_tbl, dcbx_version);
248 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
250 for (i = 0; i < count; i++) {
251 protocol_id = GET_MFW_FIELD(p_tbl[i].entry,
252 DCBX_APP_PROTOCOL_ID);
253 priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
254 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
255 protocol_id, priority_map);
256 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
257 if (rc == ECORE_INVAL) {
258 DP_ERR(p_hwfn, "Invalid priority\n");
262 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
263 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
266 /* ETH always have the enable bit reset, as it gets
267 * vlan information per packet. For other protocols,
268 * should be set according to the dcbx_enabled
269 * indication, but we only got here if there was an
270 * app tlv for the protocol, so dcbx must be enabled.
272 enable = !(type == DCBX_PROTOCOL_ETH);
274 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
278 /* Update ramrod protocol data and hw_info fields
279 * with default info when corresponding APP TLV's are not detected.
280 * The enabled field has a different logic for ethernet as only for
281 * ethernet dcb should disabled by default, as the information arrives
282 * from the OS (unless an explicit app tlv was present).
284 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
285 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
286 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
287 if (p_data->arr[type].update)
290 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
291 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
295 return ECORE_SUCCESS;
298 /* Parse app TLV's to update TC information in hw_info structure for
299 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
301 static enum _ecore_status_t
302 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
304 struct dcbx_app_priority_feature *p_app;
305 enum _ecore_status_t rc = ECORE_SUCCESS;
306 struct ecore_dcbx_results data = { 0 };
307 struct dcbx_app_priority_entry *p_tbl;
308 struct dcbx_ets_feature *p_ets;
309 struct ecore_hw_info *p_info;
310 u32 pri_tc_tbl, flags;
314 flags = p_hwfn->p_dcbx_info->operational.flags;
315 dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
317 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
318 p_tbl = p_app->app_pri_tbl;
320 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
321 pri_tc_tbl = p_ets->pri_tc_tbl[0];
323 p_info = &p_hwfn->hw_info;
324 num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
326 rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
327 num_entries, dcbx_version);
328 if (rc != ECORE_SUCCESS)
331 p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
332 p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC);
333 data.pf_id = p_hwfn->rel_pf_id;
334 data.dcbx_enabled = !!dcbx_version;
336 ecore_dcbx_dp_protocol(p_hwfn, &data);
338 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
339 sizeof(struct ecore_dcbx_results));
341 return ECORE_SUCCESS;
344 static enum _ecore_status_t
345 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
346 struct ecore_ptt *p_ptt,
347 struct ecore_dcbx_mib_meta_data *p_data,
348 enum ecore_mib_read_type type)
350 enum _ecore_status_t rc = ECORE_SUCCESS;
351 u32 prefix_seq_num, suffix_seq_num;
354 /* The data is considered to be valid only if both sequence numbers are
358 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
359 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
360 p_data->addr, p_data->size);
361 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
362 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
364 ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
365 p_data->addr, p_data->size);
366 prefix_seq_num = p_data->mib->prefix_seq_num;
367 suffix_seq_num = p_data->mib->suffix_seq_num;
371 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
372 "mib type = %d, try count = %d prefix seq num ="
373 " %d suffix seq num = %d\n",
374 type, read_count, prefix_seq_num, suffix_seq_num);
375 } while ((prefix_seq_num != suffix_seq_num) &&
376 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
378 if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
380 "MIB read err, mib type = %d, try count ="
381 " %d prefix seq num = %d suffix seq num = %d\n",
382 type, read_count, prefix_seq_num, suffix_seq_num);
390 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
391 struct ecore_dcbx_app_prio *p_prio,
392 struct ecore_dcbx_results *p_results)
396 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
397 p_results->arr[DCBX_PROTOCOL_ETH].enable)
398 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
400 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
401 "Priorities: eth %d\n",
406 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
407 struct dcbx_app_priority_feature *p_app,
408 struct dcbx_app_priority_entry *p_tbl,
409 struct ecore_dcbx_params *p_params, bool ieee)
411 struct ecore_app_entry *entry;
415 p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING);
416 p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED);
417 p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR);
418 p_params->num_app_entries = GET_MFW_FIELD(p_app->flags,
419 DCBX_APP_NUM_ENTRIES);
420 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
421 entry = &p_params->app_entry[i];
426 sf_ieee = GET_MFW_FIELD(p_tbl[i].entry,
429 case DCBX_APP_SF_IEEE_RESERVED:
431 val = GET_MFW_FIELD(p_tbl[i].entry,
433 entry->sf_ieee = val ?
434 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
435 ECORE_DCBX_SF_IEEE_ETHTYPE;
437 case DCBX_APP_SF_IEEE_ETHTYPE:
438 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
440 case DCBX_APP_SF_IEEE_TCP_PORT:
441 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
443 case DCBX_APP_SF_IEEE_UDP_PORT:
444 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
446 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
448 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
452 entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry,
456 pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
457 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
458 entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry,
459 DCBX_APP_PROTOCOL_ID);
460 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
462 &entry->proto_type, ieee);
465 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
466 "APP params: willing %d, valid %d error = %d\n",
467 p_params->app_willing, p_params->app_valid,
468 p_params->app_error);
472 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
473 u32 pfc, struct ecore_dcbx_params *p_params)
477 p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING);
478 p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS);
479 p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED);
480 pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
481 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
482 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
483 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
484 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
485 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
486 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
487 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
488 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
490 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
491 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
492 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
493 p_params->pfc.enabled);
497 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
498 struct dcbx_ets_feature *p_ets,
499 struct ecore_dcbx_params *p_params)
501 u32 bw_map[2], tsa_map[2], pri_map;
504 p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING);
505 p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED);
506 p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS);
507 p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
508 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
509 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
510 p_params->ets_willing, p_params->ets_enabled,
511 p_params->ets_cbs, p_ets->pri_tc_tbl[0],
512 p_params->max_ets_tc);
514 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
515 * encoded in a type u32 array of size 2.
517 bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
518 bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
519 tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
520 tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
521 pri_map = p_ets->pri_tc_tbl[0];
522 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
523 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
524 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
525 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
526 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
527 "elem %d bw_tbl %x tsa_tbl %x\n",
528 i, p_params->ets_tc_bw_tbl[i],
529 p_params->ets_tc_tsa_tbl[i]);
534 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
535 struct dcbx_app_priority_feature *p_app,
536 struct dcbx_app_priority_entry *p_tbl,
537 struct dcbx_ets_feature *p_ets,
538 u32 pfc, struct ecore_dcbx_params *p_params,
541 ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
542 ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
543 ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
547 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
548 struct ecore_dcbx_get *params)
550 struct dcbx_features *p_feat;
552 p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
553 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
554 p_feat->app.app_pri_tbl, &p_feat->ets,
555 p_feat->pfc, ¶ms->local.params, false);
556 params->local.valid = true;
560 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
561 struct ecore_dcbx_get *params)
563 struct dcbx_features *p_feat;
565 p_feat = &p_hwfn->p_dcbx_info->remote.features;
566 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
567 p_feat->app.app_pri_tbl, &p_feat->ets,
568 p_feat->pfc, ¶ms->remote.params,
570 params->remote.valid = true;
574 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
575 struct ecore_dcbx_get *params)
577 struct ecore_dcbx_operational_params *p_operational;
578 struct ecore_dcbx_results *p_results;
579 struct dcbx_features *p_feat;
584 flags = p_hwfn->p_dcbx_info->operational.flags;
586 /* If DCBx version is non zero, then negotiation
587 * was successfuly performed
589 p_operational = ¶ms->operational;
590 enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) !=
591 DCBX_CONFIG_VERSION_DISABLED);
593 p_operational->enabled = enabled;
594 p_operational->valid = false;
595 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
599 p_feat = &p_hwfn->p_dcbx_info->operational.features;
600 p_results = &p_hwfn->p_dcbx_info->results;
602 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
603 DCBX_CONFIG_VERSION_IEEE);
604 p_operational->ieee = val;
606 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
607 DCBX_CONFIG_VERSION_CEE);
608 p_operational->cee = val;
610 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
611 DCBX_CONFIG_VERSION_STATIC);
612 p_operational->local = val;
614 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
615 "Version support: ieee %d, cee %d, static %d\n",
616 p_operational->ieee, p_operational->cee,
617 p_operational->local);
619 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
620 p_feat->app.app_pri_tbl, &p_feat->ets,
621 p_feat->pfc, ¶ms->operational.params,
622 p_operational->ieee);
623 ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
625 err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
626 p_operational->err = err;
627 p_operational->enabled = enabled;
628 p_operational->valid = true;
631 static void ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
632 struct ecore_dcbx_get *params)
634 struct ecore_dcbx_dscp_params *p_dscp;
635 struct dcb_dscp_map *p_dscp_map;
639 p_dscp = ¶ms->dscp;
640 p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
641 p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE);
643 /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
644 * where each entry holds the 4bit priority map for 8 dscp entries.
646 for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
647 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
648 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
650 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
651 p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
656 static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
657 struct ecore_dcbx_get *params)
659 struct lldp_config_params_s *p_local;
661 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
663 OSAL_MEMCPY(params->lldp_local.local_chassis_id,
664 p_local->local_chassis_id,
665 OSAL_ARRAY_SIZE(p_local->local_chassis_id));
666 OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
667 OSAL_ARRAY_SIZE(p_local->local_port_id));
670 static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
671 struct ecore_dcbx_get *params)
673 struct lldp_status_params_s *p_remote;
675 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
677 OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
678 p_remote->peer_chassis_id,
679 OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
680 OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
681 OSAL_ARRAY_SIZE(p_remote->peer_port_id));
684 static enum _ecore_status_t
685 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
686 struct ecore_dcbx_get *p_params,
687 enum ecore_mib_read_type type)
690 case ECORE_DCBX_REMOTE_MIB:
691 ecore_dcbx_get_remote_params(p_hwfn, p_params);
693 case ECORE_DCBX_LOCAL_MIB:
694 ecore_dcbx_get_local_params(p_hwfn, p_params);
696 case ECORE_DCBX_OPERATIONAL_MIB:
697 ecore_dcbx_get_operational_params(p_hwfn, p_params);
699 case ECORE_DCBX_REMOTE_LLDP_MIB:
700 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params);
702 case ECORE_DCBX_LOCAL_LLDP_MIB:
703 ecore_dcbx_get_local_lldp_params(p_hwfn, p_params);
706 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
710 return ECORE_SUCCESS;
713 static enum _ecore_status_t
714 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
715 struct ecore_ptt *p_ptt)
717 struct ecore_dcbx_mib_meta_data data;
718 enum _ecore_status_t rc = ECORE_SUCCESS;
720 OSAL_MEM_ZERO(&data, sizeof(data));
721 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
723 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
724 data.size = sizeof(struct lldp_config_params_s);
725 ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
730 static enum _ecore_status_t
731 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
732 struct ecore_ptt *p_ptt,
733 enum ecore_mib_read_type type)
735 struct ecore_dcbx_mib_meta_data data;
736 enum _ecore_status_t rc = ECORE_SUCCESS;
738 OSAL_MEM_ZERO(&data, sizeof(data));
739 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
741 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
742 data.size = sizeof(struct lldp_status_params_s);
743 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
748 static enum _ecore_status_t
749 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
750 struct ecore_ptt *p_ptt,
751 enum ecore_mib_read_type type)
753 struct ecore_dcbx_mib_meta_data data;
754 enum _ecore_status_t rc = ECORE_SUCCESS;
756 OSAL_MEM_ZERO(&data, sizeof(data));
757 data.addr = p_hwfn->mcp_info->port_addr +
758 offsetof(struct public_port, operational_dcbx_mib);
759 data.mib = &p_hwfn->p_dcbx_info->operational;
760 data.size = sizeof(struct dcbx_mib);
761 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
766 static enum _ecore_status_t
767 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
768 struct ecore_ptt *p_ptt,
769 enum ecore_mib_read_type type)
771 struct ecore_dcbx_mib_meta_data data;
772 enum _ecore_status_t rc = ECORE_SUCCESS;
774 OSAL_MEM_ZERO(&data, sizeof(data));
775 data.addr = p_hwfn->mcp_info->port_addr +
776 offsetof(struct public_port, remote_dcbx_mib);
777 data.mib = &p_hwfn->p_dcbx_info->remote;
778 data.size = sizeof(struct dcbx_mib);
779 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
784 static enum _ecore_status_t
785 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
787 struct ecore_dcbx_mib_meta_data data;
788 enum _ecore_status_t rc = ECORE_SUCCESS;
790 OSAL_MEM_ZERO(&data, sizeof(data));
791 data.addr = p_hwfn->mcp_info->port_addr +
792 offsetof(struct public_port, local_admin_dcbx_mib);
793 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
794 data.size = sizeof(struct dcbx_local_params);
795 ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
796 data.addr, data.size);
802 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
804 struct ecore_dcbx_mib_meta_data data;
806 data.addr = p_hwfn->mcp_info->port_addr +
807 offsetof(struct public_port, dcb_dscp_map);
808 data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
809 data.size = sizeof(struct dcb_dscp_map);
810 ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
813 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
814 struct ecore_ptt *p_ptt,
815 enum ecore_mib_read_type type)
817 enum _ecore_status_t rc = ECORE_INVAL;
820 case ECORE_DCBX_OPERATIONAL_MIB:
821 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
822 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
824 case ECORE_DCBX_REMOTE_MIB:
825 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
827 case ECORE_DCBX_LOCAL_MIB:
828 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
830 case ECORE_DCBX_REMOTE_LLDP_MIB:
831 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
833 case ECORE_DCBX_LOCAL_LLDP_MIB:
834 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
837 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
845 * Reconfigure QM and invoke PF update ramrod command if operational MIB
846 * change is detected.
849 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
850 enum ecore_mib_read_type type)
852 enum _ecore_status_t rc = ECORE_SUCCESS;
854 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
858 if (type == ECORE_DCBX_OPERATIONAL_MIB) {
859 ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get);
861 rc = ecore_dcbx_process_mib_info(p_hwfn);
865 /* reconfigure tcs of QM queues according
866 * to negotiation results
868 ecore_qm_reconf(p_hwfn, p_ptt);
870 /* update storm FW with negotiation results */
871 ecore_sp_pf_update_dcbx(p_hwfn);
873 /* set eagle enigne 1 flow control workaround
874 * according to negotiation results
876 enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
880 ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
882 /* Update the DSCP to TC mapping bit if required */
883 if ((type == ECORE_DCBX_OPERATIONAL_MIB) &&
884 p_hwfn->p_dcbx_info->dscp_nig_update) {
885 ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE, 0x1);
886 p_hwfn->p_dcbx_info->dscp_nig_update = false;
889 OSAL_DCBX_AEN(p_hwfn, type);
894 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
896 p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
897 sizeof(*p_hwfn->p_dcbx_info));
898 if (!p_hwfn->p_dcbx_info) {
899 DP_NOTICE(p_hwfn, true,
900 "Failed to allocate `struct ecore_dcbx_info'");
904 p_hwfn->p_dcbx_info->iwarp_port =
905 p_hwfn->pf_params.rdma_pf_params.iwarp_port;
907 return ECORE_SUCCESS;
910 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn,
911 struct ecore_dcbx_info *p_dcbx_info)
913 OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
916 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
917 struct ecore_dcbx_results *p_src,
918 enum dcbx_protocol_type type)
920 p_data->dcb_enable_flag = p_src->arr[type].enable;
921 p_data->dcb_priority = p_src->arr[type].priority;
922 p_data->dcb_tc = p_src->arr[type].tc;
923 p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
924 p_data->dscp_val = p_src->arr[type].dscp_val;
927 /* Set pf update ramrod command params */
928 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
929 struct pf_update_ramrod_data *p_dest)
931 struct protocol_dcb_data *p_dcb_data;
934 p_dest->pf_id = p_src->pf_id;
936 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
937 p_dest->update_eth_dcb_data_mode = update_flag;
938 update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
939 p_dest->update_iwarp_dcb_data_mode = update_flag;
941 p_dcb_data = &p_dest->eth_dcb_data;
942 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
943 p_dcb_data = &p_dest->iwarp_dcb_data;
944 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
947 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
948 struct ecore_dcbx_get *p_get,
949 enum ecore_mib_read_type type)
951 struct ecore_ptt *p_ptt;
952 enum _ecore_status_t rc;
954 if (IS_VF(p_hwfn->p_dev))
957 p_ptt = ecore_ptt_acquire(p_hwfn);
959 return ECORE_TIMEOUT;
961 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
962 if (rc != ECORE_SUCCESS)
965 rc = ecore_dcbx_get_params(p_hwfn, p_get, type);
968 ecore_ptt_release(p_hwfn, p_ptt);
973 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
974 u32 *pfc, struct ecore_dcbx_params *p_params)
979 if (p_params->pfc.willing)
980 *pfc |= DCBX_PFC_WILLING_MASK;
982 *pfc &= ~DCBX_PFC_WILLING_MASK;
984 if (p_params->pfc.enabled)
985 *pfc |= DCBX_PFC_ENABLED_MASK;
987 *pfc &= ~DCBX_PFC_ENABLED_MASK;
989 *pfc &= ~DCBX_PFC_CAPS_MASK;
990 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
992 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
993 if (p_params->pfc.prio[i])
995 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
996 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET);
998 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1002 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1003 struct dcbx_ets_feature *p_ets,
1004 struct ecore_dcbx_params *p_params)
1006 u8 *bw_map, *tsa_map;
1010 if (p_params->ets_willing)
1011 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1013 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1015 if (p_params->ets_cbs)
1016 p_ets->flags |= DCBX_ETS_CBS_MASK;
1018 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1020 if (p_params->ets_enabled)
1021 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1023 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1025 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1026 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
1028 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1029 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1030 p_ets->pri_tc_tbl[0] = 0;
1031 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1032 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1033 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1034 /* Copy the priority value to the corresponding 4 bits in the
1035 * traffic class table.
1037 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1038 p_ets->pri_tc_tbl[0] |= val;
1040 for (i = 0; i < 2; i++) {
1041 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1042 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1045 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1046 "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1047 p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1048 p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1049 p_ets->tc_tsa_tbl[1]);
1053 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1054 struct dcbx_app_priority_feature *p_app,
1055 struct ecore_dcbx_params *p_params, bool ieee)
1060 if (p_params->app_willing)
1061 p_app->flags |= DCBX_APP_WILLING_MASK;
1063 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1065 if (p_params->app_valid)
1066 p_app->flags |= DCBX_APP_ENABLED_MASK;
1068 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1070 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1071 p_app->flags |= (u32)p_params->num_app_entries <<
1072 DCBX_APP_NUM_ENTRIES_OFFSET;
1074 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1075 entry = &p_app->app_pri_tbl[i].entry;
1078 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1079 switch (p_params->app_entry[i].sf_ieee) {
1080 case ECORE_DCBX_SF_IEEE_ETHTYPE:
1081 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1082 DCBX_APP_SF_IEEE_OFFSET);
1083 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1084 DCBX_APP_SF_OFFSET);
1086 case ECORE_DCBX_SF_IEEE_TCP_PORT:
1087 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1088 DCBX_APP_SF_IEEE_OFFSET);
1089 *entry |= ((u32)DCBX_APP_SF_PORT <<
1090 DCBX_APP_SF_OFFSET);
1092 case ECORE_DCBX_SF_IEEE_UDP_PORT:
1093 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1094 DCBX_APP_SF_IEEE_OFFSET);
1095 *entry |= ((u32)DCBX_APP_SF_PORT <<
1096 DCBX_APP_SF_OFFSET);
1098 case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1099 *entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1100 DCBX_APP_SF_IEEE_OFFSET;
1101 *entry |= ((u32)DCBX_APP_SF_PORT <<
1102 DCBX_APP_SF_OFFSET);
1106 *entry &= ~DCBX_APP_SF_MASK;
1107 if (p_params->app_entry[i].ethtype)
1108 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1109 DCBX_APP_SF_OFFSET);
1111 *entry |= ((u32)DCBX_APP_SF_PORT <<
1112 DCBX_APP_SF_OFFSET);
1114 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1115 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1116 DCBX_APP_PROTOCOL_ID_OFFSET);
1117 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1118 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1119 DCBX_APP_PRI_MAP_OFFSET);
1122 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1126 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1127 struct dcbx_local_params *local_admin,
1128 struct ecore_dcbx_set *params)
1132 local_admin->flags = 0;
1133 OSAL_MEMCPY(&local_admin->features,
1134 &p_hwfn->p_dcbx_info->operational.features,
1135 sizeof(local_admin->features));
1137 if (params->enabled) {
1138 local_admin->config = params->ver_num;
1139 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1141 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1144 if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1145 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1146 ¶ms->config.params);
1148 if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1149 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1150 ¶ms->config.params);
1152 if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1153 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1154 ¶ms->config.params, ieee);
1157 static enum _ecore_status_t
1158 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1159 struct dcb_dscp_map *p_dscp_map,
1160 struct ecore_dcbx_set *p_params)
1165 OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1166 sizeof(*p_dscp_map));
1168 p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1169 if (p_params->dscp.enabled)
1170 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1172 for (i = 0, entry = 0; i < 8; i++) {
1174 for (j = 0; j < 8; j++, entry++)
1175 val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1178 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1181 p_hwfn->p_dcbx_info->dscp_nig_update = true;
1183 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1185 return ECORE_SUCCESS;
1188 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1189 struct ecore_ptt *p_ptt,
1190 struct ecore_dcbx_set *params,
1193 struct dcbx_local_params local_admin;
1194 struct ecore_dcbx_mib_meta_data data;
1195 struct dcb_dscp_map dscp_map;
1196 u32 resp = 0, param = 0;
1197 enum _ecore_status_t rc = ECORE_SUCCESS;
1200 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1201 sizeof(p_hwfn->p_dcbx_info->set));
1202 return ECORE_SUCCESS;
1205 /* clear set-parmas cache */
1206 OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1207 sizeof(struct ecore_dcbx_set));
1209 OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1210 ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1212 data.addr = p_hwfn->mcp_info->port_addr +
1213 offsetof(struct public_port, local_admin_dcbx_mib);
1214 data.local_admin = &local_admin;
1215 data.size = sizeof(struct dcbx_local_params);
1216 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1218 if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1219 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1220 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1222 data.addr = p_hwfn->mcp_info->port_addr +
1223 offsetof(struct public_port, dcb_dscp_map);
1224 data.dscp_map = &dscp_map;
1225 data.size = sizeof(struct dcb_dscp_map);
1226 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1230 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1231 1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, ¶m);
1232 if (rc != ECORE_SUCCESS)
1233 DP_NOTICE(p_hwfn, false,
1234 "Failed to send DCBX update request\n");
1239 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1240 struct ecore_dcbx_set *params)
1242 struct ecore_dcbx_get *dcbx_info;
1245 if (p_hwfn->p_dcbx_info->set.config.valid) {
1246 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1247 sizeof(struct ecore_dcbx_set));
1248 return ECORE_SUCCESS;
1251 dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1252 sizeof(*dcbx_info));
1256 OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1257 rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1258 ECORE_DCBX_OPERATIONAL_MIB);
1260 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1263 p_hwfn->p_dcbx_info->set.override_flags = 0;
1265 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1266 if (dcbx_info->operational.cee)
1267 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1268 if (dcbx_info->operational.ieee)
1269 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1270 if (dcbx_info->operational.local)
1271 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1273 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1274 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1275 &dcbx_info->operational.params,
1276 sizeof(struct ecore_dcbx_admin_params));
1277 p_hwfn->p_dcbx_info->set.config.valid = true;
1279 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1280 sizeof(struct ecore_dcbx_set));
1282 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1284 return ECORE_SUCCESS;