2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
10 #define GTT_REG_ADDR_H
13 /* Access:RW DataWidth:0x20 */
14 #define GTT_BAR0_MAP_REG_IGU_CMD 0x00f000UL
17 /* Access:RW DataWidth:0x20 */
18 #define GTT_BAR0_MAP_REG_TSDM_RAM 0x010000UL
21 /* Access:RW DataWidth:0x20 */
22 #define GTT_BAR0_MAP_REG_MSDM_RAM 0x011000UL
25 /* Access:RW DataWidth:0x20 */
26 #define GTT_BAR0_MAP_REG_MSDM_RAM_1024 0x012000UL
29 /* Access:RW DataWidth:0x20 */
30 #define GTT_BAR0_MAP_REG_USDM_RAM 0x013000UL
33 /* Access:RW DataWidth:0x20 */
34 #define GTT_BAR0_MAP_REG_USDM_RAM_1024 0x014000UL
37 /* Access:RW DataWidth:0x20 */
38 #define GTT_BAR0_MAP_REG_USDM_RAM_2048 0x015000UL
41 /* Access:RW DataWidth:0x20 */
42 #define GTT_BAR0_MAP_REG_XSDM_RAM 0x016000UL
45 /* Access:RW DataWidth:0x20 */
46 #define GTT_BAR0_MAP_REG_YSDM_RAM 0x017000UL
49 /* Access:RW DataWidth:0x20 */
50 #define GTT_BAR0_MAP_REG_PSDM_RAM 0x018000UL