2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
9 #ifndef _INIT_FW_FUNCS_H
10 #define _INIT_FW_FUNCS_H
11 /* Forward declarations */
13 struct init_qm_pq_params;
16 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
18 * Returns the required host memory size in 4KB units.
19 * Must be called before all QM init HSI functions.
21 * @param pf_id - physical function ID
22 * @param num_pf_cids - number of connections used by this PF
23 * @param num_vf_cids - number of connections used by VFs of this PF
24 * @param num_tids - number of tasks used by this PF
25 * @param num_pf_pqs - number of PQs used by this PF
26 * @param num_vf_pqs - number of PQs used by VFs of this PF
28 * @return The required host memory size in 4KB units.
30 u32 ecore_qm_pf_mem_size(u8 pf_id,
38 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for engine
42 * @param max_ports_per_engine - max number of ports per engine in HW
43 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
44 * @param pf_rl_en - enable per-PF rate limiters
45 * @param pf_wfq_en - enable per-PF WFQ
46 * @param vport_rl_en - enable per-VPORT rate limiters
47 * @param vport_wfq_en - enable per-VPORT WFQ
48 * @param port_params - array of size MAX_NUM_PORTS with params for each port
50 * @return 0 on success, -1 on error.
52 int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn,
53 u8 max_ports_per_engine,
54 u8 max_phys_tcs_per_port,
59 struct init_qm_port_params port_params[MAX_NUM_PORTS]);
62 * @brief ecore_qm_pf_rt_init Prepare QM runtime init values for the PF phase
65 * @param p_ptt - ptt window used for writing the registers
66 * @param port_id - port ID
67 * @param pf_id - PF ID
68 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
69 * @param is_first_pf - 1 = first PF in engine, 0 = othwerwise
70 * @param num_pf_cids - number of connections used by this PF
71 * @param num_vf_cids - number of connections used by VFs of this PF
72 * @param num_tids - number of tasks used by this PF
73 * @param start_pq - first Tx PQ ID associated with this PF
74 * @param num_pf_pqs - number of Tx PQs associated with this PF
76 * @param num_vf_pqs - number of Tx PQs associated with a VF
77 * @param start_vport - first VPORT ID associated with this PF
78 * @param num_vports - number of VPORTs associated with this PF
79 * @param pf_wfq - WFQ weight. if PF WFQ is globally disabled, the weight must
80 * be 0. otherwise, the weight must be non-zero.
81 * @param pf_rl - rate limit in Mb/sec units. a value of 0 means don't
82 * configure. ignored if PF RL is globally disabled.
83 * @param pq_params - array of size (num_pf_pqs+num_vf_pqs) with parameters for
84 * each Tx PQ associated with the specified PF.
85 * @param vport_params - array of size num_vports with parameters for each
88 * @return 0 on success, -1 on error.
90 int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn,
91 struct ecore_ptt *p_ptt,
94 u8 max_phys_tcs_per_port,
106 struct init_qm_pq_params *pq_params,
107 struct init_qm_vport_params *vport_params);
110 * @brief ecore_init_pf_wfq Initializes the WFQ weight of the specified PF
113 * @param p_ptt - ptt window used for writing the registers
114 * @param pf_id - PF ID
115 * @param pf_wfq - WFQ weight. Must be non-zero.
117 * @return 0 on success, -1 on error.
119 int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn,
120 struct ecore_ptt *p_ptt,
125 * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF
128 * @param p_ptt - ptt window used for writing the registers
129 * @param pf_id - PF ID
130 * @param pf_rl - rate limit in Mb/sec units
132 * @return 0 on success, -1 on error.
134 int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn,
135 struct ecore_ptt *p_ptt,
140 * @brief ecore_init_vport_wfq Initializes the WFQ weight of specified VPORT
143 * @param p_ptt - ptt window used for writing the registers
144 * @param first_tx_pq_id- An array containing the first Tx PQ ID associated
145 * with the VPORT for each TC. This array is filled by
146 * ecore_qm_pf_rt_init
147 * @param vport_wfq - WFQ weight. Must be non-zero.
149 * @return 0 on success, -1 on error.
151 int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn,
152 struct ecore_ptt *p_ptt,
153 u16 first_tx_pq_id[NUM_OF_TCS],
157 * @brief ecore_init_vport_rl - Initializes the rate limit of the specified
160 * @param p_hwfn - HW device data
161 * @param p_ptt - ptt window used for writing the registers
162 * @param vport_id - VPORT ID
163 * @param vport_rl - rate limit in Mb/sec units
165 * @return 0 on success, -1 on error.
167 int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn,
168 struct ecore_ptt *p_ptt,
173 * @brief ecore_send_qm_stop_cmd Sends a stop command to the QM
176 * @param p_ptt - ptt window used for writing the registers
177 * @param is_release_cmd - true for release, false for stop.
178 * @param is_tx_pq - true for Tx PQs, false for Other PQs.
179 * @param start_pq - first PQ ID to stop
180 * @param num_pqs - Number of PQs to stop, starting from start_pq.
182 * @return bool, true if successful, false if timeout occurred while waiting
183 * for QM command done.
185 bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn,
186 struct ecore_ptt *p_ptt,
191 #ifndef UNUSED_HSI_FUNC
194 * @brief ecore_init_nig_ets - initializes the NIG ETS arbiter
196 * Based on weight/priority requirements per-TC.
198 * @param p_ptt - ptt window used for writing the registers.
199 * @param req - the NIG ETS initialization requirements.
200 * @param is_lb - if set, the loopback port arbiter is initialized, otherwise
201 * the physical port arbiter is initialized. The pure-LB TC
202 * requirements are ignored when is_lb is cleared.
204 void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn,
205 struct ecore_ptt *p_ptt,
206 struct init_ets_req *req,
210 * @brief ecore_init_nig_lb_rl - initializes the NIG LB RLs
212 * Based on global and per-TC rate requirements
214 * @param p_ptt - ptt window used for writing the registers.
215 * @param req - the NIG LB RLs initialization requirements.
217 void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn,
218 struct ecore_ptt *p_ptt,
219 struct init_nig_lb_rl_req *req);
220 #endif /* UNUSED_HSI_FUNC */
223 * @brief ecore_init_nig_pri_tc_map - initializes the NIG priority to TC map.
225 * Assumes valid arguments.
227 * @param p_ptt - ptt window used for writing the registers.
228 * @param req - required mapping from prioirties to TCs.
230 void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn,
231 struct ecore_ptt *p_ptt,
232 struct init_nig_pri_tc_map_req *req);
234 #ifndef UNUSED_HSI_FUNC
236 * @brief ecore_init_prs_ets - initializes the PRS Rx ETS arbiter
238 * Based on weight/priority requirements per-TC.
240 * @param p_ptt - ptt window used for writing the registers.
241 * @param req - the PRS ETS initialization requirements.
243 void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn,
244 struct ecore_ptt *p_ptt,
245 struct init_ets_req *req);
246 #endif /* UNUSED_HSI_FUNC */
248 #ifndef UNUSED_HSI_FUNC
250 * @brief ecore_init_brb_ram - initializes BRB RAM sizes per TC
252 * Based on weight/priority requirements per-TC.
254 * @param p_ptt - ptt window used for writing the registers.
255 * @param req - the BRB RAM initialization requirements.
257 void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn,
258 struct ecore_ptt *p_ptt,
259 struct init_brb_ram_req *req);
260 #endif /* UNUSED_HSI_FUNC */
262 #ifndef UNUSED_HSI_FUNC
264 * @brief ecore_set_engine_mf_ovlan_eth_type - initializes Nig,Prs,Pbf and llh
265 * ethType Regs to input ethType
266 * should Be called once per engine
270 * @param p_ptt - ptt window used for writing the registers.
271 * @param ethType - etherType to configure
273 void ecore_set_engine_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
274 struct ecore_ptt *p_ptt, u32 ethType);
277 * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
278 * input ethType should Be called
281 * @param p_ptt - ptt window used for writing the registers.
282 * @param ethType - etherType to configure
284 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
285 struct ecore_ptt *p_ptt, u32 ethType);
286 #endif /* UNUSED_HSI_FUNC */
289 * @brief ecore_set_vxlan_dest_port - initializes vxlan tunnel destination udp
292 * @param p_ptt - ptt window used for writing the registers.
293 * @param dest_port - vxlan destination udp port.
295 void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn,
296 struct ecore_ptt *p_ptt,
300 * @brief ecore_set_vxlan_enable - enable or disable VXLAN tunnel in HW
302 * @param p_ptt - ptt window used for writing the registers.
303 * @param vxlan_enable - vxlan enable flag.
305 void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn,
306 struct ecore_ptt *p_ptt,
310 * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
312 * @param p_ptt - ptt window used for writing the registers.
313 * @param eth_gre_enable - eth GRE enable enable flag.
314 * @param ip_gre_enable - IP GRE enable enable flag.
316 void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn,
317 struct ecore_ptt *p_ptt,
322 * @brief ecore_set_geneve_dest_port - initializes geneve tunnel destination
325 * @param p_ptt - ptt window used for writing the registers.
326 * @param dest_port - geneve destination udp port.
328 void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn,
329 struct ecore_ptt *p_ptt,
333 * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
335 * @param p_ptt - ptt window used for writing the registers.
336 * @param eth_geneve_enable - eth GENEVE enable enable flag.
337 * @param ip_geneve_enable - IP GENEVE enable enable flag.
339 void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn,
340 struct ecore_ptt *p_ptt,
341 bool eth_geneve_enable,
342 bool ip_geneve_enable);
343 #ifndef UNUSED_HSI_FUNC
346 * @brief ecore_set_gft_event_id_cm_hdr - configure GFT event id and cm header
348 * @param p_ptt - ptt window used for writing the registers.
350 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn,
351 struct ecore_ptt *p_ptt);
354 * @brief ecore_set_rfs_mode_disable - Disable and configure HW for RFS
356 * @param p_hwfn - HW device data
357 * @param p_ptt - ptt window used for writing the registers.
358 * @param pf_id - pf on which to disable RFS.
360 void ecore_set_rfs_mode_disable(struct ecore_hwfn *p_hwfn,
361 struct ecore_ptt *p_ptt,
365 * @brief ecore_set_rfs_mode_enable - enable and configure HW for RFS
367 * @param p_ptt - ptt window used for writing the registers.
368 * @param pf_id - pf on which to enable RFS.
369 * @param tcp - set profile tcp packets.
370 * @param udp - set profile udp packet.
371 * @param ipv4 - set profile ipv4 packet.
372 * @param ipv6 - set profile ipv6 packet.
374 void ecore_set_rfs_mode_enable(struct ecore_hwfn *p_hwfn,
375 struct ecore_ptt *p_ptt,
381 #endif /* UNUSED_HSI_FUNC */
384 * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
385 * used before first ETH queue started.
388 * @param p_ptt - ptt window used for writing the registers. Don't care
389 * if runtime_init used
390 * @param mode - VF zone size mode. Use enum vf_zone_size_mode.
391 * @param runtime_init - Set 1 to init runtime registers in engine phase. Set 0
392 * if VF zone size mode configured after engine phase.
394 void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn, struct ecore_ptt
395 *p_ptt, u16 mode, bool runtime_init);
398 * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by
401 * @param stat_cnt_id - statistic counter id
402 * @param vf_zone_size_mode - VF zone size mode. Use enum vf_zone_size_mode.
404 u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
405 u16 stat_cnt_id, u16 vf_zone_size_mode);
408 * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
411 * @param vf_id - vf id.
412 * @param vf_queue_id - per VF rx queue id.
413 * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode.
415 u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, u8 vf_id, u8
416 vf_queue_id, u16 vf_zone_size_mode);
418 * @brief ecore_enable_context_validation - Enable and configure context
421 * @param p_ptt - ptt window used for writing the registers.
423 void ecore_enable_context_validation(struct ecore_hwfn *p_hwfn,
424 struct ecore_ptt *p_ptt);
426 * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for
430 * @param p_ctx_mem - pointer to context memory.
431 * @param ctx_size - context size.
432 * @param ctx_type - context type.
433 * @param cid - context cid.
435 void ecore_calc_session_ctx_validation(void *p_ctx_mem, u16 ctx_size,
436 u8 ctx_type, u32 cid);
438 * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task
442 * @param p_ctx_mem - pointer to context memory.
443 * @param ctx_size - context size.
444 * @param ctx_type - context type.
445 * @param tid - context tid.
447 void ecore_calc_task_ctx_validation(void *p_ctx_mem, u16 ctx_size,
448 u8 ctx_type, u32 tid);
450 * @brief ecore_memset_session_ctx - Memset session context to 0 while
451 * preserving validation bytes.
454 * @param p_ctx_mem - pointer to context memory.
455 * @param ctx_size - size to initialzie.
456 * @param ctx_type - context type.
458 void ecore_memset_session_ctx(void *p_ctx_mem, u32 ctx_size,
461 * @brief ecore_memset_task_ctx - Memset session context to 0 while preserving
465 * @param p_ctx_mem - pointer to context memory.
466 * @param ctx_size - size to initialzie.
467 * @param ctx_type - context type.
469 void ecore_memset_task_ctx(void *p_ctx_mem, u32 ctx_size,