2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
9 #ifndef __ECORE_INT_H__
10 #define __ECORE_INT_H__
13 #include "ecore_int_api.h"
15 #define ECORE_CAU_DEF_RX_TIMER_RES 0
16 #define ECORE_CAU_DEF_TX_TIMER_RES 0
18 #define ECORE_SB_ATT_IDX 0x0001
19 #define ECORE_SB_EVENT_MASK 0x0003
21 #define SB_ALIGNED_SIZE(p_hwfn) \
22 ALIGNED_TYPE_SIZE(struct status_block_e4, p_hwfn)
24 #define ECORE_SB_INVALID_IDX 0xffff
26 struct ecore_igu_block {
28 #define ECORE_IGU_STATUS_FREE 0x01
29 #define ECORE_IGU_STATUS_VALID 0x02
30 #define ECORE_IGU_STATUS_PF 0x04
31 #define ECORE_IGU_STATUS_DSB 0x08
37 /* Index inside IGU [meant for back reference] */
40 struct ecore_sb_info *sb_info;
43 struct ecore_igu_info {
44 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
47 /* The numbers can shift when using APIs to switch SBs between PF and
50 struct ecore_sb_cnt_info usage;
52 /* Determine whether we can shift SBs between VFs and PFs */
53 bool b_allow_pf_vf_change;
57 * @brief - Make sure the IGU CAM reflects the resources provided by MFW
62 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
63 struct ecore_ptt *p_ptt);
66 * @brief - Make sure IGU CAM reflects the default resources once again,
67 * starting with a 'dirty' SW database.
71 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
72 struct ecore_ptt *p_ptt);
75 * @brief Translate the weakly-defined client sb-id into an IGU sb-id
78 * @param sb_id - user provided sb_id
80 * @return an index inside IGU CAM where the SB resides
82 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
85 * @brief return a pointer to an unused valid SB
88 * @param b_is_pf - true iff we want a SB belonging to a PF
90 * @return point to an igu_block, OSAL_NULL if none is available
92 struct ecore_igu_block *
93 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
94 /* TODO Names of function may change... */
95 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn,
96 struct ecore_ptt *p_ptt,
97 bool b_set, bool b_slowpath);
99 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn);
102 * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
103 * This function needs to be called during hardware
104 * prepare. It reads the info from igu cam to know which
105 * status block is the default / base status block etc.
110 * @return enum _ecore_status_t
112 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn,
113 struct ecore_ptt *p_ptt);
115 typedef enum _ecore_status_t (*ecore_int_comp_cb_t) (struct ecore_hwfn *p_hwfn,
118 * @brief ecore_int_register_cb - Register callback func for
119 * slowhwfn statusblock.
121 * Every protocol that uses the slowhwfn status block
122 * should register a callback function that will be called
123 * once there is an update of the sp status block.
126 * @param comp_cb - function to be called when there is an
127 * interrupt on the sp sb
129 * @param cookie - passed to the callback function
130 * @param sb_idx - OUT parameter which gives the chosen index
132 * @param p_fw_cons - pointer to the actual address of the
133 * consumer for this protocol.
135 * @return enum _ecore_status_t
137 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn,
138 ecore_int_comp_cb_t comp_cb,
140 u8 *sb_idx, __le16 **p_fw_cons);
142 * @brief ecore_int_unregister_cb - Unregisters callback
143 * function from sp sb.
144 * Partner of ecore_int_register_cb -> should be called
145 * when no longer required.
150 * @return enum _ecore_status_t
152 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, u8 pi);
155 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
161 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);
164 * @brief Status block cleanup. Should be called for each status
165 * block that will be used -> both PF / VF
169 * @param sb_id - igu status block id
170 * @param opaque - opaque fid of the sb owner.
171 * @param cleanup_set - set(1) / clear(0)
173 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn,
174 struct ecore_ptt *p_ptt,
180 * @brief ecore_int_cau_conf - configure cau for a given status
190 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn,
191 struct ecore_ptt *p_ptt,
193 u16 igu_sb_id, u16 vf_number, u8 vf_valid);
196 * @brief ecore_int_alloc
201 * @return enum _ecore_status_t
203 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn,
204 struct ecore_ptt *p_ptt);
207 * @brief ecore_int_free
211 void ecore_int_free(struct ecore_hwfn *p_hwfn);
214 * @brief ecore_int_setup
219 void ecore_int_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt);
222 * @brief - Enable Interrupt & Attention for hw function
228 * @return enum _ecore_status_t
230 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
231 struct ecore_ptt *p_ptt,
232 enum ecore_int_mode int_mode);
235 * @brief - Initialize CAU status block entry
243 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
244 struct cau_sb_entry *p_sb_entry, u8 pf_id,
245 u16 vf_number, u8 vf_valid);
247 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
248 struct ecore_ptt *p_ptt,
249 u8 timer_res, u16 sb_id, bool tx);
251 #define ECORE_MAPPING_MEMORY_SIZE(dev) \
252 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
253 136 : NUM_OF_SBS(dev))
255 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
258 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn,
259 struct ecore_ptt *p_ptt,
262 #endif /* __ECORE_INT_H__ */