2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
9 #ifndef __ECORE_INT_API_H__
10 #define __ECORE_INT_API_H__
12 #ifndef __EXTRACT__LINUX__
13 #define ECORE_SB_IDX 0x0002
16 #define TX_PI(tc) (RX_PI + 1 + tc)
18 #ifndef ECORE_INT_MODE
19 #define ECORE_INT_MODE
28 struct ecore_sb_info {
29 struct status_block *sb_virt;
31 u32 sb_ack; /* Last given ack */
33 void OSAL_IOMEM *igu_addr;
35 #define ECORE_SB_INFO_INIT 0x1
36 #define ECORE_SB_INFO_SETUP 0x2
38 #ifdef ECORE_CONFIG_DIRECT_HWFN
39 struct ecore_hwfn *p_hwfn;
41 struct ecore_dev *p_dev;
44 struct ecore_sb_info_dbg {
50 struct ecore_sb_cnt_info {
56 static OSAL_INLINE u16 ecore_sb_update_sb_idx(struct ecore_sb_info *sb_info)
61 /* barrier(); status block is written to by the chip */
62 /* FIXME: need some sort of barrier. */
63 prod = OSAL_LE32_TO_CPU(sb_info->sb_virt->prod_index) &
64 STATUS_BLOCK_PROD_INDEX_MASK;
65 if (sb_info->sb_ack != prod) {
66 sb_info->sb_ack = prod;
70 OSAL_MMIOWB(sb_info->p_dev);
76 * @brief This function creates an update command for interrupts that is
79 * @param sb_info - This is the structure allocated and
80 * initialized per status block. Assumption is
81 * that it was initialized using ecore_sb_init
82 * @param int_cmd - Enable/Disable/Nop
83 * @param upd_flg - whether igu consumer should be
86 * @return OSAL_INLINE void
88 static OSAL_INLINE void ecore_sb_ack(struct ecore_sb_info *sb_info,
89 enum igu_int_cmd int_cmd, u8 upd_flg)
91 struct igu_prod_cons_update igu_ack = { 0 };
93 igu_ack.sb_id_and_flags =
94 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
95 (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
96 (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
97 (IGU_SEG_ACCESS_REG << IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
99 #ifdef ECORE_CONFIG_DIRECT_HWFN
100 DIRECT_REG_WR(sb_info->p_hwfn, sb_info->igu_addr,
101 igu_ack.sb_id_and_flags);
103 DIRECT_REG_WR(OSAL_NULL, sb_info->igu_addr, igu_ack.sb_id_and_flags);
105 /* Both segments (interrupts & acks) are written to same place address;
106 * Need to guarantee all commands will be received (in-order) by HW.
108 OSAL_MMIOWB(sb_info->p_dev);
109 OSAL_BARRIER(sb_info->p_dev);
112 #ifdef ECORE_CONFIG_DIRECT_HWFN
113 static OSAL_INLINE void __internal_ram_wr(struct ecore_hwfn *p_hwfn,
114 void OSAL_IOMEM *addr,
117 static OSAL_INLINE void __internal_ram_wr(void *p_hwfn,
118 void OSAL_IOMEM *addr,
124 for (i = 0; i < size / sizeof(*data); i++)
125 DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]);
128 #ifdef ECORE_CONFIG_DIRECT_HWFN
129 static OSAL_INLINE void __internal_ram_wr_relaxed(struct ecore_hwfn *p_hwfn,
130 void OSAL_IOMEM * addr,
133 static OSAL_INLINE void __internal_ram_wr_relaxed(void *p_hwfn,
134 void OSAL_IOMEM * addr,
140 for (i = 0; i < size / sizeof(*data); i++)
141 DIRECT_REG_WR_RELAXED(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i],
145 #ifdef ECORE_CONFIG_DIRECT_HWFN
146 static OSAL_INLINE void internal_ram_wr(struct ecore_hwfn *p_hwfn,
147 void OSAL_IOMEM * addr,
150 __internal_ram_wr_relaxed(p_hwfn, addr, size, data);
153 static OSAL_INLINE void internal_ram_wr(void OSAL_IOMEM *addr,
156 __internal_ram_wr_relaxed(OSAL_NULL, addr, size, data);
165 enum ecore_coalescing_fsm {
166 ECORE_COAL_RX_STATE_MACHINE,
167 ECORE_COAL_TX_STATE_MACHINE
171 * @brief ecore_int_cau_conf_pi - configure cau for a given
181 void ecore_int_cau_conf_pi(struct ecore_hwfn *p_hwfn,
182 struct ecore_ptt *p_ptt,
185 enum ecore_coalescing_fsm coalescing_fsm,
190 * @brief ecore_int_igu_enable_int - enable device interrupts
194 * @param int_mode - interrupt mode to use
196 void ecore_int_igu_enable_int(struct ecore_hwfn *p_hwfn,
197 struct ecore_ptt *p_ptt,
198 enum ecore_int_mode int_mode);
202 * @brief ecore_int_igu_disable_int - disable device interrupts
207 void ecore_int_igu_disable_int(struct ecore_hwfn *p_hwfn,
208 struct ecore_ptt *p_ptt);
212 * @brief ecore_int_igu_read_sisr_reg - Reads the single isr multiple dpc
219 u64 ecore_int_igu_read_sisr_reg(struct ecore_hwfn *p_hwfn);
221 #define ECORE_SP_SB_ID 0xffff
223 * @brief ecore_int_sb_init - Initializes the sb_info structure.
225 * once the structure is initialized it can be passed to sb related functions.
229 * @param sb_info points to an uninitialized (but
230 * allocated) sb_info structure
231 * @param sb_virt_addr
233 * @param sb_id the sb_id to be used (zero based in driver)
234 * should use ECORE_SP_SB_ID for SP Status block
236 * @return enum _ecore_status_t
238 enum _ecore_status_t ecore_int_sb_init(struct ecore_hwfn *p_hwfn,
239 struct ecore_ptt *p_ptt,
240 struct ecore_sb_info *sb_info,
242 dma_addr_t sb_phy_addr, u16 sb_id);
244 * @brief ecore_int_sb_setup - Setup the sb.
248 * @param sb_info initialized sb_info structure
250 void ecore_int_sb_setup(struct ecore_hwfn *p_hwfn,
251 struct ecore_ptt *p_ptt, struct ecore_sb_info *sb_info);
254 * @brief ecore_int_sb_release - releases the sb_info structure.
256 * once the structure is released, it's memory can be freed
259 * @param sb_info points to an allocated sb_info structure
260 * @param sb_id the sb_id to be used (zero based in driver)
261 * should never be equal to ECORE_SP_SB_ID
264 * @return enum _ecore_status_t
266 enum _ecore_status_t ecore_int_sb_release(struct ecore_hwfn *p_hwfn,
267 struct ecore_sb_info *sb_info,
271 * @brief ecore_int_sp_dpc - To be called when an interrupt is received on the
272 * default status block.
274 * @param p_hwfn - pointer to hwfn
277 void ecore_int_sp_dpc(osal_int_ptr_t hwfn_cookie);
280 * @brief ecore_int_get_num_sbs - get the number of status
281 * blocks configured for this funciton in the igu.
284 * @param p_sb_cnt_info
288 void ecore_int_get_num_sbs(struct ecore_hwfn *p_hwfn,
289 struct ecore_sb_cnt_info *p_sb_cnt_info);
292 * @brief ecore_int_disable_post_isr_release - performs the cleanup post ISR
293 * release. The API need to be called after releasing all slowpath IRQs
299 void ecore_int_disable_post_isr_release(struct ecore_dev *p_dev);
302 * @brief ecore_int_attn_clr_enable - sets whether the general behavior is
303 * preventing attentions from being reasserted, or following the
304 * attributes of the specific attention.
310 void ecore_int_attn_clr_enable(struct ecore_dev *p_dev, bool clr_enable);
313 * @brief Read debug information regarding a given SB.
317 * @param p_sb - point to Status block for which we want to get info.
318 * @param p_info - pointer to struct to fill with information regarding SB.
320 * @return ECORE_SUCCESS if pointer is filled; failure otherwise.
322 enum _ecore_status_t ecore_int_get_sb_dbg(struct ecore_hwfn *p_hwfn,
323 struct ecore_ptt *p_ptt,
324 struct ecore_sb_info *p_sb,
325 struct ecore_sb_info_dbg *p_info);