drivers/net/qede/base/ecore_l2.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "bcm_osal.h"
  10
  11 #include "ecore.h"
  12 #include "ecore_status.h"
  13 #include "ecore_hsi_eth.h"
  14 #include "ecore_chain.h"
  15 #include "ecore_spq.h"
  16 #include "ecore_init_fw_funcs.h"
  17 #include "ecore_cxt.h"
  18 #include "ecore_l2.h"
  19 #include "ecore_sp_commands.h"
  20 #include "ecore_gtt_reg_addr.h"
  21 #include "ecore_iro.h"
  22 #include "reg_addr.h"
  23 #include "ecore_int.h"
  24 #include "ecore_hw.h"
  25 #include "ecore_vf.h"
  26 #include "ecore_sriov.h"
  27 #include "ecore_mcp.h"
  28
  29 #define ECORE_MAX_SGES_NUM 16
  30 #define CRC32_POLY 0x1edc6f41
  31
  32 void ecore_eth_queue_cid_release(struct ecore_hwfn *p_hwfn,
  33                                  struct ecore_queue_cid *p_cid)
  34 {
  35         /* VFs' CIDs are 0-based in PF-view, and uninitialized on VF */
  36         if (!p_cid->is_vf && IS_PF(p_hwfn->p_dev))
  37                 ecore_cxt_release_cid(p_hwfn, p_cid->cid);
  38         OSAL_VFREE(p_hwfn->p_dev, p_cid);
  39 }
  40
  41 /* The internal is only meant to be directly called by PFs initializeing CIDs
  42  * for their VFs.
  43  */
  44 struct ecore_queue_cid *
  45 _ecore_eth_queue_to_cid(struct ecore_hwfn *p_hwfn,
  46                         u16 opaque_fid, u32 cid, u8 vf_qid,
  47                         struct ecore_queue_start_common_params *p_params)
  48 {
  49         bool b_is_same = (p_hwfn->hw_info.opaque_fid == opaque_fid);
  50         struct ecore_queue_cid *p_cid;
  51         enum _ecore_status_t rc;
  52
  53         p_cid = OSAL_VALLOC(p_hwfn->p_dev, sizeof(*p_cid));
  54         if (p_cid == OSAL_NULL)
  55                 return OSAL_NULL;
  56         OSAL_MEM_ZERO(p_cid, sizeof(*p_cid));
  57
  58         p_cid->opaque_fid = opaque_fid;
  59         p_cid->cid = cid;
  60         p_cid->vf_qid = vf_qid;
  61         p_cid->rel = *p_params;
  62
  63         /* Don't try calculating the absolute indices for VFs */
  64         if (IS_VF(p_hwfn->p_dev)) {
  65                 p_cid->abs = p_cid->rel;
  66                 goto out;
  67         }
  68
  69         /* Calculate the engine-absolute indices of the resources.
  70          * The would guarantee they're valid later on.
  71          * In some cases [SBs] we already have the right values.
  72          */
  73         rc = ecore_fw_vport(p_hwfn, p_cid->rel.vport_id, &p_cid->abs.vport_id);
  74         if (rc != ECORE_SUCCESS)
  75                 goto fail;
  76
  77         rc = ecore_fw_l2_queue(p_hwfn, p_cid->rel.queue_id,
  78                                &p_cid->abs.queue_id);
  79         if (rc != ECORE_SUCCESS)
  80                 goto fail;
  81
  82         /* In case of a PF configuring its VF's queues, the stats-id is already
  83          * absolute [since there's a single index that's suitable per-VF].
  84          */
  85         if (b_is_same) {
  86                 rc = ecore_fw_vport(p_hwfn, p_cid->rel.stats_id,
  87                                     &p_cid->abs.stats_id);
  88                 if (rc != ECORE_SUCCESS)
  89                         goto fail;
  90         } else {
  91                 p_cid->abs.stats_id = p_cid->rel.stats_id;
  92         }
  93
  94         /* SBs relevant information was already provided as absolute */
  95         p_cid->abs.sb = p_cid->rel.sb;
  96         p_cid->abs.sb_idx = p_cid->rel.sb_idx;
  97
  98         /* This is tricky - we're actually interested in whehter this is a PF
  99          * entry meant for the VF.
 100          */
 101         if (!b_is_same)
 102                 p_cid->is_vf = true;
 103 out:
 104         DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 105                    "opaque_fid: %04x CID %08x vport %02x [%02x] qzone %04x [%04x] stats %02x [%02x] SB %04x PI %02x\n",
 106                    p_cid->opaque_fid, p_cid->cid,
 107                    p_cid->rel.vport_id, p_cid->abs.vport_id,
 108                    p_cid->rel.queue_id, p_cid->abs.queue_id,
 109                    p_cid->rel.stats_id, p_cid->abs.stats_id,
 110                    p_cid->abs.sb, p_cid->abs.sb_idx);
 111
 112         return p_cid;
 113
 114 fail:
 115         OSAL_VFREE(p_hwfn->p_dev, p_cid);
 116         return OSAL_NULL;
 117 }
 118
 119 static struct ecore_queue_cid *
 120 ecore_eth_queue_to_cid(struct ecore_hwfn *p_hwfn,
 121                        u16 opaque_fid,
 122                        struct ecore_queue_start_common_params *p_params)
 123 {
 124         struct ecore_queue_cid *p_cid;
 125         u32 cid = 0;
 126
 127         /* Get a unique firmware CID for this queue, in case it's a PF.
 128          * VF's don't need a CID as the queue configuration will be done
 129          * by PF.
 130          */
 131         if (IS_PF(p_hwfn->p_dev)) {
 132                 if (ecore_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
 133                                           &cid) != ECORE_SUCCESS) {
 134                         DP_NOTICE(p_hwfn, true, "Failed to acquire cid\n");
 135                         return OSAL_NULL;
 136                 }
 137         }
 138
 139         p_cid = _ecore_eth_queue_to_cid(p_hwfn, opaque_fid, cid, 0, p_params);
 140         if ((p_cid == OSAL_NULL) && IS_PF(p_hwfn->p_dev))
 141                 ecore_cxt_release_cid(p_hwfn, cid);
 142
 143         return p_cid;
 144 }
 145
 146 enum _ecore_status_t
 147 ecore_sp_eth_vport_start(struct ecore_hwfn *p_hwfn,
 148                          struct ecore_sp_vport_start_params *p_params)
 149 {
 150         struct vport_start_ramrod_data *p_ramrod = OSAL_NULL;
 151         struct ecore_spq_entry *p_ent = OSAL_NULL;
 152         struct ecore_sp_init_data init_data;
 153         u16 rx_mode = 0, tx_err = 0;
 154         u8 abs_vport_id = 0;
 155         enum _ecore_status_t rc = ECORE_NOTIMPL;
 156
 157         rc = ecore_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
 158         if (rc != ECORE_SUCCESS)
 159                 return rc;
 160
 161         /* Get SPQ entry */
 162         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 163         init_data.cid = ecore_spq_get_cid(p_hwfn);
 164         init_data.opaque_fid = p_params->opaque_fid;
 165         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
 166
 167         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 168                                    ETH_RAMROD_VPORT_START,
 169                                    PROTOCOLID_ETH, &init_data);
 170         if (rc != ECORE_SUCCESS)
 171                 return rc;
 172
 173         p_ramrod = &p_ent->ramrod.vport_start;
 174         p_ramrod->vport_id = abs_vport_id;
 175
 176         p_ramrod->mtu = OSAL_CPU_TO_LE16(p_params->mtu);
 177         p_ramrod->inner_vlan_removal_en = p_params->remove_inner_vlan;
 178         p_ramrod->handle_ptp_pkts = p_params->handle_ptp_pkts;
 179         p_ramrod->drop_ttl0_en = p_params->drop_ttl0;
 180         p_ramrod->untagged = p_params->only_untagged;
 181         p_ramrod->zero_placement_offset = p_params->zero_placement_offset;
 182
 183         SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
 184         SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
 185
 186         p_ramrod->rx_mode.state = OSAL_CPU_TO_LE16(rx_mode);
 187
 188         /* Handle requests for strict behavior on transmission errors */
 189         SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_VLAN_MODE,
 190                   p_params->b_err_illegal_vlan_mode ?
 191                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 192         SET_FIELD(tx_err, ETH_TX_ERR_VALS_PACKET_TOO_SMALL,
 193                   p_params->b_err_small_pkt ?
 194                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 195         SET_FIELD(tx_err, ETH_TX_ERR_VALS_ANTI_SPOOFING_ERR,
 196                   p_params->b_err_anti_spoof ?
 197                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 198         SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_INBAND_TAGS,
 199                   p_params->b_err_illegal_inband_mode ?
 200                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 201         SET_FIELD(tx_err, ETH_TX_ERR_VALS_VLAN_INSERTION_W_INBAND_TAG,
 202                   p_params->b_err_vlan_insert_with_inband ?
 203                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 204         SET_FIELD(tx_err, ETH_TX_ERR_VALS_MTU_VIOLATION,
 205                   p_params->b_err_big_pkt ?
 206                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 207         SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_CONTROL_FRAME,
 208                   p_params->b_err_ctrl_frame ?
 209                   ETH_TX_ERR_ASSERT_MALICIOUS : 0);
 210         p_ramrod->tx_err_behav.values = OSAL_CPU_TO_LE16(tx_err);
 211
 212         /* TPA related fields */
 213         OSAL_MEMSET(&p_ramrod->tpa_param, 0,
 214                     sizeof(struct eth_vport_tpa_param));
 215         p_ramrod->tpa_param.max_buff_num = p_params->max_buffers_per_cqe;
 216
 217         switch (p_params->tpa_mode) {
 218         case ECORE_TPA_MODE_GRO:
 219                 p_ramrod->tpa_param.tpa_max_aggs_num = ETH_TPA_MAX_AGGS_NUM;
 220                 p_ramrod->tpa_param.tpa_max_size = (u16)-1;
 221                 p_ramrod->tpa_param.tpa_min_size_to_cont = p_params->mtu / 2;
 222                 p_ramrod->tpa_param.tpa_min_size_to_start = p_params->mtu / 2;
 223                 p_ramrod->tpa_param.tpa_ipv4_en_flg = 1;
 224                 p_ramrod->tpa_param.tpa_ipv6_en_flg = 1;
 225                 p_ramrod->tpa_param.tpa_ipv4_tunn_en_flg = 1;
 226                 p_ramrod->tpa_param.tpa_ipv6_tunn_en_flg = 1;
 227                 p_ramrod->tpa_param.tpa_pkt_split_flg = 1;
 228                 p_ramrod->tpa_param.tpa_gro_consistent_flg = 1;
 229                 break;
 230         default:
 231                 break;
 232         }
 233
 234         p_ramrod->tx_switching_en = p_params->tx_switching;
 235 #ifndef ASIC_ONLY
 236         if (CHIP_REV_IS_SLOW(p_hwfn->p_dev))
 237                 p_ramrod->tx_switching_en = 0;
 238 #endif
 239
 240         p_ramrod->ctl_frame_mac_check_en = !!p_params->check_mac;
 241         p_ramrod->ctl_frame_ethtype_check_en = !!p_params->check_ethtype;
 242
 243         /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */
 244         p_ramrod->sw_fid = ecore_concrete_to_sw_fid(p_hwfn->p_dev,
 245                                                     p_params->concrete_fid);
 246
 247         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 248 }
 249
 250 enum _ecore_status_t
 251 ecore_sp_vport_start(struct ecore_hwfn *p_hwfn,
 252                      struct ecore_sp_vport_start_params *p_params)
 253 {
 254         if (IS_VF(p_hwfn->p_dev))
 255                 return ecore_vf_pf_vport_start(p_hwfn, p_params->vport_id,
 256                                                p_params->mtu,
 257                                                p_params->remove_inner_vlan,
 258                                                p_params->tpa_mode,
 259                                                p_params->max_buffers_per_cqe,
 260                                                p_params->only_untagged);
 261
 262         return ecore_sp_eth_vport_start(p_hwfn, p_params);
 263 }
 264
 265 static enum _ecore_status_t
 266 ecore_sp_vport_update_rss(struct ecore_hwfn *p_hwfn,
 267                           struct vport_update_ramrod_data *p_ramrod,
 268                           struct ecore_rss_params *p_rss)
 269 {
 270         enum _ecore_status_t rc = ECORE_SUCCESS;
 271         struct eth_vport_rss_config *p_config;
 272         u16 abs_l2_queue = 0;
 273         int i;
 274
 275         if (!p_rss) {
 276                 p_ramrod->common.update_rss_flg = 0;
 277                 return rc;
 278         }
 279         p_config = &p_ramrod->rss_config;
 280
 281         OSAL_BUILD_BUG_ON(ECORE_RSS_IND_TABLE_SIZE !=
 282                           ETH_RSS_IND_TABLE_ENTRIES_NUM);
 283
 284         rc = ecore_fw_rss_eng(p_hwfn, p_rss->rss_eng_id, &p_config->rss_id);
 285         if (rc != ECORE_SUCCESS)
 286                 return rc;
 287
 288         p_ramrod->common.update_rss_flg = p_rss->update_rss_config;
 289         p_config->update_rss_capabilities = p_rss->update_rss_capabilities;
 290         p_config->update_rss_ind_table = p_rss->update_rss_ind_table;
 291         p_config->update_rss_key = p_rss->update_rss_key;
 292
 293         p_config->rss_mode = p_rss->rss_enable ?
 294             ETH_VPORT_RSS_MODE_REGULAR : ETH_VPORT_RSS_MODE_DISABLED;
 295
 296         p_config->capabilities = 0;
 297
 298         SET_FIELD(p_config->capabilities,
 299                   ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY,
 300                   !!(p_rss->rss_caps & ECORE_RSS_IPV4));
 301         SET_FIELD(p_config->capabilities,
 302                   ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY,
 303                   !!(p_rss->rss_caps & ECORE_RSS_IPV6));
 304         SET_FIELD(p_config->capabilities,
 305                   ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY,
 306                   !!(p_rss->rss_caps & ECORE_RSS_IPV4_TCP));
 307         SET_FIELD(p_config->capabilities,
 308                   ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY,
 309                   !!(p_rss->rss_caps & ECORE_RSS_IPV6_TCP));
 310         SET_FIELD(p_config->capabilities,
 311                   ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY,
 312                   !!(p_rss->rss_caps & ECORE_RSS_IPV4_UDP));
 313         SET_FIELD(p_config->capabilities,
 314                   ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY,
 315                   !!(p_rss->rss_caps & ECORE_RSS_IPV6_UDP));
 316         p_config->tbl_size = p_rss->rss_table_size_log;
 317         p_config->capabilities = OSAL_CPU_TO_LE16(p_config->capabilities);
 318
 319         DP_VERBOSE(p_hwfn, ECORE_MSG_IFUP,
 320                    "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n",
 321                    p_ramrod->common.update_rss_flg,
 322                    p_config->rss_mode,
 323                    p_config->update_rss_capabilities,
 324                    p_config->capabilities,
 325                    p_config->update_rss_ind_table, p_config->update_rss_key);
 326
 327         for (i = 0; i < ECORE_RSS_IND_TABLE_SIZE; i++) {
 328                 rc = ecore_fw_l2_queue(p_hwfn,
 329                                        p_rss->rss_ind_table[i],
 330                                        &abs_l2_queue);
 331                 if (rc != ECORE_SUCCESS)
 332                         return rc;
 333
 334                 p_config->indirection_table[i] = OSAL_CPU_TO_LE16(abs_l2_queue);
 335                 DP_VERBOSE(p_hwfn, ECORE_MSG_IFUP, "i= %d, queue = %d\n",
 336                            i, p_config->indirection_table[i]);
 337         }
 338
 339         for (i = 0; i < 10; i++)
 340                 p_config->rss_key[i] = OSAL_CPU_TO_LE32(p_rss->rss_key[i]);
 341
 342         return rc;
 343 }
 344
 345 static void
 346 ecore_sp_update_accept_mode(struct ecore_hwfn *p_hwfn,
 347                             struct vport_update_ramrod_data *p_ramrod,
 348                             struct ecore_filter_accept_flags accept_flags)
 349 {
 350         p_ramrod->common.update_rx_mode_flg =
 351                                         accept_flags.update_rx_mode_config;
 352         p_ramrod->common.update_tx_mode_flg =
 353                                         accept_flags.update_tx_mode_config;
 354
 355 #ifndef ASIC_ONLY
 356         /* On B0 emulation we cannot enable Tx, since this would cause writes
 357          * to PVFC HW block which isn't implemented in emulation.
 358          */
 359         if (CHIP_REV_IS_SLOW(p_hwfn->p_dev)) {
 360                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 361                            "Non-Asic - prevent Tx mode in vport update\n");
 362                 p_ramrod->common.update_tx_mode_flg = 0;
 363         }
 364 #endif
 365
 366         /* Set Rx mode accept flags */
 367         if (p_ramrod->common.update_rx_mode_flg) {
 368                 u8 accept_filter = accept_flags.rx_accept_filter;
 369                 u16 state = 0;
 370
 371                 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL,
 372                           !(!!(accept_filter & ECORE_ACCEPT_UCAST_MATCHED) ||
 373                            !!(accept_filter & ECORE_ACCEPT_UCAST_UNMATCHED)));
 374
 375                 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED,
 376                           !!(accept_filter & ECORE_ACCEPT_UCAST_UNMATCHED));
 377
 378                 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL,
 379                           !(!!(accept_filter & ECORE_ACCEPT_MCAST_MATCHED) ||
 380                             !!(accept_filter & ECORE_ACCEPT_MCAST_UNMATCHED)));
 381
 382                 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL,
 383                           (!!(accept_filter & ECORE_ACCEPT_MCAST_MATCHED) &&
 384                            !!(accept_filter & ECORE_ACCEPT_MCAST_UNMATCHED)));
 385
 386                 SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL,
 387                           !!(accept_filter & ECORE_ACCEPT_BCAST));
 388
 389                 p_ramrod->rx_mode.state = OSAL_CPU_TO_LE16(state);
 390                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 391                            "vport[%02x] p_ramrod->rx_mode.state = 0x%x\n",
 392                            p_ramrod->common.vport_id, state);
 393         }
 394
 395         /* Set Tx mode accept flags */
 396         if (p_ramrod->common.update_tx_mode_flg) {
 397                 u8 accept_filter = accept_flags.tx_accept_filter;
 398                 u16 state = 0;
 399
 400                 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL,
 401                           !!(accept_filter & ECORE_ACCEPT_NONE));
 402
 403                 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL,
 404                           !!(accept_filter & ECORE_ACCEPT_NONE));
 405
 406                 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL,
 407                           (!!(accept_filter & ECORE_ACCEPT_MCAST_MATCHED) &&
 408                            !!(accept_filter & ECORE_ACCEPT_MCAST_UNMATCHED)));
 409
 410                 SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL,
 411                           !!(accept_filter & ECORE_ACCEPT_BCAST));
 412
 413                 p_ramrod->tx_mode.state = OSAL_CPU_TO_LE16(state);
 414                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 415                            "vport[%02x] p_ramrod->tx_mode.state = 0x%x\n",
 416                            p_ramrod->common.vport_id, state);
 417         }
 418 }
 419
 420 static void
 421 ecore_sp_vport_update_sge_tpa(struct ecore_hwfn *p_hwfn,
 422                               struct vport_update_ramrod_data *p_ramrod,
 423                               struct ecore_sge_tpa_params *p_params)
 424 {
 425         struct eth_vport_tpa_param *p_tpa;
 426
 427         if (!p_params) {
 428                 p_ramrod->common.update_tpa_param_flg = 0;
 429                 p_ramrod->common.update_tpa_en_flg = 0;
 430                 p_ramrod->common.update_tpa_param_flg = 0;
 431                 return;
 432         }
 433
 434         p_ramrod->common.update_tpa_en_flg = p_params->update_tpa_en_flg;
 435         p_tpa = &p_ramrod->tpa_param;
 436         p_tpa->tpa_ipv4_en_flg = p_params->tpa_ipv4_en_flg;
 437         p_tpa->tpa_ipv6_en_flg = p_params->tpa_ipv6_en_flg;
 438         p_tpa->tpa_ipv4_tunn_en_flg = p_params->tpa_ipv4_tunn_en_flg;
 439         p_tpa->tpa_ipv6_tunn_en_flg = p_params->tpa_ipv6_tunn_en_flg;
 440
 441         p_ramrod->common.update_tpa_param_flg = p_params->update_tpa_param_flg;
 442         p_tpa->max_buff_num = p_params->max_buffers_per_cqe;
 443         p_tpa->tpa_pkt_split_flg = p_params->tpa_pkt_split_flg;
 444         p_tpa->tpa_hdr_data_split_flg = p_params->tpa_hdr_data_split_flg;
 445         p_tpa->tpa_gro_consistent_flg = p_params->tpa_gro_consistent_flg;
 446         p_tpa->tpa_max_aggs_num = p_params->tpa_max_aggs_num;
 447         p_tpa->tpa_max_size = p_params->tpa_max_size;
 448         p_tpa->tpa_min_size_to_start = p_params->tpa_min_size_to_start;
 449         p_tpa->tpa_min_size_to_cont = p_params->tpa_min_size_to_cont;
 450 }
 451
 452 static void
 453 ecore_sp_update_mcast_bin(struct ecore_hwfn *p_hwfn,
 454                           struct vport_update_ramrod_data *p_ramrod,
 455                           struct ecore_sp_vport_update_params *p_params)
 456 {
 457         int i;
 458
 459         OSAL_MEMSET(&p_ramrod->approx_mcast.bins, 0,
 460                     sizeof(p_ramrod->approx_mcast.bins));
 461
 462         if (!p_params->update_approx_mcast_flg)
 463                 return;
 464
 465         p_ramrod->common.update_approx_mcast_flg = 1;
 466         for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
 467                 u32 *p_bins = (u32 *)p_params->bins;
 468
 469                 p_ramrod->approx_mcast.bins[i] = OSAL_CPU_TO_LE32(p_bins[i]);
 470         }
 471 }
 472
 473 enum _ecore_status_t
 474 ecore_sp_vport_update(struct ecore_hwfn *p_hwfn,
 475                       struct ecore_sp_vport_update_params *p_params,
 476                       enum spq_mode comp_mode,
 477                       struct ecore_spq_comp_cb *p_comp_data)
 478 {
 479         struct ecore_rss_params *p_rss_params = p_params->rss_params;
 480         struct vport_update_ramrod_data_cmn *p_cmn;
 481         struct ecore_sp_init_data init_data;
 482         struct vport_update_ramrod_data *p_ramrod = OSAL_NULL;
 483         struct ecore_spq_entry *p_ent = OSAL_NULL;
 484         u8 abs_vport_id = 0, val;
 485         enum _ecore_status_t rc = ECORE_NOTIMPL;
 486
 487         if (IS_VF(p_hwfn->p_dev)) {
 488                 rc = ecore_vf_pf_vport_update(p_hwfn, p_params);
 489                 return rc;
 490         }
 491
 492         rc = ecore_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
 493         if (rc != ECORE_SUCCESS)
 494                 return rc;
 495
 496         /* Get SPQ entry */
 497         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 498         init_data.cid = ecore_spq_get_cid(p_hwfn);
 499         init_data.opaque_fid = p_params->opaque_fid;
 500         init_data.comp_mode = comp_mode;
 501         init_data.p_comp_data = p_comp_data;
 502
 503         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 504                                    ETH_RAMROD_VPORT_UPDATE,
 505                                    PROTOCOLID_ETH, &init_data);
 506         if (rc != ECORE_SUCCESS)
 507                 return rc;
 508
 509         /* Copy input params to ramrod according to FW struct */
 510         p_ramrod = &p_ent->ramrod.vport_update;
 511         p_cmn = &p_ramrod->common;
 512
 513         p_cmn->vport_id = abs_vport_id;
 514
 515         p_cmn->rx_active_flg = p_params->vport_active_rx_flg;
 516         p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg;
 517         p_cmn->tx_active_flg = p_params->vport_active_tx_flg;
 518         p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg;
 519
 520         p_cmn->accept_any_vlan = p_params->accept_any_vlan;
 521         val = p_params->update_accept_any_vlan_flg;
 522         p_cmn->update_accept_any_vlan_flg = val;
 523
 524         p_cmn->inner_vlan_removal_en = p_params->inner_vlan_removal_flg;
 525         val = p_params->update_inner_vlan_removal_flg;
 526         p_cmn->update_inner_vlan_removal_en_flg = val;
 527
 528         p_cmn->default_vlan_en = p_params->default_vlan_enable_flg;
 529         val = p_params->update_default_vlan_enable_flg;
 530         p_cmn->update_default_vlan_en_flg = val;
 531
 532         p_cmn->default_vlan = OSAL_CPU_TO_LE16(p_params->default_vlan);
 533         p_cmn->update_default_vlan_flg = p_params->update_default_vlan_flg;
 534
 535         p_cmn->silent_vlan_removal_en = p_params->silent_vlan_removal_flg;
 536
 537         p_ramrod->common.tx_switching_en = p_params->tx_switching_flg;
 538
 539 #ifndef ASIC_ONLY
 540         if (CHIP_REV_IS_FPGA(p_hwfn->p_dev))
 541                 if (p_ramrod->common.tx_switching_en ||
 542                     p_ramrod->common.update_tx_switching_en_flg) {
 543                         DP_NOTICE(p_hwfn, false,
 544                                   "FPGA - why are we seeing tx-switching? Overriding it\n");
 545                         p_ramrod->common.tx_switching_en = 0;
 546                         p_ramrod->common.update_tx_switching_en_flg = 1;
 547                 }
 548 #endif
 549         p_cmn->update_tx_switching_en_flg = p_params->update_tx_switching_flg;
 550
 551         p_cmn->anti_spoofing_en = p_params->anti_spoofing_en;
 552         val = p_params->update_anti_spoofing_en_flg;
 553         p_ramrod->common.update_anti_spoofing_en_flg = val;
 554
 555         rc = ecore_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params);
 556         if (rc != ECORE_SUCCESS) {
 557                 /* Return spq entry which is taken in ecore_sp_init_request()*/
 558                 ecore_spq_return_entry(p_hwfn, p_ent);
 559                 return rc;
 560         }
 561
 562         /* Update mcast bins for VFs, PF doesn't use this functionality */
 563         ecore_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params);
 564
 565         ecore_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
 566         ecore_sp_vport_update_sge_tpa(p_hwfn, p_ramrod,
 567                                       p_params->sge_tpa_params);
 568         if (p_params->mtu) {
 569                 p_ramrod->common.update_mtu_flg = 1;
 570                 p_ramrod->common.mtu = OSAL_CPU_TO_LE16(p_params->mtu);
 571         }
 572
 573         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 574 }
 575
 576 enum _ecore_status_t ecore_sp_vport_stop(struct ecore_hwfn *p_hwfn,
 577                                          u16 opaque_fid, u8 vport_id)
 578 {
 579         struct vport_stop_ramrod_data *p_ramrod;
 580         struct ecore_sp_init_data init_data;
 581         struct ecore_spq_entry *p_ent;
 582         u8 abs_vport_id = 0;
 583         enum _ecore_status_t rc;
 584
 585         if (IS_VF(p_hwfn->p_dev))
 586                 return ecore_vf_pf_vport_stop(p_hwfn);
 587
 588         rc = ecore_fw_vport(p_hwfn, vport_id, &abs_vport_id);
 589         if (rc != ECORE_SUCCESS)
 590                 return rc;
 591
 592         /* Get SPQ entry */
 593         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 594         init_data.cid = ecore_spq_get_cid(p_hwfn);
 595         init_data.opaque_fid = opaque_fid;
 596         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
 597
 598         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 599                                    ETH_RAMROD_VPORT_STOP,
 600                                    PROTOCOLID_ETH, &init_data);
 601         if (rc != ECORE_SUCCESS)
 602                 return rc;
 603
 604         p_ramrod = &p_ent->ramrod.vport_stop;
 605         p_ramrod->vport_id = abs_vport_id;
 606
 607         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 608 }
 609
 610 static enum _ecore_status_t
 611 ecore_vf_pf_accept_flags(struct ecore_hwfn *p_hwfn,
 612                          struct ecore_filter_accept_flags *p_accept_flags)
 613 {
 614         struct ecore_sp_vport_update_params s_params;
 615
 616         OSAL_MEMSET(&s_params, 0, sizeof(s_params));
 617         OSAL_MEMCPY(&s_params.accept_flags, p_accept_flags,
 618                     sizeof(struct ecore_filter_accept_flags));
 619
 620         return ecore_vf_pf_vport_update(p_hwfn, &s_params);
 621 }
 622
 623 enum _ecore_status_t
 624 ecore_filter_accept_cmd(struct ecore_dev *p_dev,
 625                         u8 vport,
 626                         struct ecore_filter_accept_flags accept_flags,
 627                         u8 update_accept_any_vlan,
 628                         u8 accept_any_vlan,
 629                         enum spq_mode comp_mode,
 630                         struct ecore_spq_comp_cb *p_comp_data)
 631 {
 632         struct ecore_sp_vport_update_params vport_update_params;
 633         int i, rc;
 634
 635         /* Prepare and send the vport rx_mode change */
 636         OSAL_MEMSET(&vport_update_params, 0, sizeof(vport_update_params));
 637         vport_update_params.vport_id = vport;
 638         vport_update_params.accept_flags = accept_flags;
 639         vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan;
 640         vport_update_params.accept_any_vlan = accept_any_vlan;
 641
 642         for_each_hwfn(p_dev, i) {
 643                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 644
 645                 vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
 646
 647                 if (IS_VF(p_dev)) {
 648                         rc = ecore_vf_pf_accept_flags(p_hwfn, &accept_flags);
 649                         if (rc != ECORE_SUCCESS)
 650                                 return rc;
 651                         continue;
 652                 }
 653
 654                 rc = ecore_sp_vport_update(p_hwfn, &vport_update_params,
 655                                            comp_mode, p_comp_data);
 656                 if (rc != ECORE_SUCCESS) {
 657                         DP_ERR(p_dev, "Update rx_mode failed %d\n", rc);
 658                         return rc;
 659                 }
 660
 661                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 662                            "Accept filter configured, flags = [Rx]%x [Tx]%x\n",
 663                            accept_flags.rx_accept_filter,
 664                            accept_flags.tx_accept_filter);
 665
 666                 if (update_accept_any_vlan)
 667                         DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 668                                    "accept_any_vlan=%d configured\n",
 669                                    accept_any_vlan);
 670         }
 671
 672         return 0;
 673 }
 674
 675 enum _ecore_status_t
 676 ecore_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,
 677                            struct ecore_queue_cid *p_cid,
 678                            u16 bd_max_bytes,
 679                            dma_addr_t bd_chain_phys_addr,
 680                            dma_addr_t cqe_pbl_addr,
 681                            u16 cqe_pbl_size)
 682 {
 683         struct rx_queue_start_ramrod_data *p_ramrod = OSAL_NULL;
 684         struct ecore_spq_entry *p_ent = OSAL_NULL;
 685         struct ecore_sp_init_data init_data;
 686         enum _ecore_status_t rc = ECORE_NOTIMPL;
 687
 688         DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 689                    "opaque_fid=0x%x, cid=0x%x, rx_qzone=0x%x, vport_id=0x%x, sb_id=0x%x\n",
 690                    p_cid->opaque_fid, p_cid->cid, p_cid->abs.queue_id,
 691                    p_cid->abs.vport_id, p_cid->abs.sb);
 692
 693         /* Get SPQ entry */
 694         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 695         init_data.cid = p_cid->cid;
 696         init_data.opaque_fid = p_cid->opaque_fid;
 697         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
 698
 699         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 700                                    ETH_RAMROD_RX_QUEUE_START,
 701                                    PROTOCOLID_ETH, &init_data);
 702         if (rc != ECORE_SUCCESS)
 703                 return rc;
 704
 705         p_ramrod = &p_ent->ramrod.rx_queue_start;
 706
 707         p_ramrod->sb_id = OSAL_CPU_TO_LE16(p_cid->abs.sb);
 708         p_ramrod->sb_index = p_cid->abs.sb_idx;
 709         p_ramrod->vport_id = p_cid->abs.vport_id;
 710         p_ramrod->stats_counter_id = p_cid->abs.stats_id;
 711         p_ramrod->rx_queue_id = OSAL_CPU_TO_LE16(p_cid->abs.queue_id);
 712         p_ramrod->complete_cqe_flg = 0;
 713         p_ramrod->complete_event_flg = 1;
 714
 715         p_ramrod->bd_max_bytes = OSAL_CPU_TO_LE16(bd_max_bytes);
 716         DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr);
 717
 718         p_ramrod->num_of_pbl_pages = OSAL_CPU_TO_LE16(cqe_pbl_size);
 719         DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);
 720
 721         if (p_cid->is_vf) {
 722                 p_ramrod->vf_rx_prod_index = p_cid->vf_qid;
 723                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
 724                            "Queue%s is meant for VF rxq[%02x]\n",
 725                            !!p_cid->b_legacy_vf ? " [legacy]" : "",
 726                            p_cid->vf_qid);
 727                 p_ramrod->vf_rx_prod_use_zone_a = !!p_cid->b_legacy_vf;
 728         }
 729
 730         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 731 }
 732
 733 static enum _ecore_status_t
 734 ecore_eth_pf_rx_queue_start(struct ecore_hwfn *p_hwfn,
 735                             struct ecore_queue_cid *p_cid,
 736                             u16 bd_max_bytes,
 737                             dma_addr_t bd_chain_phys_addr,
 738                             dma_addr_t cqe_pbl_addr,
 739                             u16 cqe_pbl_size,
 740                             void OSAL_IOMEM * *pp_producer)
 741 {
 742         u32 init_prod_val = 0;
 743
 744         *pp_producer = (u8 OSAL_IOMEM *)
 745                        p_hwfn->regview +
 746                        GTT_BAR0_MAP_REG_MSDM_RAM +
 747                        MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id);
 748
 749         /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 750         __internal_ram_wr(p_hwfn, *pp_producer, sizeof(u32),
 751                           (u32 *)(&init_prod_val));
 752
 753         return ecore_eth_rxq_start_ramrod(p_hwfn, p_cid,
 754                                           bd_max_bytes,
 755                                           bd_chain_phys_addr,
 756                                           cqe_pbl_addr, cqe_pbl_size);
 757 }
 758
 759 enum _ecore_status_t
 760 ecore_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
 761                          u16 opaque_fid,
 762                          struct ecore_queue_start_common_params *p_params,
 763                          u16 bd_max_bytes,
 764                          dma_addr_t bd_chain_phys_addr,
 765                          dma_addr_t cqe_pbl_addr,
 766                          u16 cqe_pbl_size,
 767                          struct ecore_rxq_start_ret_params *p_ret_params)
 768 {
 769         struct ecore_queue_cid *p_cid;
 770         enum _ecore_status_t rc;
 771
 772         /* Allocate a CID for the queue */
 773         p_cid = ecore_eth_queue_to_cid(p_hwfn, opaque_fid, p_params);
 774         if (p_cid == OSAL_NULL)
 775                 return ECORE_NOMEM;
 776
 777         if (IS_PF(p_hwfn->p_dev))
 778                 rc = ecore_eth_pf_rx_queue_start(p_hwfn, p_cid,
 779                                                  bd_max_bytes,
 780                                                  bd_chain_phys_addr,
 781                                                  cqe_pbl_addr, cqe_pbl_size,
 782                                                  &p_ret_params->p_prod);
 783         else
 784                 rc = ecore_vf_pf_rxq_start(p_hwfn, p_cid,
 785                                            bd_max_bytes,
 786                                            bd_chain_phys_addr,
 787                                            cqe_pbl_addr,
 788                                            cqe_pbl_size,
 789                                            &p_ret_params->p_prod);
 790
 791         /* Provide the caller with a reference to as handler */
 792         if (rc != ECORE_SUCCESS)
 793                 ecore_eth_queue_cid_release(p_hwfn, p_cid);
 794         else
 795                 p_ret_params->p_handle = (void *)p_cid;
 796
 797         return rc;
 798 }
 799
 800 enum _ecore_status_t
 801 ecore_sp_eth_rx_queues_update(struct ecore_hwfn *p_hwfn,
 802                               void **pp_rxq_handles,
 803                               u8 num_rxqs,
 804                               u8 complete_cqe_flg,
 805                               u8 complete_event_flg,
 806                               enum spq_mode comp_mode,
 807                               struct ecore_spq_comp_cb *p_comp_data)
 808 {
 809         struct rx_queue_update_ramrod_data *p_ramrod = OSAL_NULL;
 810         struct ecore_spq_entry *p_ent = OSAL_NULL;
 811         struct ecore_sp_init_data init_data;
 812         struct ecore_queue_cid *p_cid;
 813         enum _ecore_status_t rc = ECORE_NOTIMPL;
 814         u8 i;
 815
 816         if (IS_VF(p_hwfn->p_dev))
 817                 return ecore_vf_pf_rxqs_update(p_hwfn,
 818                                                (struct ecore_queue_cid **)
 819                                                pp_rxq_handles,
 820                                                num_rxqs,
 821                                                complete_cqe_flg,
 822                                                complete_event_flg);
 823
 824         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 825         init_data.comp_mode = comp_mode;
 826         init_data.p_comp_data = p_comp_data;
 827
 828         for (i = 0; i < num_rxqs; i++) {
 829                 p_cid = ((struct ecore_queue_cid **)pp_rxq_handles)[i];
 830
 831                 /* Get SPQ entry */
 832                 init_data.cid = p_cid->cid;
 833                 init_data.opaque_fid = p_cid->opaque_fid;
 834
 835                 rc = ecore_sp_init_request(p_hwfn, &p_ent,
 836                                            ETH_RAMROD_RX_QUEUE_UPDATE,
 837                                            PROTOCOLID_ETH, &init_data);
 838                 if (rc != ECORE_SUCCESS)
 839                         return rc;
 840
 841                 p_ramrod = &p_ent->ramrod.rx_queue_update;
 842                 p_ramrod->vport_id = p_cid->abs.vport_id;
 843
 844                 p_ramrod->rx_queue_id = OSAL_CPU_TO_LE16(p_cid->abs.queue_id);
 845                 p_ramrod->complete_cqe_flg = complete_cqe_flg;
 846                 p_ramrod->complete_event_flg = complete_event_flg;
 847
 848                 rc = ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 849                 if (rc != ECORE_SUCCESS)
 850                         return rc;
 851         }
 852
 853         return rc;
 854 }
 855
 856 static enum _ecore_status_t
 857 ecore_eth_pf_rx_queue_stop(struct ecore_hwfn *p_hwfn,
 858                            struct ecore_queue_cid *p_cid,
 859                            bool b_eq_completion_only,
 860                            bool b_cqe_completion)
 861 {
 862         struct rx_queue_stop_ramrod_data *p_ramrod = OSAL_NULL;
 863         struct ecore_spq_entry *p_ent = OSAL_NULL;
 864         struct ecore_sp_init_data init_data;
 865         enum _ecore_status_t rc;
 866
 867         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 868         init_data.cid = p_cid->cid;
 869         init_data.opaque_fid = p_cid->opaque_fid;
 870         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
 871
 872         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 873                                    ETH_RAMROD_RX_QUEUE_STOP,
 874                                    PROTOCOLID_ETH, &init_data);
 875         if (rc != ECORE_SUCCESS)
 876                 return rc;
 877
 878         p_ramrod = &p_ent->ramrod.rx_queue_stop;
 879         p_ramrod->vport_id = p_cid->abs.vport_id;
 880         p_ramrod->rx_queue_id = OSAL_CPU_TO_LE16(p_cid->abs.queue_id);
 881
 882         /* Cleaning the queue requires the completion to arrive there.
 883          * In addition, VFs require the answer to come as eqe to PF.
 884          */
 885         p_ramrod->complete_cqe_flg = (!p_cid->is_vf && !b_eq_completion_only) ||
 886                                      b_cqe_completion;
 887         p_ramrod->complete_event_flg = p_cid->is_vf || b_eq_completion_only;
 888
 889         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 890 }
 891
 892 enum _ecore_status_t ecore_eth_rx_queue_stop(struct ecore_hwfn *p_hwfn,
 893                                              void *p_rxq,
 894                                              bool eq_completion_only,
 895                                              bool cqe_completion)
 896 {
 897         struct ecore_queue_cid *p_cid = (struct ecore_queue_cid *)p_rxq;
 898         enum _ecore_status_t rc = ECORE_NOTIMPL;
 899
 900         if (IS_PF(p_hwfn->p_dev))
 901                 rc = ecore_eth_pf_rx_queue_stop(p_hwfn, p_cid,
 902                                                 eq_completion_only,
 903                                                 cqe_completion);
 904         else
 905                 rc = ecore_vf_pf_rxq_stop(p_hwfn, p_cid, cqe_completion);
 906
 907         if (rc == ECORE_SUCCESS)
 908                 ecore_eth_queue_cid_release(p_hwfn, p_cid);
 909         return rc;
 910 }
 911
 912 enum _ecore_status_t
 913 ecore_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
 914                            struct ecore_queue_cid *p_cid,
 915                            dma_addr_t pbl_addr, u16 pbl_size,
 916                            u16 pq_id)
 917 {
 918         struct tx_queue_start_ramrod_data *p_ramrod = OSAL_NULL;
 919         struct ecore_spq_entry *p_ent = OSAL_NULL;
 920         struct ecore_sp_init_data init_data;
 921         enum _ecore_status_t rc = ECORE_NOTIMPL;
 922
 923         /* Get SPQ entry */
 924         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 925         init_data.cid = p_cid->cid;
 926         init_data.opaque_fid = p_cid->opaque_fid;
 927         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
 928
 929         rc = ecore_sp_init_request(p_hwfn, &p_ent,
 930                                    ETH_RAMROD_TX_QUEUE_START,
 931                                    PROTOCOLID_ETH, &init_data);
 932         if (rc != ECORE_SUCCESS)
 933                 return rc;
 934
 935         p_ramrod = &p_ent->ramrod.tx_queue_start;
 936         p_ramrod->vport_id = p_cid->abs.vport_id;
 937
 938         p_ramrod->sb_id = OSAL_CPU_TO_LE16(p_cid->abs.sb);
 939         p_ramrod->sb_index = p_cid->abs.sb_idx;
 940         p_ramrod->stats_counter_id = p_cid->abs.stats_id;
 941
 942         p_ramrod->queue_zone_id = OSAL_CPU_TO_LE16(p_cid->abs.queue_id);
 943         p_ramrod->same_as_last_id = OSAL_CPU_TO_LE16(p_cid->abs.queue_id);
 944
 945         p_ramrod->pbl_size = OSAL_CPU_TO_LE16(pbl_size);
 946         DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
 947
 948         p_ramrod->qm_pq_id = OSAL_CPU_TO_LE16(pq_id);
 949
 950         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 951 }
 952
 953 static enum _ecore_status_t
 954 ecore_eth_pf_tx_queue_start(struct ecore_hwfn *p_hwfn,
 955                             struct ecore_queue_cid *p_cid,
 956                             u8 tc,
 957                             dma_addr_t pbl_addr, u16 pbl_size,
 958                             void OSAL_IOMEM * *pp_doorbell)
 959 {
 960         enum _ecore_status_t rc;
 961
 962         /* TODO - set tc in the pq_params for multi-cos */
 963         rc = ecore_eth_txq_start_ramrod(p_hwfn, p_cid,
 964                                         pbl_addr, pbl_size,
 965                                         ecore_get_cm_pq_idx_mcos(p_hwfn, tc));
 966         if (rc != ECORE_SUCCESS)
 967                 return rc;
 968
 969         /* Provide the caller with the necessary return values */
 970         *pp_doorbell = (u8 OSAL_IOMEM *)
 971                        p_hwfn->doorbells +
 972                        DB_ADDR(p_cid->cid, DQ_DEMS_LEGACY);
 973
 974         return ECORE_SUCCESS;
 975 }
 976
 977 enum _ecore_status_t
 978 ecore_eth_tx_queue_start(struct ecore_hwfn *p_hwfn, u16 opaque_fid,
 979                          struct ecore_queue_start_common_params *p_params,
 980                          u8 tc,
 981                          dma_addr_t pbl_addr, u16 pbl_size,
 982                          struct ecore_txq_start_ret_params *p_ret_params)
 983 {
 984         struct ecore_queue_cid *p_cid;
 985         enum _ecore_status_t rc;
 986
 987         p_cid = ecore_eth_queue_to_cid(p_hwfn, opaque_fid, p_params);
 988         if (p_cid == OSAL_NULL)
 989                 return ECORE_INVAL;
 990
 991         if (IS_PF(p_hwfn->p_dev))
 992                 rc = ecore_eth_pf_tx_queue_start(p_hwfn, p_cid, tc,
 993                                                  pbl_addr, pbl_size,
 994                                                  &p_ret_params->p_doorbell);
 995         else
 996                 rc = ecore_vf_pf_txq_start(p_hwfn, p_cid,
 997                                            pbl_addr, pbl_size,
 998                                            &p_ret_params->p_doorbell);
 999
1000         if (rc != ECORE_SUCCESS)
1001                 ecore_eth_queue_cid_release(p_hwfn, p_cid);
1002         else
1003                 p_ret_params->p_handle = (void *)p_cid;
1004
1005         return rc;
1006 }
1007
1008 static enum _ecore_status_t
1009 ecore_eth_pf_tx_queue_stop(struct ecore_hwfn *p_hwfn,
1010                            struct ecore_queue_cid *p_cid)
1011 {
1012         struct ecore_spq_entry *p_ent = OSAL_NULL;
1013         struct ecore_sp_init_data init_data;
1014         enum _ecore_status_t rc;
1015
1016         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
1017         init_data.cid = p_cid->cid;
1018         init_data.opaque_fid = p_cid->opaque_fid;
1019         init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
1020
1021         rc = ecore_sp_init_request(p_hwfn, &p_ent,
1022                                    ETH_RAMROD_TX_QUEUE_STOP,
1023                                    PROTOCOLID_ETH, &init_data);
1024         if (rc != ECORE_SUCCESS)
1025                 return rc;
1026
1027         return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
1028 }
1029
1030 enum _ecore_status_t ecore_eth_tx_queue_stop(struct ecore_hwfn *p_hwfn,
1031                                              void *p_handle)
1032 {
1033         struct ecore_queue_cid *p_cid = (struct ecore_queue_cid *)p_handle;
1034         enum _ecore_status_t rc;
1035
1036         if (IS_PF(p_hwfn->p_dev))
1037                 rc = ecore_eth_pf_tx_queue_stop(p_hwfn, p_cid);
1038         else
1039                 rc = ecore_vf_pf_txq_stop(p_hwfn, p_cid);
1040
1041         if (rc == ECORE_SUCCESS)
1042                 ecore_eth_queue_cid_release(p_hwfn, p_cid);
1043         return rc;
1044 }
1045
1046 static enum eth_filter_action
1047 ecore_filter_action(enum ecore_filter_opcode opcode)
1048 {
1049         enum eth_filter_action action = MAX_ETH_FILTER_ACTION;
1050
1051         switch (opcode) {
1052         case ECORE_FILTER_ADD:
1053                 action = ETH_FILTER_ACTION_ADD;
1054                 break;
1055         case ECORE_FILTER_REMOVE:
1056                 action = ETH_FILTER_ACTION_REMOVE;
1057                 break;
1058         case ECORE_FILTER_FLUSH:
1059                 action = ETH_FILTER_ACTION_REMOVE_ALL;
1060                 break;
1061         default:
1062                 action = MAX_ETH_FILTER_ACTION;
1063         }
1064
1065         return action;
1066 }
1067
1068 static enum _ecore_status_t
1069 ecore_filter_ucast_common(struct ecore_hwfn *p_hwfn,
1070                           u16 opaque_fid,
1071                           struct ecore_filter_ucast *p_filter_cmd,
1072                           struct vport_filter_update_ramrod_data **pp_ramrod,
1073                           struct ecore_spq_entry **pp_ent,
1074                           enum spq_mode comp_mode,
1075                           struct ecore_spq_comp_cb *p_comp_data)
1076 {
1077         u8 vport_to_add_to = 0, vport_to_remove_from = 0;
1078         struct vport_filter_update_ramrod_data *p_ramrod;
1079         struct eth_filter_cmd *p_first_filter;
1080         struct eth_filter_cmd *p_second_filter;
1081         struct ecore_sp_init_data init_data;
1082         enum eth_filter_action action;
1083         enum _ecore_status_t rc;
1084
1085         rc = ecore_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
1086                             &vport_to_remove_from);
1087         if (rc != ECORE_SUCCESS)
1088                 return rc;
1089
1090         rc = ecore_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
1091                             &vport_to_add_to);
1092         if (rc != ECORE_SUCCESS)
1093                 return rc;
1094
1095         /* Get SPQ entry */
1096         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
1097         init_data.cid = ecore_spq_get_cid(p_hwfn);
1098         init_data.opaque_fid = opaque_fid;
1099         init_data.comp_mode = comp_mode;
1100         init_data.p_comp_data = p_comp_data;
1101
1102         rc = ecore_sp_init_request(p_hwfn, pp_ent,
1103                                    ETH_RAMROD_FILTERS_UPDATE,
1104                                    PROTOCOLID_ETH, &init_data);
1105         if (rc != ECORE_SUCCESS)
1106                 return rc;
1107
1108         *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update;
1109         p_ramrod = *pp_ramrod;
1110         p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0;
1111         p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0;
1112
1113 #ifndef ASIC_ONLY
1114         if (CHIP_REV_IS_SLOW(p_hwfn->p_dev)) {
1115                 DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
1116                            "Non-Asic - prevent Tx filters\n");
1117                 p_ramrod->filter_cmd_hdr.tx = 0;
1118         }
1119 #endif
1120
1121         switch (p_filter_cmd->opcode) {
1122         case ECORE_FILTER_REPLACE:
1123         case ECORE_FILTER_MOVE:
1124                 p_ramrod->filter_cmd_hdr.cmd_cnt = 2;
1125                 break;
1126         default:
1127                 p_ramrod->filter_cmd_hdr.cmd_cnt = 1;
1128                 break;
1129         }
1130
1131         p_first_filter = &p_ramrod->filter_cmds[0];
1132         p_second_filter = &p_ramrod->filter_cmds[1];
1133
1134         switch (p_filter_cmd->type) {
1135         case ECORE_FILTER_MAC:
1136                 p_first_filter->type = ETH_FILTER_TYPE_MAC;
1137                 break;
1138         case ECORE_FILTER_VLAN:
1139                 p_first_filter->type = ETH_FILTER_TYPE_VLAN;
1140                 break;
1141         case ECORE_FILTER_MAC_VLAN:
1142                 p_first_filter->type = ETH_FILTER_TYPE_PAIR;
1143                 break;
1144         case ECORE_FILTER_INNER_MAC:
1145                 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC;
1146                 break;
1147         case ECORE_FILTER_INNER_VLAN:
1148                 p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN;
1149                 break;
1150         case ECORE_FILTER_INNER_PAIR:
1151                 p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR;
1152                 break;
1153         case ECORE_FILTER_INNER_MAC_VNI_PAIR:
1154                 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR;
1155                 break;
1156         case ECORE_FILTER_MAC_VNI_PAIR:
1157                 p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR;
1158                 break;
1159         case ECORE_FILTER_VNI:
1160                 p_first_filter->type = ETH_FILTER_TYPE_VNI;
1161                 break;
1162         case ECORE_FILTER_UNUSED: /* @DPDK */
1163                 p_first_filter->type = MAX_ETH_FILTER_TYPE;
1164                 break;
1165         }
1166
1167         if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) ||
1168             (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
1169             (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) ||
1170             (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) ||
1171             (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
1172             (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR))
1173                 ecore_set_fw_mac_addr(&p_first_filter->mac_msb,
1174                                       &p_first_filter->mac_mid,
1175                                       &p_first_filter->mac_lsb,
1176                                       (u8 *)p_filter_cmd->mac);
1177
1178         if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) ||
1179             (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
1180             (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) ||
1181             (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR))
1182                 p_first_filter->vlan_id = OSAL_CPU_TO_LE16(p_filter_cmd->vlan);
1183
1184         if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
1185             (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) ||
1186             (p_first_filter->type == ETH_FILTER_TYPE_VNI))
1187                 p_first_filter->vni = OSAL_CPU_TO_LE32(p_filter_cmd->vni);
1188
1189         if (p_filter_cmd->opcode == ECORE_FILTER_MOVE) {
1190                 p_second_filter->type = p_first_filter->type;
1191                 p_second_filter->mac_msb = p_first_filter->mac_msb;
1192                 p_second_filter->mac_mid = p_first_filter->mac_mid;
1193                 p_second_filter->mac_lsb = p_first_filter->mac_lsb;
1194                 p_second_filter->vlan_id = p_first_filter->vlan_id;
1195                 p_second_filter->vni = p_first_filter->vni;
1196
1197                 p_first_filter->action = ETH_FILTER_ACTION_REMOVE;
1198
1199                 p_first_filter->vport_id = vport_to_remove_from;
1200
1201                 p_second_filter->action = ETH_FILTER_ACTION_ADD;
1202                 p_second_filter->vport_id = vport_to_add_to;
1203         } else if (p_filter_cmd->opcode == ECORE_FILTER_REPLACE) {
1204                 p_first_filter->vport_id = vport_to_add_to;
1205                 OSAL_MEMCPY(p_second_filter, p_first_filter,
1206                             sizeof(*p_second_filter));
1207                 p_first_filter->action = ETH_FILTER_ACTION_REMOVE_ALL;
1208                 p_second_filter->action = ETH_FILTER_ACTION_ADD;
1209         } else {
1210                 action = ecore_filter_action(p_filter_cmd->opcode);
1211
1212                 if (action == MAX_ETH_FILTER_ACTION) {
1213                         DP_NOTICE(p_hwfn, true,
1214                                   "%d is not supported yet\n",
1215                                   p_filter_cmd->opcode);
1216                         return ECORE_NOTIMPL;
1217                 }
1218
1219                 p_first_filter->action = action;
1220                 p_first_filter->vport_id =
1221                     (p_filter_cmd->opcode == ECORE_FILTER_REMOVE) ?
1222                     vport_to_remove_from : vport_to_add_to;
1223         }
1224
1225         return ECORE_SUCCESS;
1226 }
1227
1228 enum _ecore_status_t
1229 ecore_sp_eth_filter_ucast(struct ecore_hwfn *p_hwfn,
1230                           u16 opaque_fid,
1231                           struct ecore_filter_ucast *p_filter_cmd,
1232                           enum spq_mode comp_mode,
1233                           struct ecore_spq_comp_cb *p_comp_data)
1234 {
1235         struct vport_filter_update_ramrod_data *p_ramrod = OSAL_NULL;
1236         struct ecore_spq_entry *p_ent = OSAL_NULL;
1237         struct eth_filter_cmd_header *p_header;
1238         enum _ecore_status_t rc;
1239
1240         rc = ecore_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd,
1241                                        &p_ramrod, &p_ent,
1242                                        comp_mode, p_comp_data);
1243         if (rc != ECORE_SUCCESS) {
1244                 DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc);
1245                 return rc;
1246         }
1247         p_header = &p_ramrod->filter_cmd_hdr;
1248         p_header->assert_on_error = p_filter_cmd->assert_on_error;
1249
1250         rc = ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
1251         if (rc != ECORE_SUCCESS) {
1252                 DP_ERR(p_hwfn, "Unicast filter ADD command failed %d\n", rc);
1253                 return rc;
1254         }
1255
1256         DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
1257                    "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n",
1258                    (p_filter_cmd->opcode == ECORE_FILTER_ADD) ? "ADD" :
1259                    ((p_filter_cmd->opcode == ECORE_FILTER_REMOVE) ?
1260                     "REMOVE" :
1261                     ((p_filter_cmd->opcode == ECORE_FILTER_MOVE) ?
1262                      "MOVE" : "REPLACE")),
1263                    (p_filter_cmd->type == ECORE_FILTER_MAC) ? "MAC" :
1264                    ((p_filter_cmd->type == ECORE_FILTER_VLAN) ?
1265                     "VLAN" : "MAC & VLAN"),
1266                    p_ramrod->filter_cmd_hdr.cmd_cnt,
1267                    p_filter_cmd->is_rx_filter, p_filter_cmd->is_tx_filter);
1268         DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
1269                    "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n",
1270                    p_filter_cmd->vport_to_add_to,
1271                    p_filter_cmd->vport_to_remove_from,
1272                    p_filter_cmd->mac[0], p_filter_cmd->mac[1],
1273                    p_filter_cmd->mac[2], p_filter_cmd->mac[3],
1274                    p_filter_cmd->mac[4], p_filter_cmd->mac[5],
1275                    p_filter_cmd->vlan);
1276
1277         return ECORE_SUCCESS;
1278 }
1279
1280 /*******************************************************************************
1281  * Description:
1282  *         Calculates crc 32 on a buffer
1283  *         Note: crc32_length MUST be aligned to 8
1284  * Return:
1285  ******************************************************************************/
1286 static u32 ecore_calc_crc32c(u8 *crc32_packet,
1287                              u32 crc32_length, u32 crc32_seed, u8 complement)
1288 {
1289         u32 byte = 0, bit = 0, crc32_result = crc32_seed;
1290         u8 msb = 0, current_byte = 0;
1291
1292         if ((crc32_packet == OSAL_NULL) ||
1293             (crc32_length == 0) || ((crc32_length % 8) != 0)) {
1294                 return crc32_result;
1295         }
1296
1297         for (byte = 0; byte < crc32_length; byte++) {
1298                 current_byte = crc32_packet[byte];
1299                 for (bit = 0; bit < 8; bit++) {
1300                         msb = (u8)(crc32_result >> 31);
1301                         crc32_result = crc32_result << 1;
1302                         if (msb != (0x1 & (current_byte >> bit))) {
1303                                 crc32_result = crc32_result ^ CRC32_POLY;
1304                                 crc32_result |= 1;
1305                         }
1306                 }
1307         }
1308
1309         return crc32_result;
1310 }
1311
1312 static u32 ecore_crc32c_le(u32 seed, u8 *mac, u32 len)
1313 {
1314         u32 packet_buf[2] = { 0 };
1315
1316         OSAL_MEMCPY((u8 *)(&packet_buf[0]), &mac[0], 6);
1317         return ecore_calc_crc32c((u8 *)packet_buf, 8, seed, 0);
1318 }
1319
1320 u8 ecore_mcast_bin_from_mac(u8 *mac)
1321 {
1322         u32 crc = ecore_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,
1323                                   mac, ETH_ALEN);
1324
1325         return crc & 0xff;
1326 }
1327
1328 static enum _ecore_status_t
1329 ecore_sp_eth_filter_mcast(struct ecore_hwfn *p_hwfn,
1330                           u16 opaque_fid,
1331                           struct ecore_filter_mcast *p_filter_cmd,
1332                           enum spq_mode comp_mode,
1333                           struct ecore_spq_comp_cb *p_comp_data)
1334 {
1335         unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
1336         struct vport_update_ramrod_data *p_ramrod = OSAL_NULL;
1337         struct ecore_spq_entry *p_ent = OSAL_NULL;
1338         struct ecore_sp_init_data init_data;
1339         u8 abs_vport_id = 0;
1340         enum _ecore_status_t rc;
1341         int i;
1342
1343         if (p_filter_cmd->opcode == ECORE_FILTER_ADD)
1344                 rc = ecore_fw_vport(p_hwfn,
1345                                     p_filter_cmd->vport_to_add_to,
1346                                     &abs_vport_id);
1347         else
1348                 rc = ecore_fw_vport(p_hwfn,
1349                                     p_filter_cmd->vport_to_remove_from,
1350                                     &abs_vport_id);
1351         if (rc != ECORE_SUCCESS)
1352                 return rc;
1353
1354         /* Get SPQ entry */
1355         OSAL_MEMSET(&init_data, 0, sizeof(init_data));
1356         init_data.cid = ecore_spq_get_cid(p_hwfn);
1357         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1358         init_data.comp_mode = comp_mode;
1359         init_data.p_comp_data = p_comp_data;
1360
1361         rc = ecore_sp_init_request(p_hwfn, &p_ent,
1362                                    ETH_RAMROD_VPORT_UPDATE,
1363                                    PROTOCOLID_ETH, &init_data);
1364         if (rc != ECORE_SUCCESS) {
1365                 DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc);
1366                 return rc;
1367         }
1368
1369         p_ramrod = &p_ent->ramrod.vport_update;
1370         p_ramrod->common.update_approx_mcast_flg = 1;
1371
1372         /* explicitly clear out the entire vector */
1373         OSAL_MEMSET(&p_ramrod->approx_mcast.bins,
1374                     0, sizeof(p_ramrod->approx_mcast.bins));
1375         OSAL_MEMSET(bins, 0, sizeof(unsigned long) *
1376                     ETH_MULTICAST_MAC_BINS_IN_REGS);
1377         /* filter ADD op is explicit set op and it removes
1378         *  any existing filters for the vport.
1379         */
1380         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1381                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1382                         u32 bit;
1383
1384                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1385                         OSAL_SET_BIT(bit, bins);
1386                 }
1387
1388                 /* Convert to correct endianity */
1389                 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
1390                         struct vport_update_ramrod_mcast *p_ramrod_bins;
1391                         u32 *p_bins = (u32 *)bins;
1392
1393                         p_ramrod_bins = &p_ramrod->approx_mcast;
1394                         p_ramrod_bins->bins[i] = OSAL_CPU_TO_LE32(p_bins[i]);
1395                 }
1396         }
1397
1398         p_ramrod->common.vport_id = abs_vport_id;
1399
1400         rc = ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
1401         if (rc != ECORE_SUCCESS)
1402                 DP_ERR(p_hwfn, "Multicast filter command failed %d\n", rc);
1403
1404         return rc;
1405 }
1406
1407 enum _ecore_status_t
1408 ecore_filter_mcast_cmd(struct ecore_dev *p_dev,
1409                        struct ecore_filter_mcast *p_filter_cmd,
1410                        enum spq_mode comp_mode,
1411                        struct ecore_spq_comp_cb *p_comp_data)
1412 {
1413         enum _ecore_status_t rc = ECORE_SUCCESS;
1414         int i;
1415
1416         /* only ADD and REMOVE operations are supported for multi-cast */
1417         if ((p_filter_cmd->opcode != ECORE_FILTER_ADD &&
1418              (p_filter_cmd->opcode != ECORE_FILTER_REMOVE)) ||
1419             (p_filter_cmd->num_mc_addrs > ECORE_MAX_MC_ADDRS)) {
1420                 return ECORE_INVAL;
1421         }
1422
1423         for_each_hwfn(p_dev, i) {
1424                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
1425                 u16 opaque_fid;
1426
1427                 if (IS_VF(p_dev)) {
1428                         ecore_vf_pf_filter_mcast(p_hwfn, p_filter_cmd);
1429                         continue;
1430                 }
1431
1432                 opaque_fid = p_hwfn->hw_info.opaque_fid;
1433                 rc = ecore_sp_eth_filter_mcast(p_hwfn,
1434                                                opaque_fid,
1435                                                p_filter_cmd,
1436                                                comp_mode, p_comp_data);
1437                 if (rc != ECORE_SUCCESS)
1438                         break;
1439         }
1440
1441         return rc;
1442 }
1443
1444 enum _ecore_status_t
1445 ecore_filter_ucast_cmd(struct ecore_dev *p_dev,
1446                        struct ecore_filter_ucast *p_filter_cmd,
1447                        enum spq_mode comp_mode,
1448                        struct ecore_spq_comp_cb *p_comp_data)
1449 {
1450         enum _ecore_status_t rc = ECORE_SUCCESS;
1451         int i;
1452
1453         for_each_hwfn(p_dev, i) {
1454                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
1455                 u16 opaque_fid;
1456
1457                 if (IS_VF(p_dev)) {
1458                         rc = ecore_vf_pf_filter_ucast(p_hwfn, p_filter_cmd);
1459                         continue;
1460                 }
1461
1462                 opaque_fid = p_hwfn->hw_info.opaque_fid;
1463                 rc = ecore_sp_eth_filter_ucast(p_hwfn,
1464                                                opaque_fid,
1465                                                p_filter_cmd,
1466                                                comp_mode, p_comp_data);
1467                 if (rc != ECORE_SUCCESS)
1468                         break;
1469         }
1470
1471         return rc;
1472 }
1473
1474 /* Statistics related code */
1475 static void __ecore_get_vport_pstats_addrlen(struct ecore_hwfn *p_hwfn,
1476                                              u32 *p_addr, u32 *p_len,
1477                                              u16 statistics_bin)
1478 {
1479         if (IS_PF(p_hwfn->p_dev)) {
1480                 *p_addr = BAR0_MAP_REG_PSDM_RAM +
1481                     PSTORM_QUEUE_STAT_OFFSET(statistics_bin);
1482                 *p_len = sizeof(struct eth_pstorm_per_queue_stat);
1483         } else {
1484                 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1485                 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1486
1487                 *p_addr = p_resp->pfdev_info.stats_info.pstats.address;
1488                 *p_len = p_resp->pfdev_info.stats_info.pstats.len;
1489         }
1490 }
1491
1492 static void __ecore_get_vport_pstats(struct ecore_hwfn *p_hwfn,
1493                                      struct ecore_ptt *p_ptt,
1494                                      struct ecore_eth_stats *p_stats,
1495                                      u16 statistics_bin)
1496 {
1497         struct eth_pstorm_per_queue_stat pstats;
1498         u32 pstats_addr = 0, pstats_len = 0;
1499
1500         __ecore_get_vport_pstats_addrlen(p_hwfn, &pstats_addr, &pstats_len,
1501                                          statistics_bin);
1502
1503         OSAL_MEMSET(&pstats, 0, sizeof(pstats));
1504         ecore_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, pstats_len);
1505
1506         p_stats->tx_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
1507         p_stats->tx_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
1508         p_stats->tx_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
1509         p_stats->tx_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
1510         p_stats->tx_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
1511         p_stats->tx_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
1512         p_stats->tx_err_drop_pkts += HILO_64_REGPAIR(pstats.error_drop_pkts);
1513 }
1514
1515 static void __ecore_get_vport_tstats(struct ecore_hwfn *p_hwfn,
1516                                      struct ecore_ptt *p_ptt,
1517                                      struct ecore_eth_stats *p_stats,
1518                                      u16 statistics_bin)
1519 {
1520         struct tstorm_per_port_stat tstats;
1521         u32 tstats_addr, tstats_len;
1522
1523         if (IS_PF(p_hwfn->p_dev)) {
1524                 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1525                     TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn));
1526                 tstats_len = sizeof(struct tstorm_per_port_stat);
1527         } else {
1528                 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1529                 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1530
1531                 tstats_addr = p_resp->pfdev_info.stats_info.tstats.address;
1532                 tstats_len = p_resp->pfdev_info.stats_info.tstats.len;
1533         }
1534
1535         OSAL_MEMSET(&tstats, 0, sizeof(tstats));
1536         ecore_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len);
1537
1538         p_stats->mftag_filter_discards +=
1539             HILO_64_REGPAIR(tstats.mftag_filter_discard);
1540         p_stats->mac_filter_discards +=
1541             HILO_64_REGPAIR(tstats.eth_mac_filter_discard);
1542 }
1543
1544 static void __ecore_get_vport_ustats_addrlen(struct ecore_hwfn *p_hwfn,
1545                                              u32 *p_addr, u32 *p_len,
1546                                              u16 statistics_bin)
1547 {
1548         if (IS_PF(p_hwfn->p_dev)) {
1549                 *p_addr = BAR0_MAP_REG_USDM_RAM +
1550                     USTORM_QUEUE_STAT_OFFSET(statistics_bin);
1551                 *p_len = sizeof(struct eth_ustorm_per_queue_stat);
1552         } else {
1553                 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1554                 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1555
1556                 *p_addr = p_resp->pfdev_info.stats_info.ustats.address;
1557                 *p_len = p_resp->pfdev_info.stats_info.ustats.len;
1558         }
1559 }
1560
1561 static void __ecore_get_vport_ustats(struct ecore_hwfn *p_hwfn,
1562                                      struct ecore_ptt *p_ptt,
1563                                      struct ecore_eth_stats *p_stats,
1564                                      u16 statistics_bin)
1565 {
1566         struct eth_ustorm_per_queue_stat ustats;
1567         u32 ustats_addr = 0, ustats_len = 0;
1568
1569         __ecore_get_vport_ustats_addrlen(p_hwfn, &ustats_addr, &ustats_len,
1570                                          statistics_bin);
1571
1572         OSAL_MEMSET(&ustats, 0, sizeof(ustats));
1573         ecore_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, ustats_len);
1574
1575         p_stats->rx_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
1576         p_stats->rx_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
1577         p_stats->rx_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
1578         p_stats->rx_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
1579         p_stats->rx_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
1580         p_stats->rx_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
1581 }
1582
1583 static void __ecore_get_vport_mstats_addrlen(struct ecore_hwfn *p_hwfn,
1584                                              u32 *p_addr, u32 *p_len,
1585                                              u16 statistics_bin)
1586 {
1587         if (IS_PF(p_hwfn->p_dev)) {
1588                 *p_addr = BAR0_MAP_REG_MSDM_RAM +
1589                     MSTORM_QUEUE_STAT_OFFSET(statistics_bin);
1590                 *p_len = sizeof(struct eth_mstorm_per_queue_stat);
1591         } else {
1592                 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1593                 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1594
1595                 *p_addr = p_resp->pfdev_info.stats_info.mstats.address;
1596                 *p_len = p_resp->pfdev_info.stats_info.mstats.len;
1597         }
1598 }
1599
1600 static void __ecore_get_vport_mstats(struct ecore_hwfn *p_hwfn,
1601                                      struct ecore_ptt *p_ptt,
1602                                      struct ecore_eth_stats *p_stats,
1603                                      u16 statistics_bin)
1604 {
1605         struct eth_mstorm_per_queue_stat mstats;
1606         u32 mstats_addr = 0, mstats_len = 0;
1607
1608         __ecore_get_vport_mstats_addrlen(p_hwfn, &mstats_addr, &mstats_len,
1609                                          statistics_bin);
1610
1611         OSAL_MEMSET(&mstats, 0, sizeof(mstats));
1612         ecore_memcpy_from(p_hwfn, p_ptt, &mstats, mstats_addr, mstats_len);
1613
1614         p_stats->no_buff_discards += HILO_64_REGPAIR(mstats.no_buff_discard);
1615         p_stats->packet_too_big_discard +=
1616             HILO_64_REGPAIR(mstats.packet_too_big_discard);
1617         p_stats->ttl0_discard += HILO_64_REGPAIR(mstats.ttl0_discard);
1618         p_stats->tpa_coalesced_pkts +=
1619             HILO_64_REGPAIR(mstats.tpa_coalesced_pkts);
1620         p_stats->tpa_coalesced_events +=
1621             HILO_64_REGPAIR(mstats.tpa_coalesced_events);
1622         p_stats->tpa_aborts_num += HILO_64_REGPAIR(mstats.tpa_aborts_num);
1623         p_stats->tpa_coalesced_bytes +=
1624             HILO_64_REGPAIR(mstats.tpa_coalesced_bytes);
1625 }
1626
1627 static void __ecore_get_vport_port_stats(struct ecore_hwfn *p_hwfn,
1628                                          struct ecore_ptt *p_ptt,
1629                                          struct ecore_eth_stats *p_stats)
1630 {
1631         struct port_stats port_stats;
1632         int j;
1633
1634         OSAL_MEMSET(&port_stats, 0, sizeof(port_stats));
1635
1636         ecore_memcpy_from(p_hwfn, p_ptt, &port_stats,
1637                           p_hwfn->mcp_info->port_addr +
1638                           OFFSETOF(struct public_port, stats),
1639                           sizeof(port_stats));
1640
1641         p_stats->rx_64_byte_packets += port_stats.eth.r64;
1642         p_stats->rx_65_to_127_byte_packets += port_stats.eth.r127;
1643         p_stats->rx_128_to_255_byte_packets += port_stats.eth.r255;
1644         p_stats->rx_256_to_511_byte_packets += port_stats.eth.r511;
1645         p_stats->rx_512_to_1023_byte_packets += port_stats.eth.r1023;
1646         p_stats->rx_1024_to_1518_byte_packets += port_stats.eth.r1518;
1647         p_stats->rx_1519_to_1522_byte_packets += port_stats.eth.r1522;
1648         p_stats->rx_1519_to_2047_byte_packets += port_stats.eth.r2047;
1649         p_stats->rx_2048_to_4095_byte_packets += port_stats.eth.r4095;
1650         p_stats->rx_4096_to_9216_byte_packets += port_stats.eth.r9216;
1651         p_stats->rx_9217_to_16383_byte_packets += port_stats.eth.r16383;
1652         p_stats->rx_crc_errors += port_stats.eth.rfcs;
1653         p_stats->rx_mac_crtl_frames += port_stats.eth.rxcf;
1654         p_stats->rx_pause_frames += port_stats.eth.rxpf;
1655         p_stats->rx_pfc_frames += port_stats.eth.rxpp;
1656         p_stats->rx_align_errors += port_stats.eth.raln;
1657         p_stats->rx_carrier_errors += port_stats.eth.rfcr;
1658         p_stats->rx_oversize_packets += port_stats.eth.rovr;
1659         p_stats->rx_jabbers += port_stats.eth.rjbr;
1660         p_stats->rx_undersize_packets += port_stats.eth.rund;
1661         p_stats->rx_fragments += port_stats.eth.rfrg;
1662         p_stats->tx_64_byte_packets += port_stats.eth.t64;
1663         p_stats->tx_65_to_127_byte_packets += port_stats.eth.t127;
1664         p_stats->tx_128_to_255_byte_packets += port_stats.eth.t255;
1665         p_stats->tx_256_to_511_byte_packets += port_stats.eth.t511;
1666         p_stats->tx_512_to_1023_byte_packets += port_stats.eth.t1023;
1667         p_stats->tx_1024_to_1518_byte_packets += port_stats.eth.t1518;
1668         p_stats->tx_1519_to_2047_byte_packets += port_stats.eth.t2047;
1669         p_stats->tx_2048_to_4095_byte_packets += port_stats.eth.t4095;
1670         p_stats->tx_4096_to_9216_byte_packets += port_stats.eth.t9216;
1671         p_stats->tx_9217_to_16383_byte_packets += port_stats.eth.t16383;
1672         p_stats->tx_pause_frames += port_stats.eth.txpf;
1673         p_stats->tx_pfc_frames += port_stats.eth.txpp;
1674         p_stats->tx_lpi_entry_count += port_stats.eth.tlpiec;
1675         p_stats->tx_total_collisions += port_stats.eth.tncl;
1676         p_stats->rx_mac_bytes += port_stats.eth.rbyte;
1677         p_stats->rx_mac_uc_packets += port_stats.eth.rxuca;
1678         p_stats->rx_mac_mc_packets += port_stats.eth.rxmca;
1679         p_stats->rx_mac_bc_packets += port_stats.eth.rxbca;
1680         p_stats->rx_mac_frames_ok += port_stats.eth.rxpok;
1681         p_stats->tx_mac_bytes += port_stats.eth.tbyte;
1682         p_stats->tx_mac_uc_packets += port_stats.eth.txuca;
1683         p_stats->tx_mac_mc_packets += port_stats.eth.txmca;
1684         p_stats->tx_mac_bc_packets += port_stats.eth.txbca;
1685         p_stats->tx_mac_ctrl_frames += port_stats.eth.txcf;
1686         for (j = 0; j < 8; j++) {
1687                 p_stats->brb_truncates += port_stats.brb.brb_truncate[j];
1688                 p_stats->brb_discards += port_stats.brb.brb_discard[j];
1689         }
1690 }
1691
1692 void __ecore_get_vport_stats(struct ecore_hwfn *p_hwfn,
1693                              struct ecore_ptt *p_ptt,
1694                              struct ecore_eth_stats *stats,
1695                              u16 statistics_bin, bool b_get_port_stats)
1696 {
1697         __ecore_get_vport_mstats(p_hwfn, p_ptt, stats, statistics_bin);
1698         __ecore_get_vport_ustats(p_hwfn, p_ptt, stats, statistics_bin);
1699         __ecore_get_vport_tstats(p_hwfn, p_ptt, stats, statistics_bin);
1700         __ecore_get_vport_pstats(p_hwfn, p_ptt, stats, statistics_bin);
1701
1702 #ifndef ASIC_ONLY
1703         /* Avoid getting PORT stats for emulation. */
1704         if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
1705                 return;
1706 #endif
1707
1708         if (b_get_port_stats && p_hwfn->mcp_info)
1709                 __ecore_get_vport_port_stats(p_hwfn, p_ptt, stats);
1710 }
1711
1712 static void _ecore_get_vport_stats(struct ecore_dev *p_dev,
1713                                    struct ecore_eth_stats *stats)
1714 {
1715         u8 fw_vport = 0;
1716         int i;
1717
1718         OSAL_MEMSET(stats, 0, sizeof(*stats));
1719
1720         for_each_hwfn(p_dev, i) {
1721                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
1722                 struct ecore_ptt *p_ptt = IS_PF(p_dev) ?
1723                     ecore_ptt_acquire(p_hwfn) : OSAL_NULL;
1724
1725                 if (IS_PF(p_dev)) {
1726                         /* The main vport index is relative first */
1727                         if (ecore_fw_vport(p_hwfn, 0, &fw_vport)) {
1728                                 DP_ERR(p_hwfn, "No vport available!\n");
1729                                 goto out;
1730                         }
1731                 }
1732
1733                 if (IS_PF(p_dev) && !p_ptt) {
1734                         DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1735                         continue;
1736                 }
1737
1738                 __ecore_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport,
1739                                         IS_PF(p_dev) ? true : false);
1740
1741 out:
1742                 if (IS_PF(p_dev) && p_ptt)
1743                         ecore_ptt_release(p_hwfn, p_ptt);
1744         }
1745 }
1746
1747 void ecore_get_vport_stats(struct ecore_dev *p_dev,
1748                            struct ecore_eth_stats *stats)
1749 {
1750         u32 i;
1751
1752         if (!p_dev) {
1753                 OSAL_MEMSET(stats, 0, sizeof(*stats));
1754                 return;
1755         }
1756
1757         _ecore_get_vport_stats(p_dev, stats);
1758
1759         if (!p_dev->reset_stats)
1760                 return;
1761
1762         /* Reduce the statistics baseline */
1763         for (i = 0; i < sizeof(struct ecore_eth_stats) / sizeof(u64); i++)
1764                 ((u64 *)stats)[i] -= ((u64 *)p_dev->reset_stats)[i];
1765 }
1766
1767 /* zeroes V-PORT specific portion of stats (Port stats remains untouched) */
1768 void ecore_reset_vport_stats(struct ecore_dev *p_dev)
1769 {
1770         int i;
1771
1772         for_each_hwfn(p_dev, i) {
1773                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
1774                 struct eth_mstorm_per_queue_stat mstats;
1775                 struct eth_ustorm_per_queue_stat ustats;
1776                 struct eth_pstorm_per_queue_stat pstats;
1777                 struct ecore_ptt *p_ptt = IS_PF(p_dev) ?
1778                     ecore_ptt_acquire(p_hwfn) : OSAL_NULL;
1779                 u32 addr = 0, len = 0;
1780
1781                 if (IS_PF(p_dev) && !p_ptt) {
1782                         DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1783                         continue;
1784                 }
1785
1786                 OSAL_MEMSET(&mstats, 0, sizeof(mstats));
1787                 __ecore_get_vport_mstats_addrlen(p_hwfn, &addr, &len, 0);
1788                 ecore_memcpy_to(p_hwfn, p_ptt, addr, &mstats, len);
1789
1790                 OSAL_MEMSET(&ustats, 0, sizeof(ustats));
1791                 __ecore_get_vport_ustats_addrlen(p_hwfn, &addr, &len, 0);
1792                 ecore_memcpy_to(p_hwfn, p_ptt, addr, &ustats, len);
1793
1794                 OSAL_MEMSET(&pstats, 0, sizeof(pstats));
1795                 __ecore_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0);
1796                 ecore_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len);
1797
1798                 if (IS_PF(p_dev))
1799                         ecore_ptt_release(p_hwfn, p_ptt);
1800         }
1801
1802         /* PORT statistics are not necessarily reset, so we need to
1803          * read and create a baseline for future statistics.
1804          */
1805         if (!p_dev->reset_stats)
1806                 DP_INFO(p_dev, "Reset stats not allocated\n");
1807         else
1808                 _ecore_get_vport_stats(p_dev, p_dev->reset_stats);
1809 }