net/qede/base: make L2 queues handle based
[dpdk.git] / drivers / net / qede / base / ecore_vf.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include "bcm_osal.h"
10 #include "ecore.h"
11 #include "ecore_hsi_eth.h"
12 #include "ecore_sriov.h"
13 #include "ecore_l2_api.h"
14 #include "ecore_vf.h"
15 #include "ecore_vfpf_if.h"
16 #include "ecore_status.h"
17 #include "reg_addr.h"
18 #include "ecore_int.h"
19 #include "ecore_l2.h"
20 #include "ecore_mcp_api.h"
21 #include "ecore_vf_api.h"
22
23 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
24 {
25         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
26         void *p_tlv;
27
28         /* This lock is released when we receive PF's response
29          * in ecore_send_msg2pf().
30          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
31          * must come in sequence.
32          */
33         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
34
35         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
36                    "preparing to send %s tlv over vf pf channel\n",
37                    ecore_channel_tlvs_string[type]);
38
39         /* Reset Request offset */
40         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
41
42         /* Clear mailbox - both request and reply */
43         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
44         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
45
46         /* Init type and length */
47         p_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, type, length);
48
49         /* Init first tlv header */
50         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
51             (u64)p_iov->pf2vf_reply_phys;
52
53         return p_tlv;
54 }
55
56 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
57                                  enum _ecore_status_t req_status)
58 {
59         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
60
61         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
62                    "VF request status = 0x%x, PF reply status = 0x%x\n",
63                    req_status, resp->default_resp.hdr.status);
64
65         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
66 }
67
68 static enum _ecore_status_t
69 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
70                   u8 *done, u32 resp_size)
71 {
72         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
73         struct ustorm_trigger_vf_zone trigger;
74         struct ustorm_vf_zone *zone_data;
75         enum _ecore_status_t rc = ECORE_SUCCESS;
76         int time = 100;
77
78         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
79
80         /* output tlvs list */
81         ecore_dp_tlv_list(p_hwfn, p_req);
82
83         /* need to add the END TLV to the message size */
84         resp_size += sizeof(struct channel_list_end_tlv);
85
86         /* Send TLVs over HW channel */
87         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
88         trigger.vf_pf_msg_valid = 1;
89
90         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
91                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
92                    " %08x --> %p\n",
93                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
94                              PXP_CONCRETE_FID_PFID),
95                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
96                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
97                    &zone_data->non_trigger.vf_pf_msg_addr,
98                    *((u32 *)&trigger), &zone_data->trigger);
99
100         REG_WR(p_hwfn,
101                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
102                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
103
104         REG_WR(p_hwfn,
105                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
106                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
107
108         /* The message data must be written first, to prevent trigger before
109          * data is written.
110          */
111         OSAL_WMB(p_hwfn->p_dev);
112
113         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
114                *((u32 *)&trigger));
115
116         /* When PF would be done with the response, it would write back to the
117          * `done' address. Poll until then.
118          */
119         while ((!*done) && time) {
120                 OSAL_MSLEEP(25);
121                 time--;
122         }
123
124         if (!*done) {
125                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
126                            "VF <-- PF Timeout [Type %d]\n",
127                            p_req->first_tlv.tl.type);
128                 rc = ECORE_TIMEOUT;
129         } else {
130                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
131                            "PF response: %d [Type %d]\n",
132                            *done, p_req->first_tlv.tl.type);
133         }
134
135         return rc;
136 }
137
138 #define VF_ACQUIRE_THRESH 3
139 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
140                                             struct vf_pf_resc_request *p_req,
141                                             struct pf_vf_resc *p_resp)
142 {
143         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
144                    "PF unwilling to fullill resource request: rxq [%02x/%02x]"
145                    " txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x]"
146                    " vlan [%02x/%02x] mc [%02x/%02x]."
147                    " Try PF recommended amount\n",
148                    p_req->num_rxqs, p_resp->num_rxqs,
149                    p_req->num_rxqs, p_resp->num_txqs,
150                    p_req->num_sbs, p_resp->num_sbs,
151                    p_req->num_mac_filters, p_resp->num_mac_filters,
152                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
153                    p_req->num_mc_filters, p_resp->num_mc_filters);
154
155         /* humble our request */
156         p_req->num_txqs = p_resp->num_txqs;
157         p_req->num_rxqs = p_resp->num_rxqs;
158         p_req->num_sbs = p_resp->num_sbs;
159         p_req->num_mac_filters = p_resp->num_mac_filters;
160         p_req->num_vlan_filters = p_resp->num_vlan_filters;
161         p_req->num_mc_filters = p_resp->num_mc_filters;
162 }
163
164 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
165 {
166         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
167         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
168         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
169         struct ecore_vf_acquire_sw_info vf_sw_info;
170         struct vf_pf_resc_request *p_resc;
171         bool resources_acquired = false;
172         struct vfpf_acquire_tlv *req;
173         int attempts = 0;
174         enum _ecore_status_t rc = ECORE_SUCCESS;
175
176         /* clear mailbox and prep first tlv */
177         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
178         p_resc = &req->resc_request;
179
180         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
181         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
182
183         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
184         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
185         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
186         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
187         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
188
189         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
190         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
191
192         req->vfdev_info.os_type = vf_sw_info.os_type;
193         req->vfdev_info.driver_version = vf_sw_info.driver_version;
194         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
195         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
196         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
197         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
198         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
199         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
200
201         /* Fill capability field with any non-deprecated config we support */
202         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
203
204         /* pf 2 vf bulletin board address */
205         req->bulletin_addr = p_iov->bulletin.phys;
206         req->bulletin_size = p_iov->bulletin.size;
207
208         /* add list termination tlv */
209         ecore_add_tlv(p_hwfn, &p_iov->offset,
210                       CHANNEL_TLV_LIST_END,
211                       sizeof(struct channel_list_end_tlv));
212
213         while (!resources_acquired) {
214                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
215                            "attempting to acquire resources\n");
216
217                 /* Clear response buffer, as this might be a re-send */
218                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
219                             sizeof(union pfvf_tlvs));
220
221                 /* send acquire request */
222                 rc = ecore_send_msg2pf(p_hwfn,
223                                        &resp->hdr.status, sizeof(*resp));
224
225                 /* PF timeout */
226                 if (rc)
227                         return rc;
228
229                 /* copy acquire response from buffer to p_hwfn */
230                 OSAL_MEMCPY(&p_iov->acquire_resp,
231                             resp, sizeof(p_iov->acquire_resp));
232
233                 attempts++;
234
235                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
236                         /* PF agrees to allocate our resources */
237                         if (!(resp->pfdev_info.capabilities &
238                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
239                                 /* It's possible legacy PF mistakenly accepted;
240                                  * but we don't care - simply mark it as
241                                  * legacy and continue.
242                                  */
243                                 req->vfdev_info.capabilities |=
244                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
245                         }
246                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
247                                    "resources acquired\n");
248                         resources_acquired = true;
249                 } /* PF refuses to allocate our resources */
250                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
251                          attempts < VF_ACQUIRE_THRESH) {
252                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
253                                                         &resp->resc);
254
255                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
256                         if (pfdev_info->major_fp_hsi &&
257                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
258                                 DP_NOTICE(p_hwfn, false,
259                                           "PF uses an incompatible fastpath HSI"
260                                           " %02x.%02x [VF requires %02x.%02x]."
261                                           " Please change to a VF driver using"
262                                           " %02x.xx.\n",
263                                           pfdev_info->major_fp_hsi,
264                                           pfdev_info->minor_fp_hsi,
265                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
266                                           pfdev_info->major_fp_hsi);
267                                 rc = ECORE_INVAL;
268                                 goto exit;
269                         }
270
271                         if (!pfdev_info->major_fp_hsi) {
272                                 if (req->vfdev_info.capabilities &
273                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
274                                         DP_NOTICE(p_hwfn, false,
275                                                   "PF uses very old drivers."
276                                                   " Please change to a VF"
277                                                   " driver using no later than"
278                                                   " 8.8.x.x.\n");
279                                         rc = ECORE_INVAL;
280                                         goto exit;
281                                 } else {
282                                         DP_INFO(p_hwfn,
283                                                 "PF is old - try re-acquire to"
284                                                 " see if it supports FW-version"
285                                                 " override\n");
286                                         req->vfdev_info.capabilities |=
287                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
288                                         continue;
289                                 }
290                         }
291
292                         /* If PF/VF are using same Major, PF must have had
293                          * it's reasons. Simply fail.
294                          */
295                         DP_NOTICE(p_hwfn, false,
296                                   "PF rejected acquisition by VF\n");
297                         rc = ECORE_INVAL;
298                         goto exit;
299                 } else {
300                         DP_ERR(p_hwfn,
301                                "PF returned err %d to VF acquisition request\n",
302                                resp->hdr.status);
303                         rc = ECORE_AGAIN;
304                         goto exit;
305                 }
306         }
307
308         /* Mark the PF as legacy, if needed */
309         if (req->vfdev_info.capabilities &
310             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
311                 p_iov->b_pre_fp_hsi = true;
312
313         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
314         if (rc) {
315                 DP_NOTICE(p_hwfn, true,
316                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
317                           " status = 0x%x.\n",
318                           rc);
319                 rc = ECORE_AGAIN;
320                 goto exit;
321         }
322
323         /* Update bulletin board size with response from PF */
324         p_iov->bulletin.size = resp->bulletin_size;
325
326         /* get HW info */
327         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
328         p_hwfn->p_dev->chip_rev = resp->pfdev_info.chip_rev;
329
330         DP_INFO(p_hwfn, "Chip details - %s%d\n",
331                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
332                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
333
334         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
335
336         /* Learn of the possibility of CMT */
337         if (IS_LEAD_HWFN(p_hwfn)) {
338                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
339                         DP_INFO(p_hwfn, "100g VF\n");
340                         p_hwfn->p_dev->num_hwfns = 2;
341                 }
342         }
343
344         /* @DPDK */
345         if ((~p_iov->b_pre_fp_hsi &
346             ETH_HSI_VER_MINOR) &&
347             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
348                 DP_INFO(p_hwfn,
349                         "PF is using older fastpath HSI;"
350                         " %02x.%02x is configured\n",
351                         ETH_HSI_VER_MAJOR,
352                         resp->pfdev_info.minor_fp_hsi);
353
354 exit:
355         ecore_vf_pf_req_end(p_hwfn, rc);
356
357         return rc;
358 }
359
360 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
361 {
362         struct ecore_vf_iov *p_iov;
363         u32 reg;
364
365         /* Set number of hwfns - might be overridden once leading hwfn learns
366          * actual configuration from PF.
367          */
368         if (IS_LEAD_HWFN(p_hwfn))
369                 p_hwfn->p_dev->num_hwfns = 1;
370
371         /* Set the doorbell bar. Assumption: regview is set */
372         p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
373             PXP_VF_BAR0_START_DQ;
374
375         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
376         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
377
378         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
379         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
380
381         /* Allocate vf sriov info */
382         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
383         if (!p_iov) {
384                 DP_NOTICE(p_hwfn, true,
385                           "Failed to allocate `struct ecore_sriov'\n");
386                 return ECORE_NOMEM;
387         }
388
389         /* Allocate vf2pf msg */
390         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
391                                                          &p_iov->
392                                                          vf2pf_request_phys,
393                                                          sizeof(union
394                                                                 vfpf_tlvs));
395         if (!p_iov->vf2pf_request) {
396                 DP_NOTICE(p_hwfn, true,
397                          "Failed to allocate `vf2pf_request' DMA memory\n");
398                 goto free_p_iov;
399         }
400
401         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
402                                                        &p_iov->
403                                                        pf2vf_reply_phys,
404                                                        sizeof(union pfvf_tlvs));
405         if (!p_iov->pf2vf_reply) {
406                 DP_NOTICE(p_hwfn, true,
407                           "Failed to allocate `pf2vf_reply' DMA memory\n");
408                 goto free_vf2pf_request;
409         }
410
411         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
412                    "VF's Request mailbox [%p virt 0x%lx phys], "
413                    "Response mailbox [%p virt 0x%lx phys]\n",
414                    p_iov->vf2pf_request,
415                    (unsigned long)p_iov->vf2pf_request_phys,
416                    p_iov->pf2vf_reply,
417                    (unsigned long)p_iov->pf2vf_reply_phys);
418
419         /* Allocate Bulletin board */
420         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
421         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
422                                                            &p_iov->bulletin.
423                                                            phys,
424                                                            p_iov->bulletin.
425                                                            size);
426         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
427                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
428                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
429                    p_iov->bulletin.size);
430
431         OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
432         OSAL_MUTEX_INIT(&p_iov->mutex);
433
434         p_hwfn->vf_iov_info = p_iov;
435
436         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
437
438         return ecore_vf_pf_acquire(p_hwfn);
439
440 free_vf2pf_request:
441         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
442                                p_iov->vf2pf_request_phys,
443                                sizeof(union vfpf_tlvs));
444 free_p_iov:
445         OSAL_FREE(p_hwfn->p_dev, p_iov);
446
447         return ECORE_NOMEM;
448 }
449
450 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
451 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
452                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
453
454 enum _ecore_status_t
455 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
456                       struct ecore_queue_cid *p_cid,
457                       u16 bd_max_bytes,
458                       dma_addr_t bd_chain_phys_addr,
459                       dma_addr_t cqe_pbl_addr,
460                       u16 cqe_pbl_size,
461                       void OSAL_IOMEM **pp_prod)
462 {
463         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
464         struct pfvf_start_queue_resp_tlv *resp;
465         struct vfpf_start_rxq_tlv *req;
466         u16 rx_qid = p_cid->rel.queue_id;
467         enum _ecore_status_t rc;
468
469         /* clear mailbox and prep first tlv */
470         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
471
472         req->rx_qid = rx_qid;
473         req->cqe_pbl_addr = cqe_pbl_addr;
474         req->cqe_pbl_size = cqe_pbl_size;
475         req->rxq_addr = bd_chain_phys_addr;
476         req->hw_sb = p_cid->rel.sb;
477         req->sb_index = p_cid->rel.sb_idx;
478         req->bd_max_bytes = bd_max_bytes;
479         req->stat_id = -1; /* Keep initialized, for future compatibility */
480
481         /* If PF is legacy, we'll need to calculate producers ourselves
482          * as well as clean them.
483          */
484         if (p_iov->b_pre_fp_hsi) {
485                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
486                 u32 init_prod_val = 0;
487
488                 *pp_prod = (u8 OSAL_IOMEM *)
489                            p_hwfn->regview +
490                            MSTORM_QZONE_START(p_hwfn->p_dev) +
491                            (hw_qid) * MSTORM_QZONE_SIZE;
492
493                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
494                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
495                                   (u32 *)(&init_prod_val));
496         }
497
498         /* add list termination tlv */
499         ecore_add_tlv(p_hwfn, &p_iov->offset,
500                       CHANNEL_TLV_LIST_END,
501                       sizeof(struct channel_list_end_tlv));
502
503         resp = &p_iov->pf2vf_reply->queue_start;
504         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
505         if (rc)
506                 goto exit;
507
508         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
509                 rc = ECORE_INVAL;
510                 goto exit;
511         }
512
513         /* Learn the address of the producer from the response */
514         if (!p_iov->b_pre_fp_hsi) {
515                 u32 init_prod_val = 0;
516
517                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
518                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
519                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
520                            rx_qid, *pp_prod, resp->offset);
521
522                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
523                  * It was actually the PF's responsibility, but since some
524                  * old PFs might fail to do so, we do this as well.
525                  */
526                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
527                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
528                                   (u32 *)&init_prod_val);
529         }
530
531 exit:
532         ecore_vf_pf_req_end(p_hwfn, rc);
533
534         return rc;
535 }
536
537 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
538                                           struct ecore_queue_cid *p_cid,
539                                           bool cqe_completion)
540 {
541         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
542         struct vfpf_stop_rxqs_tlv *req;
543         struct pfvf_def_resp_tlv *resp;
544         enum _ecore_status_t rc;
545
546         /* clear mailbox and prep first tlv */
547         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
548
549         req->rx_qid = p_cid->rel.queue_id;
550         req->num_rxqs = 1;
551         req->cqe_completion = cqe_completion;
552
553         /* add list termination tlv */
554         ecore_add_tlv(p_hwfn, &p_iov->offset,
555                       CHANNEL_TLV_LIST_END,
556                       sizeof(struct channel_list_end_tlv));
557
558         resp = &p_iov->pf2vf_reply->default_resp;
559         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
560         if (rc)
561                 goto exit;
562
563         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
564                 rc = ECORE_INVAL;
565                 goto exit;
566         }
567
568 exit:
569         ecore_vf_pf_req_end(p_hwfn, rc);
570
571         return rc;
572 }
573
574 enum _ecore_status_t
575 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
576                       struct ecore_queue_cid *p_cid,
577                       dma_addr_t pbl_addr, u16 pbl_size,
578                       void OSAL_IOMEM **pp_doorbell)
579 {
580         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
581         struct pfvf_start_queue_resp_tlv *resp;
582         struct vfpf_start_txq_tlv *req;
583         u16 qid = p_cid->rel.queue_id;
584         enum _ecore_status_t rc;
585
586         /* clear mailbox and prep first tlv */
587         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
588
589         req->tx_qid = qid;
590
591         /* Tx */
592         req->pbl_addr = pbl_addr;
593         req->pbl_size = pbl_size;
594         req->hw_sb = p_cid->rel.sb;
595         req->sb_index = p_cid->rel.sb_idx;
596
597         /* add list termination tlv */
598         ecore_add_tlv(p_hwfn, &p_iov->offset,
599                       CHANNEL_TLV_LIST_END,
600                       sizeof(struct channel_list_end_tlv));
601
602         resp  = &p_iov->pf2vf_reply->queue_start;
603         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
604         if (rc)
605                 goto exit;
606
607         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
608                 rc = ECORE_INVAL;
609                 goto exit;
610         }
611
612         /* Modern PFs provide the actual offsets, while legacy
613          * provided only the queue id.
614          */
615         if (!p_iov->b_pre_fp_hsi) {
616                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
617                                                 resp->offset;
618         } else {
619                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
620
621                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
622                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
623         }
624
625         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
626                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
627                    qid, *pp_doorbell, resp->offset);
628 exit:
629         ecore_vf_pf_req_end(p_hwfn, rc);
630
631         return rc;
632 }
633
634 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
635                                           struct ecore_queue_cid *p_cid)
636 {
637         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
638         struct vfpf_stop_txqs_tlv *req;
639         struct pfvf_def_resp_tlv *resp;
640         enum _ecore_status_t rc;
641
642         /* clear mailbox and prep first tlv */
643         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
644
645         req->tx_qid = p_cid->rel.queue_id;
646         req->num_txqs = 1;
647
648         /* add list termination tlv */
649         ecore_add_tlv(p_hwfn, &p_iov->offset,
650                       CHANNEL_TLV_LIST_END,
651                       sizeof(struct channel_list_end_tlv));
652
653         resp = &p_iov->pf2vf_reply->default_resp;
654         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
655         if (rc)
656                 goto exit;
657
658         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
659                 rc = ECORE_INVAL;
660                 goto exit;
661         }
662
663 exit:
664         ecore_vf_pf_req_end(p_hwfn, rc);
665
666         return rc;
667 }
668
669 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
670                                              struct ecore_queue_cid **pp_cid,
671                                              u8 num_rxqs,
672                                              u8 comp_cqe_flg,
673                                              u8 comp_event_flg)
674 {
675         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
676         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
677         struct vfpf_update_rxq_tlv *req;
678         enum _ecore_status_t rc;
679
680         /* TODO - API is limited to assuming continuous regions of queues,
681          * but VF queues might not fullfil this requirement.
682          * Need to consider whether we need new TLVs for this, or whether
683          * simply doing it iteratively is good enough.
684          */
685         if (!num_rxqs)
686                 return ECORE_INVAL;
687
688 again:
689         /* clear mailbox and prep first tlv */
690         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
691
692         /* Find the length of the current contagious range of queues beginning
693          * at first queue's index.
694          */
695         req->rx_qid = (*pp_cid)->rel.queue_id;
696         for (req->num_rxqs = 1; req->num_rxqs < num_rxqs; req->num_rxqs++)
697                 if (pp_cid[req->num_rxqs]->rel.queue_id !=
698                     req->rx_qid + req->num_rxqs)
699                         break;
700
701         if (comp_cqe_flg)
702                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
703         if (comp_event_flg)
704                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
705
706         /* add list termination tlv */
707         ecore_add_tlv(p_hwfn, &p_iov->offset,
708                       CHANNEL_TLV_LIST_END,
709                       sizeof(struct channel_list_end_tlv));
710
711         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
712         if (rc)
713                 goto exit;
714
715         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
716                 rc = ECORE_INVAL;
717                 goto exit;
718         }
719
720         /* Make sure we're done with all the queues */
721         if (req->num_rxqs < num_rxqs) {
722                 num_rxqs -= req->num_rxqs;
723                 pp_cid += req->num_rxqs;
724                 /* TODO - should we give a non-locked variant instead? */
725                 ecore_vf_pf_req_end(p_hwfn, rc);
726                 goto again;
727         }
728
729 exit:
730         ecore_vf_pf_req_end(p_hwfn, rc);
731         return rc;
732 }
733
734 enum _ecore_status_t
735 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
736                         u16 mtu, u8 inner_vlan_removal,
737                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
738                         u8 only_untagged)
739 {
740         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
741         struct vfpf_vport_start_tlv *req;
742         struct pfvf_def_resp_tlv *resp;
743         enum _ecore_status_t rc;
744         int i;
745
746         /* clear mailbox and prep first tlv */
747         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
748
749         req->mtu = mtu;
750         req->vport_id = vport_id;
751         req->inner_vlan_removal = inner_vlan_removal;
752         req->tpa_mode = tpa_mode;
753         req->max_buffers_per_cqe = max_buffers_per_cqe;
754         req->only_untagged = only_untagged;
755
756         /* status blocks */
757         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++)
758                 if (p_hwfn->sbs_info[i])
759                         req->sb_addr[i] = p_hwfn->sbs_info[i]->sb_phys;
760
761         /* add list termination tlv */
762         ecore_add_tlv(p_hwfn, &p_iov->offset,
763                       CHANNEL_TLV_LIST_END,
764                       sizeof(struct channel_list_end_tlv));
765
766         resp  = &p_iov->pf2vf_reply->default_resp;
767         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
768         if (rc)
769                 goto exit;
770
771         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
772                 rc = ECORE_INVAL;
773                 goto exit;
774         }
775
776 exit:
777         ecore_vf_pf_req_end(p_hwfn, rc);
778
779         return rc;
780 }
781
782 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
783 {
784         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
785         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
786         enum _ecore_status_t rc;
787
788         /* clear mailbox and prep first tlv */
789         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
790                          sizeof(struct vfpf_first_tlv));
791
792         /* add list termination tlv */
793         ecore_add_tlv(p_hwfn, &p_iov->offset,
794                       CHANNEL_TLV_LIST_END,
795                       sizeof(struct channel_list_end_tlv));
796
797         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
798         if (rc)
799                 goto exit;
800
801         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
802                 rc = ECORE_INVAL;
803                 goto exit;
804         }
805
806 exit:
807         ecore_vf_pf_req_end(p_hwfn, rc);
808
809         return rc;
810 }
811
812 static bool
813 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
814                                     struct ecore_sp_vport_update_params *p_data,
815                                     u16 tlv)
816 {
817         switch (tlv) {
818         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
819                 return !!(p_data->update_vport_active_rx_flg ||
820                           p_data->update_vport_active_tx_flg);
821         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
822 #ifndef ASIC_ONLY
823                 /* FPGA doesn't have PVFC and so can't support tx-switching */
824                 return !!(p_data->update_tx_switching_flg &&
825                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
826 #else
827                 return !!p_data->update_tx_switching_flg;
828 #endif
829         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
830                 return !!p_data->update_inner_vlan_removal_flg;
831         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
832                 return !!p_data->update_accept_any_vlan_flg;
833         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
834                 return !!p_data->update_approx_mcast_flg;
835         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
836                 return !!(p_data->accept_flags.update_rx_mode_config ||
837                           p_data->accept_flags.update_tx_mode_config);
838         case CHANNEL_TLV_VPORT_UPDATE_RSS:
839                 return !!p_data->rss_params;
840         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
841                 return !!p_data->sge_tpa_params;
842         default:
843                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
844                         tlv, ecore_channel_tlvs_string[tlv]);
845                 return false;
846         }
847 }
848
849 static void
850 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
851                                     struct ecore_sp_vport_update_params *p_data)
852 {
853         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
854         struct pfvf_def_resp_tlv *p_resp;
855         u16 tlv;
856
857         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
858              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
859              tlv++) {
860                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
861                         continue;
862
863                 p_resp = (struct pfvf_def_resp_tlv *)
864                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
865                 if (p_resp && p_resp->hdr.status)
866                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
867                                    "TLV[%d] type %s Configuration %s\n",
868                                    tlv, ecore_channel_tlvs_string[tlv],
869                                    (p_resp && p_resp->hdr.status) ? "succeeded"
870                                                                   : "failed");
871         }
872 }
873
874 enum _ecore_status_t
875 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
876                          struct ecore_sp_vport_update_params *p_params)
877 {
878         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
879         struct vfpf_vport_update_tlv *req;
880         struct pfvf_def_resp_tlv *resp;
881         u8 update_rx, update_tx;
882         u32 resp_size = 0;
883         u16 size, tlv;
884         enum _ecore_status_t rc;
885
886         resp = &p_iov->pf2vf_reply->default_resp;
887         resp_size = sizeof(*resp);
888
889         update_rx = p_params->update_vport_active_rx_flg;
890         update_tx = p_params->update_vport_active_tx_flg;
891
892         /* clear mailbox and prep header tlv */
893         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
894
895         /* Prepare extended tlvs */
896         if (update_rx || update_tx) {
897                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
898
899                 size = sizeof(struct vfpf_vport_update_activate_tlv);
900                 p_act_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
901                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
902                                           size);
903                 resp_size += sizeof(struct pfvf_def_resp_tlv);
904
905                 if (update_rx) {
906                         p_act_tlv->update_rx = update_rx;
907                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
908                 }
909
910                 if (update_tx) {
911                         p_act_tlv->update_tx = update_tx;
912                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
913                 }
914         }
915
916         if (p_params->update_inner_vlan_removal_flg) {
917                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
918
919                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
920                 p_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
921                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
922                                            size);
923                 resp_size += sizeof(struct pfvf_def_resp_tlv);
924
925                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
926         }
927
928         if (p_params->update_tx_switching_flg) {
929                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
930
931                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
932                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
933                 p_tx_switch_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
934                                                 tlv, size);
935                 resp_size += sizeof(struct pfvf_def_resp_tlv);
936
937                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
938         }
939
940         if (p_params->update_approx_mcast_flg) {
941                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
942
943                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
944                 p_mcast_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
945                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
946                                             size);
947                 resp_size += sizeof(struct pfvf_def_resp_tlv);
948
949                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
950                             sizeof(unsigned long) *
951                             ETH_MULTICAST_MAC_BINS_IN_REGS);
952         }
953
954         update_rx = p_params->accept_flags.update_rx_mode_config;
955         update_tx = p_params->accept_flags.update_tx_mode_config;
956
957         if (update_rx || update_tx) {
958                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
959
960                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
961                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
962                 p_accept_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, tlv, size);
963                 resp_size += sizeof(struct pfvf_def_resp_tlv);
964
965                 if (update_rx) {
966                         p_accept_tlv->update_rx_mode = update_rx;
967                         p_accept_tlv->rx_accept_filter =
968                             p_params->accept_flags.rx_accept_filter;
969                 }
970
971                 if (update_tx) {
972                         p_accept_tlv->update_tx_mode = update_tx;
973                         p_accept_tlv->tx_accept_filter =
974                             p_params->accept_flags.tx_accept_filter;
975                 }
976         }
977
978         if (p_params->rss_params) {
979                 struct ecore_rss_params *rss_params = p_params->rss_params;
980                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
981
982                 size = sizeof(struct vfpf_vport_update_rss_tlv);
983                 p_rss_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
984                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
985                 resp_size += sizeof(struct pfvf_def_resp_tlv);
986
987                 if (rss_params->update_rss_config)
988                         p_rss_tlv->update_rss_flags |=
989                             VFPF_UPDATE_RSS_CONFIG_FLAG;
990                 if (rss_params->update_rss_capabilities)
991                         p_rss_tlv->update_rss_flags |=
992                             VFPF_UPDATE_RSS_CAPS_FLAG;
993                 if (rss_params->update_rss_ind_table)
994                         p_rss_tlv->update_rss_flags |=
995                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
996                 if (rss_params->update_rss_key)
997                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
998
999                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1000                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1001                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1002                 OSAL_MEMCPY(p_rss_tlv->rss_ind_table, rss_params->rss_ind_table,
1003                             sizeof(rss_params->rss_ind_table));
1004                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1005                             sizeof(rss_params->rss_key));
1006         }
1007
1008         if (p_params->update_accept_any_vlan_flg) {
1009                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1010
1011                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1012                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1013                 p_any_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1014                                                tlv, size);
1015
1016                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1017                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1018                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1019                     p_params->update_accept_any_vlan_flg;
1020         }
1021
1022         if (p_params->sge_tpa_params) {
1023                 struct ecore_sge_tpa_params *sge_tpa_params;
1024                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1025
1026                 sge_tpa_params = p_params->sge_tpa_params;
1027                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1028                 p_sge_tpa_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1029                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1030                                               size);
1031                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1032
1033                 if (sge_tpa_params->update_tpa_en_flg)
1034                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1035                             VFPF_UPDATE_TPA_EN_FLAG;
1036                 if (sge_tpa_params->update_tpa_param_flg)
1037                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1038                             VFPF_UPDATE_TPA_PARAM_FLAG;
1039
1040                 if (sge_tpa_params->tpa_ipv4_en_flg)
1041                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1042                 if (sge_tpa_params->tpa_ipv6_en_flg)
1043                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1044                 if (sge_tpa_params->tpa_pkt_split_flg)
1045                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1046                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1047                         p_sge_tpa_tlv->sge_tpa_flags |=
1048                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1049                 if (sge_tpa_params->tpa_gro_consistent_flg)
1050                         p_sge_tpa_tlv->sge_tpa_flags |=
1051                             VFPF_TPA_GRO_CONSIST_FLAG;
1052
1053                 p_sge_tpa_tlv->tpa_max_aggs_num =
1054                     sge_tpa_params->tpa_max_aggs_num;
1055                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1056                 p_sge_tpa_tlv->tpa_min_size_to_start =
1057                     sge_tpa_params->tpa_min_size_to_start;
1058                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1059                     sge_tpa_params->tpa_min_size_to_cont;
1060
1061                 p_sge_tpa_tlv->max_buffers_per_cqe =
1062                     sge_tpa_params->max_buffers_per_cqe;
1063         }
1064
1065         /* add list termination tlv */
1066         ecore_add_tlv(p_hwfn, &p_iov->offset,
1067                       CHANNEL_TLV_LIST_END,
1068                       sizeof(struct channel_list_end_tlv));
1069
1070         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1071         if (rc)
1072                 goto exit;
1073
1074         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1075                 rc = ECORE_INVAL;
1076                 goto exit;
1077         }
1078
1079         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1080
1081 exit:
1082         ecore_vf_pf_req_end(p_hwfn, rc);
1083
1084         return rc;
1085 }
1086
1087 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1088 {
1089         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1090         struct pfvf_def_resp_tlv *resp;
1091         struct vfpf_first_tlv *req;
1092         enum _ecore_status_t rc;
1093
1094         /* clear mailbox and prep first tlv */
1095         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1096
1097         /* add list termination tlv */
1098         ecore_add_tlv(p_hwfn, &p_iov->offset,
1099                       CHANNEL_TLV_LIST_END,
1100                       sizeof(struct channel_list_end_tlv));
1101
1102         resp = &p_iov->pf2vf_reply->default_resp;
1103         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1104         if (rc)
1105                 goto exit;
1106
1107         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1108                 rc = ECORE_AGAIN;
1109                 goto exit;
1110         }
1111
1112         p_hwfn->b_int_enabled = 0;
1113
1114 exit:
1115         ecore_vf_pf_req_end(p_hwfn, rc);
1116
1117         return rc;
1118 }
1119
1120 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
1121 {
1122         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1123         struct pfvf_def_resp_tlv *resp;
1124         struct vfpf_first_tlv *req;
1125         enum _ecore_status_t rc;
1126         u32 size;
1127
1128         /* clear mailbox and prep first tlv */
1129         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
1130
1131         /* add list termination tlv */
1132         ecore_add_tlv(p_hwfn, &p_iov->offset,
1133                       CHANNEL_TLV_LIST_END,
1134                       sizeof(struct channel_list_end_tlv));
1135
1136         resp = &p_iov->pf2vf_reply->default_resp;
1137         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1138
1139         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
1140                 rc = ECORE_AGAIN;
1141
1142         ecore_vf_pf_req_end(p_hwfn, rc);
1143
1144         p_hwfn->b_int_enabled = 0;
1145
1146         if (p_iov->vf2pf_request)
1147                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1148                                        p_iov->vf2pf_request,
1149                                        p_iov->vf2pf_request_phys,
1150                                        sizeof(union vfpf_tlvs));
1151         if (p_iov->pf2vf_reply)
1152                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1153                                        p_iov->pf2vf_reply,
1154                                        p_iov->pf2vf_reply_phys,
1155                                        sizeof(union pfvf_tlvs));
1156
1157         if (p_iov->bulletin.p_virt) {
1158                 size = sizeof(struct ecore_bulletin_content);
1159                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1160                                        p_iov->bulletin.p_virt,
1161                                        p_iov->bulletin.phys, size);
1162         }
1163
1164         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
1165
1166         return rc;
1167 }
1168
1169 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1170                               struct ecore_filter_mcast *p_filter_cmd)
1171 {
1172         struct ecore_sp_vport_update_params sp_params;
1173         int i;
1174
1175         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1176         sp_params.update_approx_mcast_flg = 1;
1177
1178         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1179                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1180                         u32 bit;
1181
1182                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1183                         OSAL_SET_BIT(bit, sp_params.bins);
1184                 }
1185         }
1186
1187         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1188 }
1189
1190 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1191                                               struct ecore_filter_ucast
1192                                               *p_ucast)
1193 {
1194         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1195         struct vfpf_ucast_filter_tlv *req;
1196         struct pfvf_def_resp_tlv *resp;
1197         enum _ecore_status_t rc;
1198
1199         /* Sanitize */
1200         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1201                 DP_NOTICE(p_hwfn, true,
1202                           "VFs don't support Moving of filters\n");
1203                 return ECORE_INVAL;
1204         }
1205
1206         /* clear mailbox and prep first tlv */
1207         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1208         req->opcode = (u8)p_ucast->opcode;
1209         req->type = (u8)p_ucast->type;
1210         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1211         req->vlan = p_ucast->vlan;
1212
1213         /* add list termination tlv */
1214         ecore_add_tlv(p_hwfn, &p_iov->offset,
1215                       CHANNEL_TLV_LIST_END,
1216                       sizeof(struct channel_list_end_tlv));
1217
1218         resp = &p_iov->pf2vf_reply->default_resp;
1219         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1220         if (rc)
1221                 goto exit;
1222
1223         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1224                 rc = ECORE_AGAIN;
1225                 goto exit;
1226         }
1227
1228 exit:
1229         ecore_vf_pf_req_end(p_hwfn, rc);
1230
1231         return rc;
1232 }
1233
1234 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1235 {
1236         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1237         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1238         enum _ecore_status_t rc;
1239
1240         /* clear mailbox and prep first tlv */
1241         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1242                          sizeof(struct vfpf_first_tlv));
1243
1244         /* add list termination tlv */
1245         ecore_add_tlv(p_hwfn, &p_iov->offset,
1246                       CHANNEL_TLV_LIST_END,
1247                       sizeof(struct channel_list_end_tlv));
1248
1249         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1250         if (rc)
1251                 goto exit;
1252
1253         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1254                 rc = ECORE_INVAL;
1255                 goto exit;
1256         }
1257
1258 exit:
1259         ecore_vf_pf_req_end(p_hwfn, rc);
1260
1261         return rc;
1262 }
1263
1264 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1265                            u16               sb_id)
1266 {
1267         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1268
1269         if (!p_iov) {
1270                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1271                 return 0;
1272         }
1273
1274         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1275 }
1276
1277 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1278                                             u8 *p_change)
1279 {
1280         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1281         struct ecore_bulletin_content shadow;
1282         u32 crc, crc_size;
1283
1284         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1285         *p_change = 0;
1286
1287         /* Need to guarantee PF is not in the middle of writing it */
1288         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1289
1290         /* If version did not update, no need to do anything */
1291         if (shadow.version == p_iov->bulletin_shadow.version)
1292                 return ECORE_SUCCESS;
1293
1294         /* Verify the bulletin we see is valid */
1295         crc = ecore_crc32(0, (u8 *)&shadow + crc_size,
1296                           p_iov->bulletin.size - crc_size);
1297         if (crc != shadow.crc)
1298                 return ECORE_AGAIN;
1299
1300         /* Set the shadow bulletin and process it */
1301         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1302
1303         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1304                    "Read a bulletin update %08x\n", shadow.version);
1305
1306         *p_change = 1;
1307
1308         return ECORE_SUCCESS;
1309 }
1310
1311 void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1312                                 struct ecore_mcp_link_params *p_params,
1313                                 struct ecore_bulletin_content *p_bulletin)
1314 {
1315         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1316
1317         p_params->speed.autoneg = p_bulletin->req_autoneg;
1318         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1319         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1320         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1321         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1322         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1323         p_params->loopback_mode = p_bulletin->req_loopback;
1324 }
1325
1326 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1327                               struct ecore_mcp_link_params *params)
1328 {
1329         __ecore_vf_get_link_params(p_hwfn, params,
1330                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1331 }
1332
1333 void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1334                                struct ecore_mcp_link_state *p_link,
1335                                struct ecore_bulletin_content *p_bulletin)
1336 {
1337         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1338
1339         p_link->link_up = p_bulletin->link_up;
1340         p_link->speed = p_bulletin->speed;
1341         p_link->full_duplex = p_bulletin->full_duplex;
1342         p_link->an = p_bulletin->autoneg;
1343         p_link->an_complete = p_bulletin->autoneg_complete;
1344         p_link->parallel_detection = p_bulletin->parallel_detection;
1345         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1346         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1347         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1348         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1349         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1350         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1351 }
1352
1353 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1354                              struct ecore_mcp_link_state *link)
1355 {
1356         __ecore_vf_get_link_state(p_hwfn, link,
1357                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1358 }
1359
1360 void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1361                               struct ecore_mcp_link_capabilities *p_link_caps,
1362                               struct ecore_bulletin_content *p_bulletin)
1363 {
1364         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1365         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1366 }
1367
1368 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1369                             struct ecore_mcp_link_capabilities *p_link_caps)
1370 {
1371         __ecore_vf_get_link_caps(p_hwfn, p_link_caps,
1372                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1373 }
1374
1375 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1376 {
1377         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1378 }
1379
1380 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1381 {
1382         OSAL_MEMCPY(port_mac,
1383                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1384                     ETH_ALEN);
1385 }
1386
1387 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1388                                    u8 *num_vlan_filters)
1389 {
1390         struct ecore_vf_iov *p_vf;
1391
1392         p_vf = p_hwfn->vf_iov_info;
1393         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1394 }
1395
1396 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1397                           u32 *num_sbs)
1398 {
1399         struct ecore_vf_iov *p_vf;
1400
1401         p_vf = p_hwfn->vf_iov_info;
1402         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1403 }
1404
1405 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1406                                   u32 *num_mac_filters)
1407 {
1408         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1409
1410         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1411 }
1412
1413 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1414 {
1415         struct ecore_bulletin_content *bulletin;
1416
1417         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1418         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1419                 return true;
1420
1421         /* Forbid VF from changing a MAC enforced by PF */
1422         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1423                 return false;
1424
1425         return false;
1426 }
1427
1428 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1429                                       u8 *p_is_forced)
1430 {
1431         struct ecore_bulletin_content *bulletin;
1432
1433         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1434
1435         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1436                 if (p_is_forced)
1437                         *p_is_forced = 1;
1438         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1439                 if (p_is_forced)
1440                         *p_is_forced = 0;
1441         } else {
1442                 return false;
1443         }
1444
1445         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1446
1447         return true;
1448 }
1449
1450 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1451 {
1452         struct ecore_bulletin_content *bulletin;
1453
1454         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1455
1456         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1457                 return false;
1458
1459         if (dst_pvid)
1460                 *dst_pvid = bulletin->pvid;
1461
1462         return true;
1463 }
1464
1465 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1466 {
1467         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1468 }
1469
1470 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1471                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1472                              u16 *fw_eng)
1473 {
1474         struct pf_vf_pfdev_info *info;
1475
1476         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1477
1478         *fw_major = info->fw_major;
1479         *fw_minor = info->fw_minor;
1480         *fw_rev = info->fw_rev;
1481         *fw_eng = info->fw_eng;
1482 }