drivers/net/qede/base/ecore_vf.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "bcm_osal.h"
  10 #include "ecore.h"
  11 #include "ecore_hsi_eth.h"
  12 #include "ecore_sriov.h"
  13 #include "ecore_l2_api.h"
  14 #include "ecore_vf.h"
  15 #include "ecore_vfpf_if.h"
  16 #include "ecore_status.h"
  17 #include "reg_addr.h"
  18 #include "ecore_int.h"
  19 #include "ecore_l2.h"
  20 #include "ecore_mcp_api.h"
  21 #include "ecore_vf_api.h"
  22
  23 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
  24 {
  25         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
  26         void *p_tlv;
  27
  28         /* This lock is released when we receive PF's response
  29          * in ecore_send_msg2pf().
  30          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
  31          * must come in sequence.
  32          */
  33         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
  34
  35         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  36                    "preparing to send %s tlv over vf pf channel\n",
  37                    ecore_channel_tlvs_string[type]);
  38
  39         /* Reset Request offset */
  40         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
  41
  42         /* Clear mailbox - both request and reply */
  43         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
  44         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
  45
  46         /* Init type and length */
  47         p_tlv = ecore_add_tlv(&p_iov->offset, type, length);
  48
  49         /* Init first tlv header */
  50         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
  51             (u64)p_iov->pf2vf_reply_phys;
  52
  53         return p_tlv;
  54 }
  55
  56 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
  57                                  enum _ecore_status_t req_status)
  58 {
  59         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
  60
  61         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  62                    "VF request status = 0x%x, PF reply status = 0x%x\n",
  63                    req_status, resp->default_resp.hdr.status);
  64
  65         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
  66 }
  67
  68 static enum _ecore_status_t
  69 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
  70                   u8 *done, u32 resp_size)
  71 {
  72         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
  73         struct ustorm_trigger_vf_zone trigger;
  74         struct ustorm_vf_zone *zone_data;
  75         enum _ecore_status_t rc = ECORE_SUCCESS;
  76         int time = 100;
  77
  78         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
  79
  80         /* output tlvs list */
  81         ecore_dp_tlv_list(p_hwfn, p_req);
  82
  83         /* need to add the END TLV to the message size */
  84         resp_size += sizeof(struct channel_list_end_tlv);
  85
  86         /* Send TLVs over HW channel */
  87         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
  88         trigger.vf_pf_msg_valid = 1;
  89
  90         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  91                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
  92                    " %08x --> %p\n",
  93                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
  94                              PXP_CONCRETE_FID_PFID),
  95                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
  96                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
  97                    &zone_data->non_trigger.vf_pf_msg_addr,
  98                    *((u32 *)&trigger), &zone_data->trigger);
  99
 100         REG_WR(p_hwfn,
 101                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
 102                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
 103
 104         REG_WR(p_hwfn,
 105                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
 106                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
 107
 108         /* The message data must be written first, to prevent trigger before
 109          * data is written.
 110          */
 111         OSAL_WMB(p_hwfn->p_dev);
 112
 113         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
 114                *((u32 *)&trigger));
 115
 116         /* When PF would be done with the response, it would write back to the
 117          * `done' address. Poll until then.
 118          */
 119         while ((!*done) && time) {
 120                 OSAL_MSLEEP(25);
 121                 time--;
 122         }
 123
 124         if (!*done) {
 125                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 126                            "VF <-- PF Timeout [Type %d]\n",
 127                            p_req->first_tlv.tl.type);
 128                 rc = ECORE_TIMEOUT;
 129         } else {
 130                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 131                            "PF response: %d [Type %d]\n",
 132                            *done, p_req->first_tlv.tl.type);
 133         }
 134
 135         return rc;
 136 }
 137
 138 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
 139                                 struct ecore_queue_cid *p_cid)
 140 {
 141         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 142         struct vfpf_qid_tlv *p_qid_tlv;
 143
 144         /* Only add QIDs for the queue if it was negotiated with PF */
 145         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
 146               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 147                 return;
 148
 149         p_qid_tlv = ecore_add_tlv(&p_iov->offset,
 150                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
 151         p_qid_tlv->qid = p_cid->qid_usage_idx;
 152 }
 153
 154 enum _ecore_status_t _ecore_vf_pf_release(struct ecore_hwfn *p_hwfn,
 155                                           bool b_final)
 156 {
 157         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 158         struct pfvf_def_resp_tlv *resp;
 159         struct vfpf_first_tlv *req;
 160         u32 size;
 161         enum _ecore_status_t rc;
 162
 163         /* clear mailbox and prep first tlv */
 164         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
 165
 166         /* add list termination tlv */
 167         ecore_add_tlv(&p_iov->offset,
 168                       CHANNEL_TLV_LIST_END,
 169                       sizeof(struct channel_list_end_tlv));
 170
 171         resp = &p_iov->pf2vf_reply->default_resp;
 172         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 173
 174         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
 175                 rc = ECORE_AGAIN;
 176
 177         ecore_vf_pf_req_end(p_hwfn, rc);
 178         if (!b_final)
 179                 return rc;
 180
 181         p_hwfn->b_int_enabled = 0;
 182
 183         if (p_iov->vf2pf_request)
 184                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 185                                        p_iov->vf2pf_request,
 186                                        p_iov->vf2pf_request_phys,
 187                                        sizeof(union vfpf_tlvs));
 188         if (p_iov->pf2vf_reply)
 189                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 190                                        p_iov->pf2vf_reply,
 191                                        p_iov->pf2vf_reply_phys,
 192                                        sizeof(union pfvf_tlvs));
 193
 194         if (p_iov->bulletin.p_virt) {
 195                 size = sizeof(struct ecore_bulletin_content);
 196                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 197                                        p_iov->bulletin.p_virt,
 198                                        p_iov->bulletin.phys,
 199                                        size);
 200         }
 201
 202 #ifdef CONFIG_ECORE_LOCK_ALLOC
 203         OSAL_MUTEX_DEALLOC(&p_iov->mutex);
 204 #endif
 205
 206         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
 207         p_hwfn->vf_iov_info = OSAL_NULL;
 208
 209         return rc;
 210 }
 211
 212 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
 213 {
 214         return _ecore_vf_pf_release(p_hwfn, true);
 215 }
 216
 217 #define VF_ACQUIRE_THRESH 3
 218 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
 219                                             struct vf_pf_resc_request *p_req,
 220                                             struct pf_vf_resc *p_resp)
 221 {
 222         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 223                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
 224                    p_req->num_rxqs, p_resp->num_rxqs,
 225                    p_req->num_rxqs, p_resp->num_txqs,
 226                    p_req->num_sbs, p_resp->num_sbs,
 227                    p_req->num_mac_filters, p_resp->num_mac_filters,
 228                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
 229                    p_req->num_mc_filters, p_resp->num_mc_filters,
 230                    p_req->num_cids, p_resp->num_cids);
 231
 232         /* humble our request */
 233         p_req->num_txqs = p_resp->num_txqs;
 234         p_req->num_rxqs = p_resp->num_rxqs;
 235         p_req->num_sbs = p_resp->num_sbs;
 236         p_req->num_mac_filters = p_resp->num_mac_filters;
 237         p_req->num_vlan_filters = p_resp->num_vlan_filters;
 238         p_req->num_mc_filters = p_resp->num_mc_filters;
 239         p_req->num_cids = p_resp->num_cids;
 240 }
 241
 242 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
 243 {
 244         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 245         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
 246         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
 247         struct ecore_vf_acquire_sw_info vf_sw_info;
 248         struct vf_pf_resc_request *p_resc;
 249         bool resources_acquired = false;
 250         struct vfpf_acquire_tlv *req;
 251         int attempts = 0;
 252         enum _ecore_status_t rc = ECORE_SUCCESS;
 253
 254         /* clear mailbox and prep first tlv */
 255         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
 256         p_resc = &req->resc_request;
 257
 258         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
 259         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
 260
 261         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
 262         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
 263         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
 264         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
 265         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
 266         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
 267
 268         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
 269         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
 270
 271         req->vfdev_info.os_type = vf_sw_info.os_type;
 272         req->vfdev_info.driver_version = vf_sw_info.driver_version;
 273         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
 274         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
 275         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
 276         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
 277         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
 278         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
 279
 280         /* Fill capability field with any non-deprecated config we support */
 281         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
 282
 283         /* If we've mapped the doorbell bar, try using queue qids */
 284         if (p_iov->b_doorbell_bar)
 285                 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_PHYSICAL_BAR |
 286                                                 VFPF_ACQUIRE_CAP_QUEUE_QIDS;
 287
 288         /* pf 2 vf bulletin board address */
 289         req->bulletin_addr = p_iov->bulletin.phys;
 290         req->bulletin_size = p_iov->bulletin.size;
 291
 292         /* add list termination tlv */
 293         ecore_add_tlv(&p_iov->offset,
 294                       CHANNEL_TLV_LIST_END,
 295                       sizeof(struct channel_list_end_tlv));
 296
 297         while (!resources_acquired) {
 298                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 299                            "attempting to acquire resources\n");
 300
 301                 /* Clear response buffer, as this might be a re-send */
 302                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
 303                             sizeof(union pfvf_tlvs));
 304
 305                 /* send acquire request */
 306                 rc = ecore_send_msg2pf(p_hwfn,
 307                                        &resp->hdr.status, sizeof(*resp));
 308                 if (rc != ECORE_SUCCESS)
 309                         goto exit;
 310
 311                 /* copy acquire response from buffer to p_hwfn */
 312                 OSAL_MEMCPY(&p_iov->acquire_resp,
 313                             resp, sizeof(p_iov->acquire_resp));
 314
 315                 attempts++;
 316
 317                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
 318                         /* PF agrees to allocate our resources */
 319                         if (!(resp->pfdev_info.capabilities &
 320                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
 321                                 /* It's possible legacy PF mistakenly accepted;
 322                                  * but we don't care - simply mark it as
 323                                  * legacy and continue.
 324                                  */
 325                                 req->vfdev_info.capabilities |=
 326                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 327                         }
 328                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 329                                    "resources acquired\n");
 330                         resources_acquired = true;
 331                 } /* PF refuses to allocate our resources */
 332                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
 333                          attempts < VF_ACQUIRE_THRESH) {
 334                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
 335                                                         &resp->resc);
 336
 337                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
 338                         if (pfdev_info->major_fp_hsi &&
 339                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
 340                                 DP_NOTICE(p_hwfn, false,
 341                                           "PF uses an incompatible fastpath HSI"
 342                                           " %02x.%02x [VF requires %02x.%02x]."
 343                                           " Please change to a VF driver using"
 344                                           " %02x.xx.\n",
 345                                           pfdev_info->major_fp_hsi,
 346                                           pfdev_info->minor_fp_hsi,
 347                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
 348                                           pfdev_info->major_fp_hsi);
 349                                 rc = ECORE_INVAL;
 350                                 goto exit;
 351                         }
 352
 353                         if (!pfdev_info->major_fp_hsi) {
 354                                 if (req->vfdev_info.capabilities &
 355                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
 356                                         DP_NOTICE(p_hwfn, false,
 357                                                   "PF uses very old drivers."
 358                                                   " Please change to a VF"
 359                                                   " driver using no later than"
 360                                                   " 8.8.x.x.\n");
 361                                         rc = ECORE_INVAL;
 362                                         goto exit;
 363                                 } else {
 364                                         DP_INFO(p_hwfn,
 365                                                 "PF is old - try re-acquire to"
 366                                                 " see if it supports FW-version"
 367                                                 " override\n");
 368                                         req->vfdev_info.capabilities |=
 369                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 370                                         continue;
 371                                 }
 372                         }
 373
 374                         /* If PF/VF are using same Major, PF must have had
 375                          * it's reasons. Simply fail.
 376                          */
 377                         DP_NOTICE(p_hwfn, false,
 378                                   "PF rejected acquisition by VF\n");
 379                         rc = ECORE_INVAL;
 380                         goto exit;
 381                 } else {
 382                         DP_ERR(p_hwfn,
 383                                "PF returned err %d to VF acquisition request\n",
 384                                resp->hdr.status);
 385                         rc = ECORE_AGAIN;
 386                         goto exit;
 387                 }
 388         }
 389
 390         /* Mark the PF as legacy, if needed */
 391         if (req->vfdev_info.capabilities &
 392             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
 393                 p_iov->b_pre_fp_hsi = true;
 394
 395         /* In case PF doesn't support multi-queue Tx, update the number of
 396          * CIDs to reflect the number of queues [older PFs didn't fill that
 397          * field].
 398          */
 399         if (!(resp->pfdev_info.capabilities &
 400               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 401                 resp->resc.num_cids = resp->resc.num_rxqs +
 402                                       resp->resc.num_txqs;
 403
 404         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
 405         if (rc) {
 406                 DP_NOTICE(p_hwfn, true,
 407                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
 408                           " status = 0x%x.\n",
 409                           rc);
 410                 rc = ECORE_AGAIN;
 411                 goto exit;
 412         }
 413
 414         /* Update bulletin board size with response from PF */
 415         p_iov->bulletin.size = resp->bulletin_size;
 416
 417         /* get HW info */
 418         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
 419         p_hwfn->p_dev->chip_rev = (u8)resp->pfdev_info.chip_rev;
 420
 421         DP_INFO(p_hwfn, "Chip details - %s%d\n",
 422                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
 423                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
 424
 425         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
 426
 427         /* Learn of the possibility of CMT */
 428         if (IS_LEAD_HWFN(p_hwfn)) {
 429                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
 430                         DP_INFO(p_hwfn, "100g VF\n");
 431                         p_hwfn->p_dev->num_hwfns = 2;
 432                 }
 433         }
 434
 435         /* @DPDK */
 436         if ((~p_iov->b_pre_fp_hsi &
 437             ETH_HSI_VER_MINOR) &&
 438             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
 439                 DP_INFO(p_hwfn,
 440                         "PF is using older fastpath HSI;"
 441                         " %02x.%02x is configured\n",
 442                         ETH_HSI_VER_MAJOR,
 443                         resp->pfdev_info.minor_fp_hsi);
 444
 445 exit:
 446         ecore_vf_pf_req_end(p_hwfn, rc);
 447
 448         return rc;
 449 }
 450
 451 u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn,
 452                          enum BAR_ID bar_id)
 453 {
 454         u32 bar_size;
 455
 456         /* Regview size is fixed */
 457         if (bar_id == BAR_ID_0)
 458                 return 1 << 17;
 459
 460         /* Doorbell is received from PF */
 461         bar_size = p_hwfn->vf_iov_info->acquire_resp.pfdev_info.bar_size;
 462         if (bar_size)
 463                 return 1 << bar_size;
 464         return 0;
 465 }
 466
 467 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
 468 {
 469         struct ecore_hwfn *p_lead = ECORE_LEADING_HWFN(p_hwfn->p_dev);
 470         struct ecore_vf_iov *p_iov;
 471         u32 reg;
 472         enum _ecore_status_t rc;
 473
 474         /* Set number of hwfns - might be overridden once leading hwfn learns
 475          * actual configuration from PF.
 476          */
 477         if (IS_LEAD_HWFN(p_hwfn))
 478                 p_hwfn->p_dev->num_hwfns = 1;
 479
 480         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
 481         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
 482
 483         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
 484         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
 485
 486         /* Allocate vf sriov info */
 487         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
 488         if (!p_iov) {
 489                 DP_NOTICE(p_hwfn, true,
 490                           "Failed to allocate `struct ecore_sriov'\n");
 491                 return ECORE_NOMEM;
 492         }
 493
 494         /* Doorbells are tricky; Upper-layer has alreday set the hwfn doorbell
 495          * value, but there are several incompatibily scenarios where that
 496          * would be incorrect and we'd need to override it.
 497          */
 498         if (p_hwfn->doorbells == OSAL_NULL) {
 499                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 500                                                      PXP_VF_BAR0_START_DQ;
 501         } else if (p_hwfn == p_lead) {
 502                 /* For leading hw-function, value is always correct, but need
 503                  * to handle scenario where legacy PF would not support 100g
 504                  * mapped bars later.
 505                  */
 506                 p_iov->b_doorbell_bar = true;
 507         } else {
 508                 /* here, value would be correct ONLY if the leading hwfn
 509                  * received indication that mapped-bars are supported.
 510                  */
 511                 if (p_lead->vf_iov_info->b_doorbell_bar)
 512                         p_iov->b_doorbell_bar = true;
 513                 else
 514                         p_hwfn->doorbells = (u8 OSAL_IOMEM *)
 515                                             p_hwfn->regview +
 516                                             PXP_VF_BAR0_START_DQ;
 517         }
 518
 519         /* Allocate vf2pf msg */
 520         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 521                                                          &p_iov->
 522                                                          vf2pf_request_phys,
 523                                                          sizeof(union
 524                                                                 vfpf_tlvs));
 525         if (!p_iov->vf2pf_request) {
 526                 DP_NOTICE(p_hwfn, true,
 527                          "Failed to allocate `vf2pf_request' DMA memory\n");
 528                 goto free_p_iov;
 529         }
 530
 531         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 532                                                        &p_iov->
 533                                                        pf2vf_reply_phys,
 534                                                        sizeof(union pfvf_tlvs));
 535         if (!p_iov->pf2vf_reply) {
 536                 DP_NOTICE(p_hwfn, true,
 537                           "Failed to allocate `pf2vf_reply' DMA memory\n");
 538                 goto free_vf2pf_request;
 539         }
 540
 541         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 542                    "VF's Request mailbox [%p virt 0x%lx phys], "
 543                    "Response mailbox [%p virt 0x%lx phys]\n",
 544                    p_iov->vf2pf_request,
 545                    (unsigned long)p_iov->vf2pf_request_phys,
 546                    p_iov->pf2vf_reply,
 547                    (unsigned long)p_iov->pf2vf_reply_phys);
 548
 549         /* Allocate Bulletin board */
 550         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
 551         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 552                                                            &p_iov->bulletin.
 553                                                            phys,
 554                                                            p_iov->bulletin.
 555                                                            size);
 556         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 557                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
 558                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
 559                    p_iov->bulletin.size);
 560
 561 #ifdef CONFIG_ECORE_LOCK_ALLOC
 562         OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
 563 #endif
 564         OSAL_MUTEX_INIT(&p_iov->mutex);
 565
 566         p_hwfn->vf_iov_info = p_iov;
 567
 568         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
 569
 570         rc = ecore_vf_pf_acquire(p_hwfn);
 571
 572         /* If VF is 100g using a mapped bar and PF is too old to support that,
 573          * acquisition would succeed - but the VF would have no way knowing
 574          * the size of the doorbell bar configured in HW and thus will not
 575          * know how to split it for 2nd hw-function.
 576          * In this case we re-try without the indication of the mapped
 577          * doorbell.
 578          */
 579         if (rc == ECORE_SUCCESS &&
 580             p_iov->b_doorbell_bar &&
 581             !ecore_vf_hw_bar_size(p_hwfn, BAR_ID_1) &&
 582             ECORE_IS_CMT(p_hwfn->p_dev)) {
 583                 rc = _ecore_vf_pf_release(p_hwfn, false);
 584                 if (rc != ECORE_SUCCESS)
 585                         return rc;
 586
 587                 p_iov->b_doorbell_bar = false;
 588                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 589                                                      PXP_VF_BAR0_START_DQ;
 590                 rc = ecore_vf_pf_acquire(p_hwfn);
 591         }
 592
 593         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 594                    "Regview [%p], Doorbell [%p], Device-doorbell [%p]\n",
 595                    p_hwfn->regview, p_hwfn->doorbells,
 596                    p_hwfn->p_dev->doorbells);
 597
 598         return rc;
 599
 600 free_vf2pf_request:
 601         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
 602                                p_iov->vf2pf_request_phys,
 603                                sizeof(union vfpf_tlvs));
 604 free_p_iov:
 605         OSAL_FREE(p_hwfn->p_dev, p_iov);
 606
 607         return ECORE_NOMEM;
 608 }
 609
 610 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
 611 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
 612                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
 613
 614 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 615 static void
 616 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 617                              struct ecore_tunn_update_type *p_src,
 618                              enum ecore_tunn_mode mask, u8 *p_cls)
 619 {
 620         if (p_src->b_update_mode) {
 621                 p_req->tun_mode_update_mask |= (1 << mask);
 622
 623                 if (p_src->b_mode_enabled)
 624                         p_req->tunn_mode |= (1 << mask);
 625         }
 626
 627         *p_cls = p_src->tun_cls;
 628 }
 629
 630 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 631 static void
 632 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 633                            struct ecore_tunn_update_type *p_src,
 634                            enum ecore_tunn_mode mask, u8 *p_cls,
 635                            struct ecore_tunn_update_udp_port *p_port,
 636                            u8 *p_update_port, u16 *p_udp_port)
 637 {
 638         if (p_port->b_update_port) {
 639                 *p_update_port = 1;
 640                 *p_udp_port = p_port->port;
 641         }
 642
 643         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
 644 }
 645
 646 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
 647 {
 648         if (p_tun->vxlan.b_mode_enabled)
 649                 p_tun->vxlan.b_update_mode = true;
 650         if (p_tun->l2_geneve.b_mode_enabled)
 651                 p_tun->l2_geneve.b_update_mode = true;
 652         if (p_tun->ip_geneve.b_mode_enabled)
 653                 p_tun->ip_geneve.b_update_mode = true;
 654         if (p_tun->l2_gre.b_mode_enabled)
 655                 p_tun->l2_gre.b_update_mode = true;
 656         if (p_tun->ip_gre.b_mode_enabled)
 657                 p_tun->ip_gre.b_update_mode = true;
 658
 659         p_tun->b_update_rx_cls = true;
 660         p_tun->b_update_tx_cls = true;
 661 }
 662
 663 static void
 664 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
 665                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
 666                              enum ecore_tunn_mode val)
 667 {
 668         if (feature_mask & (1 << val)) {
 669                 p_tun->b_mode_enabled = tunn_mode;
 670                 p_tun->tun_cls = tunn_cls;
 671         } else {
 672                 p_tun->b_mode_enabled = false;
 673         }
 674 }
 675
 676 static void
 677 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
 678                            struct ecore_tunnel_info *p_tun,
 679                            struct pfvf_update_tunn_param_tlv *p_resp)
 680 {
 681         /* Update mode and classes provided by PF */
 682         u16 feat_mask = p_resp->tunn_feature_mask;
 683
 684         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
 685                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
 686                                      ECORE_MODE_VXLAN_TUNN);
 687         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
 688                                      p_resp->l2geneve_mode,
 689                                      p_resp->l2geneve_clss,
 690                                      ECORE_MODE_L2GENEVE_TUNN);
 691         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
 692                                      p_resp->ipgeneve_mode,
 693                                      p_resp->ipgeneve_clss,
 694                                      ECORE_MODE_IPGENEVE_TUNN);
 695         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
 696                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
 697                                      ECORE_MODE_L2GRE_TUNN);
 698         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
 699                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
 700                                      ECORE_MODE_IPGRE_TUNN);
 701         p_tun->geneve_port.port = p_resp->geneve_udp_port;
 702         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
 703
 704         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 705                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
 706                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
 707                    p_tun->ip_geneve.b_mode_enabled,
 708                    p_tun->l2_gre.b_mode_enabled,
 709                    p_tun->ip_gre.b_mode_enabled);
 710 }
 711
 712 enum _ecore_status_t
 713 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
 714                                 struct ecore_tunnel_info *p_src)
 715 {
 716         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
 717         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 718         struct pfvf_update_tunn_param_tlv *p_resp;
 719         struct vfpf_update_tunn_param_tlv *p_req;
 720         enum _ecore_status_t rc;
 721
 722         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
 723                                  sizeof(*p_req));
 724
 725         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
 726                 p_req->update_tun_cls = 1;
 727
 728         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
 729                                    &p_req->vxlan_clss, &p_src->vxlan_port,
 730                                    &p_req->update_vxlan_port,
 731                                    &p_req->vxlan_port);
 732         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
 733                                    ECORE_MODE_L2GENEVE_TUNN,
 734                                    &p_req->l2geneve_clss, &p_src->geneve_port,
 735                                    &p_req->update_geneve_port,
 736                                    &p_req->geneve_port);
 737         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
 738                                      ECORE_MODE_IPGENEVE_TUNN,
 739                                      &p_req->ipgeneve_clss);
 740         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
 741                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
 742         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
 743                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
 744
 745         /* add list termination tlv */
 746         ecore_add_tlv(&p_iov->offset,
 747                       CHANNEL_TLV_LIST_END,
 748                       sizeof(struct channel_list_end_tlv));
 749
 750         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
 751         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
 752
 753         if (rc)
 754                 goto exit;
 755
 756         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
 757                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 758                            "Failed to update tunnel parameters\n");
 759                 rc = ECORE_INVAL;
 760         }
 761
 762         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
 763 exit:
 764         ecore_vf_pf_req_end(p_hwfn, rc);
 765         return rc;
 766 }
 767
 768 enum _ecore_status_t
 769 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
 770                       struct ecore_queue_cid *p_cid,
 771                       u16 bd_max_bytes,
 772                       dma_addr_t bd_chain_phys_addr,
 773                       dma_addr_t cqe_pbl_addr,
 774                       u16 cqe_pbl_size,
 775                       void OSAL_IOMEM **pp_prod)
 776 {
 777         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 778         struct pfvf_start_queue_resp_tlv *resp;
 779         struct vfpf_start_rxq_tlv *req;
 780         u16 rx_qid = p_cid->rel.queue_id;
 781         enum _ecore_status_t rc;
 782
 783         /* clear mailbox and prep first tlv */
 784         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
 785
 786         req->rx_qid = rx_qid;
 787         req->cqe_pbl_addr = cqe_pbl_addr;
 788         req->cqe_pbl_size = cqe_pbl_size;
 789         req->rxq_addr = bd_chain_phys_addr;
 790         req->hw_sb = p_cid->sb_igu_id;
 791         req->sb_index = p_cid->sb_idx;
 792         req->bd_max_bytes = bd_max_bytes;
 793         req->stat_id = -1; /* Keep initialized, for future compatibility */
 794
 795         /* If PF is legacy, we'll need to calculate producers ourselves
 796          * as well as clean them.
 797          */
 798         if (p_iov->b_pre_fp_hsi) {
 799                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
 800                 u32 init_prod_val = 0;
 801
 802                 *pp_prod = (u8 OSAL_IOMEM *)
 803                            p_hwfn->regview +
 804                            MSTORM_QZONE_START(p_hwfn->p_dev) +
 805                            (hw_qid) * MSTORM_QZONE_SIZE;
 806
 807                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 808                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 809                                   (u32 *)(&init_prod_val));
 810         }
 811
 812         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 813
 814         /* add list termination tlv */
 815         ecore_add_tlv(&p_iov->offset,
 816                       CHANNEL_TLV_LIST_END,
 817                       sizeof(struct channel_list_end_tlv));
 818
 819         resp = &p_iov->pf2vf_reply->queue_start;
 820         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 821         if (rc)
 822                 goto exit;
 823
 824         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 825                 rc = ECORE_INVAL;
 826                 goto exit;
 827         }
 828
 829         /* Learn the address of the producer from the response */
 830         if (!p_iov->b_pre_fp_hsi) {
 831                 u32 init_prod_val = 0;
 832
 833                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
 834                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 835                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
 836                            rx_qid, *pp_prod, resp->offset);
 837
 838                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
 839                  * It was actually the PF's responsibility, but since some
 840                  * old PFs might fail to do so, we do this as well.
 841                  */
 842                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
 843                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 844                                   (u32 *)&init_prod_val);
 845         }
 846
 847 exit:
 848         ecore_vf_pf_req_end(p_hwfn, rc);
 849
 850         return rc;
 851 }
 852
 853 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
 854                                           struct ecore_queue_cid *p_cid,
 855                                           bool cqe_completion)
 856 {
 857         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 858         struct vfpf_stop_rxqs_tlv *req;
 859         struct pfvf_def_resp_tlv *resp;
 860         enum _ecore_status_t rc;
 861
 862         /* clear mailbox and prep first tlv */
 863         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
 864
 865         req->rx_qid = p_cid->rel.queue_id;
 866         req->num_rxqs = 1;
 867         req->cqe_completion = cqe_completion;
 868
 869         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 870
 871         /* add list termination tlv */
 872         ecore_add_tlv(&p_iov->offset,
 873                       CHANNEL_TLV_LIST_END,
 874                       sizeof(struct channel_list_end_tlv));
 875
 876         resp = &p_iov->pf2vf_reply->default_resp;
 877         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 878         if (rc)
 879                 goto exit;
 880
 881         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 882                 rc = ECORE_INVAL;
 883                 goto exit;
 884         }
 885
 886 exit:
 887         ecore_vf_pf_req_end(p_hwfn, rc);
 888
 889         return rc;
 890 }
 891
 892 enum _ecore_status_t
 893 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
 894                       struct ecore_queue_cid *p_cid,
 895                       dma_addr_t pbl_addr, u16 pbl_size,
 896                       void OSAL_IOMEM **pp_doorbell)
 897 {
 898         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 899         struct pfvf_start_queue_resp_tlv *resp;
 900         struct vfpf_start_txq_tlv *req;
 901         u16 qid = p_cid->rel.queue_id;
 902         enum _ecore_status_t rc;
 903
 904         /* clear mailbox and prep first tlv */
 905         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
 906
 907         req->tx_qid = qid;
 908
 909         /* Tx */
 910         req->pbl_addr = pbl_addr;
 911         req->pbl_size = pbl_size;
 912         req->hw_sb = p_cid->sb_igu_id;
 913         req->sb_index = p_cid->sb_idx;
 914
 915         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 916
 917         /* add list termination tlv */
 918         ecore_add_tlv(&p_iov->offset,
 919                       CHANNEL_TLV_LIST_END,
 920                       sizeof(struct channel_list_end_tlv));
 921
 922         resp  = &p_iov->pf2vf_reply->queue_start;
 923         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 924         if (rc)
 925                 goto exit;
 926
 927         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 928                 rc = ECORE_INVAL;
 929                 goto exit;
 930         }
 931
 932         /* Modern PFs provide the actual offsets, while legacy
 933          * provided only the queue id.
 934          */
 935         if (!p_iov->b_pre_fp_hsi) {
 936                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 937                                                 resp->offset;
 938         } else {
 939                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
 940
 941                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 942                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
 943         }
 944
 945         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 946                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
 947                    qid, *pp_doorbell, resp->offset);
 948 exit:
 949         ecore_vf_pf_req_end(p_hwfn, rc);
 950
 951         return rc;
 952 }
 953
 954 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
 955                                           struct ecore_queue_cid *p_cid)
 956 {
 957         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 958         struct vfpf_stop_txqs_tlv *req;
 959         struct pfvf_def_resp_tlv *resp;
 960         enum _ecore_status_t rc;
 961
 962         /* clear mailbox and prep first tlv */
 963         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
 964
 965         req->tx_qid = p_cid->rel.queue_id;
 966         req->num_txqs = 1;
 967
 968         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 969
 970         /* add list termination tlv */
 971         ecore_add_tlv(&p_iov->offset,
 972                       CHANNEL_TLV_LIST_END,
 973                       sizeof(struct channel_list_end_tlv));
 974
 975         resp = &p_iov->pf2vf_reply->default_resp;
 976         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 977         if (rc)
 978                 goto exit;
 979
 980         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 981                 rc = ECORE_INVAL;
 982                 goto exit;
 983         }
 984
 985 exit:
 986         ecore_vf_pf_req_end(p_hwfn, rc);
 987
 988         return rc;
 989 }
 990
 991 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
 992                                              struct ecore_queue_cid **pp_cid,
 993                                              u8 num_rxqs,
 994                                              u8 comp_cqe_flg,
 995                                              u8 comp_event_flg)
 996 {
 997         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 998         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
 999         struct vfpf_update_rxq_tlv *req;
1000         enum _ecore_status_t rc;
1001
1002         /* Starting with CHANNEL_TLV_QID and the need for additional queue
1003          * information, this API stopped supporting multiple rxqs.
1004          * TODO - remove this and change the API to accept a single queue-cid
1005          * in a follow-up patch.
1006          */
1007         if (num_rxqs != 1) {
1008                 DP_NOTICE(p_hwfn, true,
1009                           "VFs can no longer update more than a single queue\n");
1010                 return ECORE_INVAL;
1011         }
1012
1013         /* clear mailbox and prep first tlv */
1014         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
1015
1016         req->rx_qid = (*pp_cid)->rel.queue_id;
1017         req->num_rxqs = 1;
1018
1019         if (comp_cqe_flg)
1020                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
1021         if (comp_event_flg)
1022                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
1023
1024         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
1025
1026         /* add list termination tlv */
1027         ecore_add_tlv(&p_iov->offset,
1028                       CHANNEL_TLV_LIST_END,
1029                       sizeof(struct channel_list_end_tlv));
1030
1031         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1032         if (rc)
1033                 goto exit;
1034
1035         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1036                 rc = ECORE_INVAL;
1037                 goto exit;
1038         }
1039
1040 exit:
1041         ecore_vf_pf_req_end(p_hwfn, rc);
1042         return rc;
1043 }
1044
1045 enum _ecore_status_t
1046 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
1047                         u16 mtu, u8 inner_vlan_removal,
1048                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
1049                         u8 only_untagged)
1050 {
1051         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1052         struct vfpf_vport_start_tlv *req;
1053         struct pfvf_def_resp_tlv *resp;
1054         enum _ecore_status_t rc;
1055         int i;
1056
1057         /* clear mailbox and prep first tlv */
1058         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
1059
1060         req->mtu = mtu;
1061         req->vport_id = vport_id;
1062         req->inner_vlan_removal = inner_vlan_removal;
1063         req->tpa_mode = tpa_mode;
1064         req->max_buffers_per_cqe = max_buffers_per_cqe;
1065         req->only_untagged = only_untagged;
1066
1067         /* status blocks */
1068         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
1069                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
1070
1071                 if (p_sb)
1072                         req->sb_addr[i] = p_sb->sb_phys;
1073         }
1074
1075         /* add list termination tlv */
1076         ecore_add_tlv(&p_iov->offset,
1077                       CHANNEL_TLV_LIST_END,
1078                       sizeof(struct channel_list_end_tlv));
1079
1080         resp  = &p_iov->pf2vf_reply->default_resp;
1081         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1082         if (rc)
1083                 goto exit;
1084
1085         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1086                 rc = ECORE_INVAL;
1087                 goto exit;
1088         }
1089
1090 exit:
1091         ecore_vf_pf_req_end(p_hwfn, rc);
1092
1093         return rc;
1094 }
1095
1096 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
1097 {
1098         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1099         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1100         enum _ecore_status_t rc;
1101
1102         /* clear mailbox and prep first tlv */
1103         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
1104                          sizeof(struct vfpf_first_tlv));
1105
1106         /* add list termination tlv */
1107         ecore_add_tlv(&p_iov->offset,
1108                       CHANNEL_TLV_LIST_END,
1109                       sizeof(struct channel_list_end_tlv));
1110
1111         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1112         if (rc)
1113                 goto exit;
1114
1115         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1116                 rc = ECORE_INVAL;
1117                 goto exit;
1118         }
1119
1120 exit:
1121         ecore_vf_pf_req_end(p_hwfn, rc);
1122
1123         return rc;
1124 }
1125
1126 static bool
1127 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
1128                                     struct ecore_sp_vport_update_params *p_data,
1129                                     u16 tlv)
1130 {
1131         switch (tlv) {
1132         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
1133                 return !!(p_data->update_vport_active_rx_flg ||
1134                           p_data->update_vport_active_tx_flg);
1135         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1136 #ifndef ASIC_ONLY
1137                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1138                 return !!(p_data->update_tx_switching_flg &&
1139                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1140 #else
1141                 return !!p_data->update_tx_switching_flg;
1142 #endif
1143         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1144                 return !!p_data->update_inner_vlan_removal_flg;
1145         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1146                 return !!p_data->update_accept_any_vlan_flg;
1147         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1148                 return !!p_data->update_approx_mcast_flg;
1149         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1150                 return !!(p_data->accept_flags.update_rx_mode_config ||
1151                           p_data->accept_flags.update_tx_mode_config);
1152         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1153                 return !!p_data->rss_params;
1154         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1155                 return !!p_data->sge_tpa_params;
1156         default:
1157                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1158                         tlv, ecore_channel_tlvs_string[tlv]);
1159                 return false;
1160         }
1161 }
1162
1163 static void
1164 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1165                                     struct ecore_sp_vport_update_params *p_data)
1166 {
1167         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1168         struct pfvf_def_resp_tlv *p_resp;
1169         u16 tlv;
1170
1171         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1172              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1173              tlv++) {
1174                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1175                         continue;
1176
1177                 p_resp = (struct pfvf_def_resp_tlv *)
1178                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1179                 if (p_resp && p_resp->hdr.status)
1180                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1181                                    "TLV[%d] type %s Configuration %s\n",
1182                                    tlv, ecore_channel_tlvs_string[tlv],
1183                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1184                                                                   : "failed");
1185         }
1186 }
1187
1188 enum _ecore_status_t
1189 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1190                          struct ecore_sp_vport_update_params *p_params)
1191 {
1192         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1193         struct vfpf_vport_update_tlv *req;
1194         struct pfvf_def_resp_tlv *resp;
1195         u8 update_rx, update_tx;
1196         u32 resp_size = 0;
1197         u16 size, tlv;
1198         enum _ecore_status_t rc;
1199
1200         resp = &p_iov->pf2vf_reply->default_resp;
1201         resp_size = sizeof(*resp);
1202
1203         update_rx = p_params->update_vport_active_rx_flg;
1204         update_tx = p_params->update_vport_active_tx_flg;
1205
1206         /* clear mailbox and prep header tlv */
1207         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1208
1209         /* Prepare extended tlvs */
1210         if (update_rx || update_tx) {
1211                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1212
1213                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1214                 p_act_tlv = ecore_add_tlv(&p_iov->offset,
1215                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1216                                           size);
1217                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1218
1219                 if (update_rx) {
1220                         p_act_tlv->update_rx = update_rx;
1221                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1222                 }
1223
1224                 if (update_tx) {
1225                         p_act_tlv->update_tx = update_tx;
1226                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1227                 }
1228         }
1229
1230         if (p_params->update_inner_vlan_removal_flg) {
1231                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1232
1233                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1234                 p_vlan_tlv = ecore_add_tlv(&p_iov->offset,
1235                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1236                                            size);
1237                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1238
1239                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1240         }
1241
1242         if (p_params->update_tx_switching_flg) {
1243                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1244
1245                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1246                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1247                 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset,
1248                                                 tlv, size);
1249                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1250
1251                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1252         }
1253
1254         if (p_params->update_approx_mcast_flg) {
1255                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1256
1257                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1258                 p_mcast_tlv = ecore_add_tlv(&p_iov->offset,
1259                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1260                                             size);
1261                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1262
1263                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1264                             sizeof(unsigned long) *
1265                             ETH_MULTICAST_MAC_BINS_IN_REGS);
1266         }
1267
1268         update_rx = p_params->accept_flags.update_rx_mode_config;
1269         update_tx = p_params->accept_flags.update_tx_mode_config;
1270
1271         if (update_rx || update_tx) {
1272                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1273
1274                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1275                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1276                 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1277                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1278
1279                 if (update_rx) {
1280                         p_accept_tlv->update_rx_mode = update_rx;
1281                         p_accept_tlv->rx_accept_filter =
1282                             p_params->accept_flags.rx_accept_filter;
1283                 }
1284
1285                 if (update_tx) {
1286                         p_accept_tlv->update_tx_mode = update_tx;
1287                         p_accept_tlv->tx_accept_filter =
1288                             p_params->accept_flags.tx_accept_filter;
1289                 }
1290         }
1291
1292         if (p_params->rss_params) {
1293                 struct ecore_rss_params *rss_params = p_params->rss_params;
1294                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1295                 int i, table_size;
1296
1297                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1298                 p_rss_tlv = ecore_add_tlv(&p_iov->offset,
1299                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1300                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1301
1302                 if (rss_params->update_rss_config)
1303                         p_rss_tlv->update_rss_flags |=
1304                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1305                 if (rss_params->update_rss_capabilities)
1306                         p_rss_tlv->update_rss_flags |=
1307                             VFPF_UPDATE_RSS_CAPS_FLAG;
1308                 if (rss_params->update_rss_ind_table)
1309                         p_rss_tlv->update_rss_flags |=
1310                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1311                 if (rss_params->update_rss_key)
1312                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1313
1314                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1315                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1316                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1317
1318                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1319                                         1 << p_rss_tlv->rss_table_size_log);
1320                 for (i = 0; i < table_size; i++) {
1321                         struct ecore_queue_cid *p_queue;
1322
1323                         p_queue = rss_params->rss_ind_table[i];
1324                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1325                 }
1326
1327                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1328                             sizeof(rss_params->rss_key));
1329         }
1330
1331         if (p_params->update_accept_any_vlan_flg) {
1332                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1333
1334                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1335                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1336                 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1337
1338                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1339                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1340                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1341                     p_params->update_accept_any_vlan_flg;
1342         }
1343
1344         if (p_params->sge_tpa_params) {
1345                 struct ecore_sge_tpa_params *sge_tpa_params;
1346                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1347
1348                 sge_tpa_params = p_params->sge_tpa_params;
1349                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1350                 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset,
1351                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1352                                               size);
1353                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1354
1355                 if (sge_tpa_params->update_tpa_en_flg)
1356                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1357                             VFPF_UPDATE_TPA_EN_FLAG;
1358                 if (sge_tpa_params->update_tpa_param_flg)
1359                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1360                             VFPF_UPDATE_TPA_PARAM_FLAG;
1361
1362                 if (sge_tpa_params->tpa_ipv4_en_flg)
1363                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1364                 if (sge_tpa_params->tpa_ipv6_en_flg)
1365                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1366                 if (sge_tpa_params->tpa_pkt_split_flg)
1367                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1368                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1369                         p_sge_tpa_tlv->sge_tpa_flags |=
1370                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1371                 if (sge_tpa_params->tpa_gro_consistent_flg)
1372                         p_sge_tpa_tlv->sge_tpa_flags |=
1373                             VFPF_TPA_GRO_CONSIST_FLAG;
1374
1375                 p_sge_tpa_tlv->tpa_max_aggs_num =
1376                     sge_tpa_params->tpa_max_aggs_num;
1377                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1378                 p_sge_tpa_tlv->tpa_min_size_to_start =
1379                     sge_tpa_params->tpa_min_size_to_start;
1380                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1381                     sge_tpa_params->tpa_min_size_to_cont;
1382
1383                 p_sge_tpa_tlv->max_buffers_per_cqe =
1384                     sge_tpa_params->max_buffers_per_cqe;
1385         }
1386
1387         /* add list termination tlv */
1388         ecore_add_tlv(&p_iov->offset,
1389                       CHANNEL_TLV_LIST_END,
1390                       sizeof(struct channel_list_end_tlv));
1391
1392         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1393         if (rc)
1394                 goto exit;
1395
1396         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1397                 rc = ECORE_INVAL;
1398                 goto exit;
1399         }
1400
1401         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1402
1403 exit:
1404         ecore_vf_pf_req_end(p_hwfn, rc);
1405
1406         return rc;
1407 }
1408
1409 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1410 {
1411         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1412         struct pfvf_def_resp_tlv *resp;
1413         struct vfpf_first_tlv *req;
1414         enum _ecore_status_t rc;
1415
1416         /* clear mailbox and prep first tlv */
1417         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1418
1419         /* add list termination tlv */
1420         ecore_add_tlv(&p_iov->offset,
1421                       CHANNEL_TLV_LIST_END,
1422                       sizeof(struct channel_list_end_tlv));
1423
1424         resp = &p_iov->pf2vf_reply->default_resp;
1425         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1426         if (rc)
1427                 goto exit;
1428
1429         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1430                 rc = ECORE_AGAIN;
1431                 goto exit;
1432         }
1433
1434         p_hwfn->b_int_enabled = 0;
1435
1436 exit:
1437         ecore_vf_pf_req_end(p_hwfn, rc);
1438
1439         return rc;
1440 }
1441
1442 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1443                               struct ecore_filter_mcast *p_filter_cmd)
1444 {
1445         struct ecore_sp_vport_update_params sp_params;
1446         int i;
1447
1448         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1449         sp_params.update_approx_mcast_flg = 1;
1450
1451         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1452                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1453                         u32 bit;
1454
1455                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1456                         OSAL_SET_BIT(bit, sp_params.bins);
1457                 }
1458         }
1459
1460         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1461 }
1462
1463 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1464                                               struct ecore_filter_ucast
1465                                               *p_ucast)
1466 {
1467         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1468         struct vfpf_ucast_filter_tlv *req;
1469         struct pfvf_def_resp_tlv *resp;
1470         enum _ecore_status_t rc;
1471
1472         /* Sanitize */
1473         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1474                 DP_NOTICE(p_hwfn, true,
1475                           "VFs don't support Moving of filters\n");
1476                 return ECORE_INVAL;
1477         }
1478
1479         /* clear mailbox and prep first tlv */
1480         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1481         req->opcode = (u8)p_ucast->opcode;
1482         req->type = (u8)p_ucast->type;
1483         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1484         req->vlan = p_ucast->vlan;
1485
1486         /* add list termination tlv */
1487         ecore_add_tlv(&p_iov->offset,
1488                       CHANNEL_TLV_LIST_END,
1489                       sizeof(struct channel_list_end_tlv));
1490
1491         resp = &p_iov->pf2vf_reply->default_resp;
1492         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1493         if (rc)
1494                 goto exit;
1495
1496         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1497                 rc = ECORE_AGAIN;
1498                 goto exit;
1499         }
1500
1501 exit:
1502         ecore_vf_pf_req_end(p_hwfn, rc);
1503
1504         return rc;
1505 }
1506
1507 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1508 {
1509         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1510         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1511         enum _ecore_status_t rc;
1512
1513         /* clear mailbox and prep first tlv */
1514         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1515                          sizeof(struct vfpf_first_tlv));
1516
1517         /* add list termination tlv */
1518         ecore_add_tlv(&p_iov->offset,
1519                       CHANNEL_TLV_LIST_END,
1520                       sizeof(struct channel_list_end_tlv));
1521
1522         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1523         if (rc)
1524                 goto exit;
1525
1526         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1527                 rc = ECORE_INVAL;
1528                 goto exit;
1529         }
1530
1531 exit:
1532         ecore_vf_pf_req_end(p_hwfn, rc);
1533
1534         return rc;
1535 }
1536
1537 enum _ecore_status_t ecore_vf_pf_get_coalesce(struct ecore_hwfn *p_hwfn,
1538                                               u16 *p_coal,
1539                                               struct ecore_queue_cid *p_cid)
1540 {
1541         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1542         struct pfvf_read_coal_resp_tlv *resp;
1543         struct vfpf_read_coal_req_tlv *req;
1544         enum _ecore_status_t rc;
1545
1546         /* clear mailbox and prep header tlv */
1547         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_READ,
1548                                sizeof(*req));
1549         req->qid = p_cid->rel.queue_id;
1550         req->is_rx = p_cid->b_is_rx ? 1 : 0;
1551
1552         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1553                       sizeof(struct channel_list_end_tlv));
1554         resp = &p_iov->pf2vf_reply->read_coal_resp;
1555
1556         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1557         if (rc != ECORE_SUCCESS)
1558                 goto exit;
1559
1560         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1561                 goto exit;
1562
1563         *p_coal = resp->coal;
1564 exit:
1565         ecore_vf_pf_req_end(p_hwfn, rc);
1566
1567         return rc;
1568 }
1569
1570 enum _ecore_status_t
1571 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1572                          struct ecore_queue_cid     *p_cid)
1573 {
1574         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1575         struct vfpf_update_coalesce *req;
1576         struct pfvf_def_resp_tlv *resp;
1577         enum _ecore_status_t rc;
1578
1579         /* clear mailbox and prep header tlv */
1580         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1581                                sizeof(*req));
1582
1583         req->rx_coal = rx_coal;
1584         req->tx_coal = tx_coal;
1585         req->qid = p_cid->rel.queue_id;
1586
1587         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1588                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1589                    rx_coal, tx_coal, req->qid);
1590
1591         /* add list termination tlv */
1592         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1593                       sizeof(struct channel_list_end_tlv));
1594
1595         resp = &p_iov->pf2vf_reply->default_resp;
1596         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1597
1598         if (rc != ECORE_SUCCESS)
1599                 goto exit;
1600
1601         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1602                 goto exit;
1603
1604         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1605         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1606
1607 exit:
1608         ecore_vf_pf_req_end(p_hwfn, rc);
1609         return rc;
1610 }
1611
1612 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1613                            u16               sb_id)
1614 {
1615         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1616
1617         if (!p_iov) {
1618                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1619                 return 0;
1620         }
1621
1622         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1623 }
1624
1625 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1626                           u16 sb_id, struct ecore_sb_info *p_sb)
1627 {
1628         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1629
1630         if (!p_iov) {
1631                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1632                 return;
1633         }
1634
1635         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1636                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1637                 return;
1638         }
1639
1640         p_iov->sbs_info[sb_id] = p_sb;
1641 }
1642
1643 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1644                                             u8 *p_change)
1645 {
1646         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1647         struct ecore_bulletin_content shadow;
1648         u32 crc, crc_size;
1649
1650         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1651         *p_change = 0;
1652
1653         /* Need to guarantee PF is not in the middle of writing it */
1654         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1655
1656         /* If version did not update, no need to do anything */
1657         if (shadow.version == p_iov->bulletin_shadow.version)
1658                 return ECORE_SUCCESS;
1659
1660         /* Verify the bulletin we see is valid */
1661         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1662                          p_iov->bulletin.size - crc_size);
1663         if (crc != shadow.crc)
1664                 return ECORE_AGAIN;
1665
1666         /* Set the shadow bulletin and process it */
1667         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1668
1669         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1670                    "Read a bulletin update %08x\n", shadow.version);
1671
1672         *p_change = 1;
1673
1674         return ECORE_SUCCESS;
1675 }
1676
1677 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params,
1678                                 struct ecore_bulletin_content *p_bulletin)
1679 {
1680         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1681
1682         p_params->speed.autoneg = p_bulletin->req_autoneg;
1683         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1684         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1685         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1686         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1687         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1688         p_params->loopback_mode = p_bulletin->req_loopback;
1689 }
1690
1691 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1692                               struct ecore_mcp_link_params *params)
1693 {
1694         __ecore_vf_get_link_params(params,
1695                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1696 }
1697
1698 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link,
1699                                struct ecore_bulletin_content *p_bulletin)
1700 {
1701         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1702
1703         p_link->link_up = p_bulletin->link_up;
1704         p_link->speed = p_bulletin->speed;
1705         p_link->full_duplex = p_bulletin->full_duplex;
1706         p_link->an = p_bulletin->autoneg;
1707         p_link->an_complete = p_bulletin->autoneg_complete;
1708         p_link->parallel_detection = p_bulletin->parallel_detection;
1709         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1710         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1711         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1712         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1713         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1714         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1715 }
1716
1717 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1718                              struct ecore_mcp_link_state *link)
1719 {
1720         __ecore_vf_get_link_state(link,
1721                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1722 }
1723
1724 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps,
1725                               struct ecore_bulletin_content *p_bulletin)
1726 {
1727         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1728         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1729 }
1730
1731 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1732                             struct ecore_mcp_link_capabilities *p_link_caps)
1733 {
1734         __ecore_vf_get_link_caps(p_link_caps,
1735                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1736 }
1737
1738 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1739 {
1740         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1741 }
1742
1743 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1744                            u8 *num_txqs)
1745 {
1746         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1747 }
1748
1749 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1750 {
1751         OSAL_MEMCPY(port_mac,
1752                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1753                     ETH_ALEN);
1754 }
1755
1756 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1757                                    u8 *num_vlan_filters)
1758 {
1759         struct ecore_vf_iov *p_vf;
1760
1761         p_vf = p_hwfn->vf_iov_info;
1762         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1763 }
1764
1765 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1766                           u32 *num_sbs)
1767 {
1768         struct ecore_vf_iov *p_vf;
1769
1770         p_vf = p_hwfn->vf_iov_info;
1771         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1772 }
1773
1774 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1775                                   u32 *num_mac_filters)
1776 {
1777         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1778
1779         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1780 }
1781
1782 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1783 {
1784         struct ecore_bulletin_content *bulletin;
1785
1786         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1787         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1788                 return true;
1789
1790         /* Forbid VF from changing a MAC enforced by PF */
1791         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1792                 return false;
1793
1794         return false;
1795 }
1796
1797 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1798                                       u8 *p_is_forced)
1799 {
1800         struct ecore_bulletin_content *bulletin;
1801
1802         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1803
1804         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1805                 if (p_is_forced)
1806                         *p_is_forced = 1;
1807         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1808                 if (p_is_forced)
1809                         *p_is_forced = 0;
1810         } else {
1811                 return false;
1812         }
1813
1814         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1815
1816         return true;
1817 }
1818
1819 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1820                                      u16 *p_vxlan_port,
1821                                      u16 *p_geneve_port)
1822 {
1823         struct ecore_bulletin_content *p_bulletin;
1824
1825         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1826
1827         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1828         *p_geneve_port = p_bulletin->geneve_udp_port;
1829 }
1830
1831 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1832 {
1833         struct ecore_bulletin_content *bulletin;
1834
1835         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1836
1837         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1838                 return false;
1839
1840         if (dst_pvid)
1841                 *dst_pvid = bulletin->pvid;
1842
1843         return true;
1844 }
1845
1846 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1847 {
1848         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1849 }
1850
1851 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1852                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1853                              u16 *fw_eng)
1854 {
1855         struct pf_vf_pfdev_info *info;
1856
1857         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1858
1859         *fw_major = info->fw_major;
1860         *fw_minor = info->fw_minor;
1861         *fw_rev = info->fw_rev;
1862         *fw_eng = info->fw_eng;
1863 }
1864
1865 #ifdef CONFIG_ECORE_SW_CHANNEL
1866 void ecore_vf_set_hw_channel(struct ecore_hwfn *p_hwfn, bool b_is_hw)
1867 {
1868         p_hwfn->vf_iov_info->b_hw_channel = b_is_hw;
1869 }
1870 #endif