2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
10 #define __ETH_COMMON__
11 /********************/
12 /* ETH FW CONSTANTS */
13 /********************/
15 /* FP HSI version. FP HSI is compatible if (fwVer.major == drvVer.major &&
16 * fwVer.minor >= drvVer.minor)
18 /* ETH FP HSI Major version */
19 #define ETH_HSI_VER_MAJOR 3
20 /* ETH FP HSI Minor version */
21 #define ETH_HSI_VER_MINOR 10
23 /* Alias for 8.7.x.x/8.8.x.x ETH FP HSI MINOR version. In this version driver
24 * is not required to set pkt_len field in eth_tx_1st_bd struct, and tunneling
25 * offload is not supported.
27 #define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
29 #define ETH_CACHE_LINE_SIZE 64
30 #define ETH_RX_CQE_GAP 32
31 #define ETH_MAX_RAMROD_PER_CON 8
32 #define ETH_TX_BD_PAGE_SIZE_BYTES 4096
33 #define ETH_RX_BD_PAGE_SIZE_BYTES 4096
34 #define ETH_RX_CQE_PAGE_SIZE_BYTES 4096
35 #define ETH_RX_NUM_NEXT_PAGE_BDS 2
37 #define ETH_TX_MIN_BDS_PER_NON_LSO_PKT 1
38 #define ETH_TX_MAX_BDS_PER_NON_LSO_PACKET 18
39 #define ETH_TX_MAX_BDS_PER_LSO_PACKET 255
40 #define ETH_TX_MAX_LSO_HDR_NBD 4
41 #define ETH_TX_MIN_BDS_PER_LSO_PKT 3
42 #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3
43 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2
44 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2
45 /* (QM_REG_TASKBYTECRDCOST_0, QM_VOQ_BYTE_CRD_TASK_COST) -
46 * (VLAN-TAG + CRC + IPG + PREAMBLE)
48 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8))
49 #define ETH_TX_MAX_LSO_HDR_BYTES 510
50 /* Number of BDs to consider for LSO sliding window restriction is
51 * (ETH_TX_LSO_WINDOW_BDS_NUM - hdr_nbd)
53 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1)
54 /* Minimum data length (in bytes) in LSO sliding window */
55 #define ETH_TX_LSO_WINDOW_MIN_LEN 9700
56 /* Maximum LSO packet TCP payload length (in bytes) */
57 #define ETH_TX_MAX_LSO_PAYLOAD_LEN 0xFE000
58 /* Number of same-as-last resources in tx switching */
59 #define ETH_TX_NUM_SAME_AS_LAST_ENTRIES 320
60 /* Value for a connection for which same as last feature is disabled */
61 #define ETH_TX_INACTIVE_SAME_AS_LAST 0xFFFF
63 /* Maximum number of statistics counters */
64 #define ETH_NUM_STATISTIC_COUNTERS MAX_NUM_VPORTS
65 /* Maximum number of statistics counters when doubled VF zone used */
66 #define ETH_NUM_STATISTIC_COUNTERS_DOUBLE_VF_ZONE \
67 (ETH_NUM_STATISTIC_COUNTERS - MAX_NUM_VFS / 2)
68 /* Maximum number of statistics counters when quad VF zone used */
69 #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \
70 (ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4)
72 /* Maximum number of buffers, used for RX packet placement */
73 #define ETH_RX_MAX_BUFF_PER_PKT 5
75 /* num of MAC/VLAN filters */
76 #define ETH_NUM_MAC_FILTERS 512
77 #define ETH_NUM_VLAN_FILTERS 512
79 /* approx. multicast constants */
80 /* CRC seed for multicast bin calculation */
81 #define ETH_MULTICAST_BIN_FROM_MAC_SEED 0
82 #define ETH_MULTICAST_MAC_BINS 256
83 #define ETH_MULTICAST_MAC_BINS_IN_REGS (ETH_MULTICAST_MAC_BINS / 32)
85 /* ethernet vport update constants */
86 #define ETH_FILTER_RULES_COUNT 10
87 /* number of RSS indirection table entries, per Vport) */
88 #define ETH_RSS_IND_TABLE_ENTRIES_NUM 128
89 /* Length of RSS key (in regs) */
90 #define ETH_RSS_KEY_SIZE_REGS 10
91 /* number of available RSS engines in K2 */
92 #define ETH_RSS_ENGINE_NUM_K2 207
93 #define ETH_RSS_ENGINE_NUM_BB 127
96 #define ETH_TPA_MAX_AGGS_NUM 64
97 #define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT
98 #define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
99 #define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
101 /* Control frame check constants */
102 /* Number of etherType values configured by driver for control frame check */
103 #define ETH_CTL_FRAME_ETH_TYPE_NUM 4
108 * Destination port mode
110 enum dest_port_mode {
111 DEST_PORT_PHY /* Send to physical port. */,
112 DEST_PORT_LOOPBACK /* Send to loopback port. */,
113 DEST_PORT_PHY_LOOPBACK /* Send to physical and loopback port. */,
114 DEST_PORT_DROP /* Drop the packet in PBF. */,
119 * Ethernet address type
129 struct eth_tx_1st_bd_flags {
131 #define ETH_TX_1ST_BD_FLAGS_START_BD_MASK 0x1
132 #define ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT 0
133 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK 0x1
134 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT 1
135 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK 0x1
136 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT 2
137 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK 0x1
138 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT 3
139 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK 0x1
140 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT 4
141 #define ETH_TX_1ST_BD_FLAGS_LSO_MASK 0x1
142 #define ETH_TX_1ST_BD_FLAGS_LSO_SHIFT 5
143 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK 0x1
144 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT 6
145 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK 0x1
146 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT 7
150 * The parsing information data for the first tx bd of a given packet.
152 struct eth_tx_data_1st_bd {
153 __le16 vlan /* VLAN tag to insert to packet (if needed). */;
154 /* Number of BDs in packet. Should be at least 2 in non-LSO packet and at least
155 * 3 in LSO (or Tunnel with IPv6+ext) packet.
158 struct eth_tx_1st_bd_flags bd_flags;
160 /* Indicates a tunneled packet. Must be set for encapsulated packet. */
161 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_MASK 0x1
162 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT 0
163 #define ETH_TX_DATA_1ST_BD_RESERVED0_MASK 0x1
164 #define ETH_TX_DATA_1ST_BD_RESERVED0_SHIFT 1
165 /* Total packet length - must be filled for non-LSO packets. */
166 #define ETH_TX_DATA_1ST_BD_PKT_LEN_MASK 0x3FFF
167 #define ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT 2
171 * The parsing information data for the second tx bd of a given packet.
173 struct eth_tx_data_2nd_bd {
176 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_MASK 0xF
177 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0
178 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3
179 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4
180 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3
181 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6
182 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1
183 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8
184 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3
185 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_SHIFT 9
186 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_MASK 0x1
187 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_SHIFT 11
188 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_MASK 0x1
189 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT 12
190 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_MASK 0x1
191 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_SHIFT 13
192 #define ETH_TX_DATA_2ND_BD_L4_UDP_MASK 0x1
193 #define ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT 14
194 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_MASK 0x1
195 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT 15
197 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK 0x1FFF
198 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT 0
199 #define ETH_TX_DATA_2ND_BD_RESERVED0_MASK 0x7
200 #define ETH_TX_DATA_2ND_BD_RESERVED0_SHIFT 13
204 * Firmware data for L2-EDPM packet.
206 struct eth_edpm_fw_data {
207 /* Parsing information data from the 1st BD. */
208 struct eth_tx_data_1st_bd data_1st_bd;
209 /* Parsing information data from the 2nd BD. */
210 struct eth_tx_data_2nd_bd data_2nd_bd;
217 struct eth_fast_path_cqe_fw_debug {
218 __le16 reserved2 /* FW reserved. */;
223 * tunneling parsing flags
225 struct eth_tunnel_parsing_flags {
227 /* 0 - no tunneling, 1 - GENEVE, 2 - GRE, 3 - VXLAN
228 * (use enum eth_rx_tunn_type)
230 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_MASK 0x3
231 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_SHIFT 0
232 /* If it s not an encapsulated packet then put 0x0. If it s an encapsulated
233 * packet but the tenant-id doesn t exist then put 0x0. Else put 0x1
236 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_MASK 0x1
237 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_SHIFT 2
238 /* Type of the next header above the tunneling: 0 - unknown, 1 - L2, 2 - Ipv4,
239 * 3 - IPv6 (use enum tunnel_next_protocol)
241 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_MASK 0x3
242 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_SHIFT 3
243 /* The result of comparing the DA-ip of the tunnel header. */
244 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_MASK 0x1
245 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_SHIFT 5
246 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK 0x1
247 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT 6
248 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_MASK 0x1
249 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_SHIFT 7
253 * PMD flow control bits
255 struct eth_pmd_flow_flags {
257 #define ETH_PMD_FLOW_FLAGS_VALID_MASK 0x1 /* CQE valid bit */
258 #define ETH_PMD_FLOW_FLAGS_VALID_SHIFT 0
259 #define ETH_PMD_FLOW_FLAGS_TOGGLE_MASK 0x1 /* CQE ring toggle bit */
260 #define ETH_PMD_FLOW_FLAGS_TOGGLE_SHIFT 1
261 #define ETH_PMD_FLOW_FLAGS_RESERVED_MASK 0x3F
262 #define ETH_PMD_FLOW_FLAGS_RESERVED_SHIFT 2
266 * Regular ETH Rx FP CQE.
268 struct eth_fast_path_rx_reg_cqe {
269 u8 type /* CQE type */;
271 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_MASK 0x7
272 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_SHIFT 0
273 #define ETH_FAST_PATH_RX_REG_CQE_TC_MASK 0xF
274 #define ETH_FAST_PATH_RX_REG_CQE_TC_SHIFT 3
275 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_MASK 0x1
276 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_SHIFT 7
277 __le16 pkt_len /* Total packet length (from the parser) */;
278 /* Parsing and error flags from the parser */
279 struct parsing_and_err_flags pars_flags;
280 __le16 vlan_tag /* 802.1q VLAN tag */;
281 __le32 rss_hash /* RSS hash result */;
282 __le16 len_on_first_bd /* Number of bytes placed on first BD */;
283 u8 placement_offset /* Offset of placement from BD start */;
284 /* Tunnel Parsing Flags */
285 struct eth_tunnel_parsing_flags tunnel_pars_flags;
286 u8 bd_num /* Number of BDs, used for packet */;
288 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */;
290 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
294 * TPA-continue ETH Rx FP CQE.
296 struct eth_fast_path_rx_tpa_cont_cqe {
297 u8 type /* CQE type */;
298 u8 tpa_agg_index /* TPA aggregation index */;
299 __le16 len_list[ETH_TPA_CQE_CONT_LEN_LIST_SIZE]
300 /* List of the segment sizes */;
302 u8 reserved1 /* FW reserved. */;
303 __le16 reserved2[ETH_TPA_CQE_CONT_LEN_LIST_SIZE] /* FW reserved. */;
305 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
309 * TPA-end ETH Rx FP CQE .
311 struct eth_fast_path_rx_tpa_end_cqe {
312 u8 type /* CQE type */;
313 u8 tpa_agg_index /* TPA aggregation index */;
314 __le16 total_packet_len /* Total aggregated packet length */;
315 u8 num_of_bds /* Total number of BDs comprising the packet */;
316 u8 end_reason /* Aggregation end reason. Use enum eth_tpa_end_reason */
318 __le16 num_of_coalesced_segs /* Number of coalesced TCP segments */;
319 __le32 ts_delta /* TCP timestamp delta */;
320 __le16 len_list[ETH_TPA_CQE_END_LEN_LIST_SIZE]
321 /* List of the segment sizes */;
322 __le16 reserved3[ETH_TPA_CQE_END_LEN_LIST_SIZE] /* FW reserved. */;
324 u8 reserved2 /* FW reserved. */;
325 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
329 * TPA-start ETH Rx FP CQE.
331 struct eth_fast_path_rx_tpa_start_cqe {
332 u8 type /* CQE type */;
334 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_MASK 0x7
335 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_SHIFT 0
336 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_MASK 0xF
337 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_SHIFT 3
338 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_MASK 0x1
339 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_SHIFT 7
340 __le16 seg_len /* Segment length (packetLen from the parser) */;
341 struct parsing_and_err_flags pars_flags
342 /* Parsing and error flags from the parser */;
343 __le16 vlan_tag /* 802.1q VLAN tag */;
344 __le32 rss_hash /* RSS hash result */;
345 __le16 len_on_first_bd /* Number of bytes placed on first BD */;
346 u8 placement_offset /* Offset of placement from BD start */;
347 /* Tunnel Parsing Flags */
348 struct eth_tunnel_parsing_flags tunnel_pars_flags;
349 u8 tpa_agg_index /* TPA aggregation index */;
350 u8 header_len /* Packet L2+L3+L4 header length */;
351 __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE]
352 /* Additional BDs length list. */;
353 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */;
355 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
359 * The L4 pseudo checksum mode for Ethernet
361 enum eth_l4_pseudo_checksum_mode {
362 ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH
363 /* Pseudo Header checksum on packet is calculated
364 * with the correct packet length field.
367 ETH_L4_PSEUDO_CSUM_ZERO_LENGTH
368 /* Pseudo Hdr checksum on packet is calc with zero len field. */
370 MAX_ETH_L4_PSEUDO_CHECKSUM_MODE
374 struct regpair addr /* single continues buffer */;
378 * regular ETH Rx SP CQE
380 struct eth_slow_path_rx_cqe {
381 u8 type /* CQE type */;
387 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
391 * union for all ETH Rx CQE types
394 struct eth_fast_path_rx_reg_cqe fast_path_regular /* Regular FP CQE */;
395 struct eth_fast_path_rx_tpa_start_cqe fast_path_tpa_start
397 struct eth_fast_path_rx_tpa_cont_cqe fast_path_tpa_cont
398 /* TPA-continue CQE */;
399 struct eth_fast_path_rx_tpa_end_cqe fast_path_tpa_end /* TPA-end CQE */
401 struct eth_slow_path_rx_cqe slow_path /* SP CQE */;
407 enum eth_rx_cqe_type {
408 ETH_RX_CQE_TYPE_UNUSED,
409 ETH_RX_CQE_TYPE_REGULAR /* Regular FP ETH Rx CQE */,
410 ETH_RX_CQE_TYPE_SLOW_PATH /* Slow path ETH Rx CQE */,
411 ETH_RX_CQE_TYPE_TPA_START /* TPA start ETH Rx CQE */,
412 ETH_RX_CQE_TYPE_TPA_CONT /* TPA Continue ETH Rx CQE */,
413 ETH_RX_CQE_TYPE_TPA_END /* TPA end ETH Rx CQE */,
418 * Wrapper for PD RX CQE - used in order to cover full cache line when writing
421 struct eth_rx_pmd_cqe {
422 union eth_rx_cqe cqe /* CQE data itself */;
423 u8 reserved[ETH_RX_CQE_GAP];
429 enum eth_rx_tunn_type {
430 ETH_RX_NO_TUNN /* No Tunnel. */,
431 ETH_RX_TUNN_GENEVE /* GENEVE Tunnel. */,
432 ETH_RX_TUNN_GRE /* GRE Tunnel. */,
433 ETH_RX_TUNN_VXLAN /* VXLAN Tunnel. */,
438 * Aggregation end reason.
440 enum eth_tpa_end_reason {
442 ETH_AGG_END_SP_UPDATE /* SP configuration update */,
444 /* Maximum aggregation length or maximum buffer number used. */,
446 /* TCP PSH flag or TCP payload length below continue threshold. */,
447 ETH_AGG_END_TIMEOUT /* Timeout expiration. */,
448 ETH_AGG_END_NOT_CONSISTENT,
449 ETH_AGG_END_OUT_OF_ORDER,
450 ETH_AGG_END_NON_TPA_SEG,
451 MAX_ETH_TPA_END_REASON
457 * The first tx bd of a given packet
459 struct eth_tx_1st_bd {
460 struct regpair addr /* Single continuous buffer */;
461 __le16 nbytes /* Number of bytes in this BD. */;
462 struct eth_tx_data_1st_bd data /* Parsing information data. */;
466 * The second tx bd of a given packet
468 struct eth_tx_2nd_bd {
469 struct regpair addr /* Single continuous buffer */;
470 __le16 nbytes /* Number of bytes in this BD. */;
471 struct eth_tx_data_2nd_bd data /* Parsing information data. */;
475 * The parsing information data for the third tx bd of a given packet.
477 struct eth_tx_data_3rd_bd {
478 __le16 lso_mss /* For LSO packet - the MSS in bytes. */;
480 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK 0xF
481 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT 0
482 #define ETH_TX_DATA_3RD_BD_HDR_NBD_MASK 0xF
483 #define ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT 4
484 #define ETH_TX_DATA_3RD_BD_START_BD_MASK 0x1
485 #define ETH_TX_DATA_3RD_BD_START_BD_SHIFT 8
486 #define ETH_TX_DATA_3RD_BD_RESERVED0_MASK 0x7F
487 #define ETH_TX_DATA_3RD_BD_RESERVED0_SHIFT 9
488 u8 tunn_l4_hdr_start_offset_w;
493 * The third tx bd of a given packet
495 struct eth_tx_3rd_bd {
496 struct regpair addr /* Single continuous buffer */;
497 __le16 nbytes /* Number of bytes in this BD. */;
498 struct eth_tx_data_3rd_bd data /* Parsing information data. */;
502 * Complementary information for the regular tx bd of a given packet.
504 struct eth_tx_data_bd {
507 #define ETH_TX_DATA_BD_RESERVED1_MASK 0xFF
508 #define ETH_TX_DATA_BD_RESERVED1_SHIFT 0
509 #define ETH_TX_DATA_BD_START_BD_MASK 0x1
510 #define ETH_TX_DATA_BD_START_BD_SHIFT 8
511 #define ETH_TX_DATA_BD_RESERVED2_MASK 0x7F
512 #define ETH_TX_DATA_BD_RESERVED2_SHIFT 9
517 * The common regular TX BD ring element
520 struct regpair addr /* Single continuous buffer */;
521 __le16 nbytes /* Number of bytes in this BD. */;
522 struct eth_tx_data_bd data /* Complementary information. */;
525 union eth_tx_bd_types {
526 struct eth_tx_1st_bd first_bd /* The first tx bd of a given packet */;
527 struct eth_tx_2nd_bd second_bd /* The second tx bd of a given packet */
529 struct eth_tx_3rd_bd third_bd /* The third tx bd of a given packet */;
530 struct eth_tx_bd reg_bd /* The common non-special bd */;
536 enum eth_tx_tunn_type {
537 ETH_TX_TUNN_GENEVE /* GENEVE Tunnel. */,
538 ETH_TX_TUNN_TTAG /* T-Tag Tunnel. */,
539 ETH_TX_TUNN_GRE /* GRE Tunnel. */,
540 ETH_TX_TUNN_VXLAN /* VXLAN Tunnel. */,
548 struct xstorm_eth_queue_zone {
549 struct coalescing_timeset int_coalescing_timeset
550 /* Tx interrupt coalescing TimeSet */;
559 #define ETH_DB_DATA_DEST_MASK 0x3
560 #define ETH_DB_DATA_DEST_SHIFT 0
561 #define ETH_DB_DATA_AGG_CMD_MASK 0x3
562 #define ETH_DB_DATA_AGG_CMD_SHIFT 2
563 #define ETH_DB_DATA_BYPASS_EN_MASK 0x1
564 #define ETH_DB_DATA_BYPASS_EN_SHIFT 4
565 #define ETH_DB_DATA_RESERVED_MASK 0x1
566 #define ETH_DB_DATA_RESERVED_SHIFT 5
567 #define ETH_DB_DATA_AGG_VAL_SEL_MASK 0x3
568 #define ETH_DB_DATA_AGG_VAL_SEL_SHIFT 6
573 #endif /* __ETH_COMMON__ */