net/qede: use new stripped VLAN mbuf flags
[dpdk.git] / drivers / net / qede / qede_ethdev.h
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9
10 #ifndef _QEDE_ETHDEV_H_
11 #define _QEDE_ETHDEV_H_
12
13 #include <sys/queue.h>
14
15 #include <rte_ether.h>
16 #include <rte_ethdev.h>
17 #include <rte_ethdev_pci.h>
18 #include <rte_dev.h>
19 #include <rte_ip.h>
20
21 /* ecore includes */
22 #include "base/bcm_osal.h"
23 #include "base/ecore.h"
24 #include "base/ecore_dev_api.h"
25 #include "base/ecore_l2_api.h"
26 #include "base/ecore_vf_api.h"
27 #include "base/ecore_hsi_common.h"
28 #include "base/ecore_int_api.h"
29 #include "base/ecore_chain.h"
30 #include "base/ecore_status.h"
31 #include "base/ecore_hsi_eth.h"
32 #include "base/ecore_dev_api.h"
33 #include "base/ecore_iov_api.h"
34 #include "base/ecore_cxt.h"
35 #include "base/nvm_cfg.h"
36 #include "base/ecore_iov_api.h"
37 #include "base/ecore_sp_commands.h"
38 #include "base/ecore_l2.h"
39 #include "base/ecore_dev_api.h"
40
41 #include "qede_logs.h"
42 #include "qede_if.h"
43 #include "qede_eth_if.h"
44
45 #include "qede_rxtx.h"
46
47 #define qede_stringify1(x...)           #x
48 #define qede_stringify(x...)            qede_stringify1(x)
49
50 /* Driver versions */
51 #define QEDE_PMD_VER_PREFIX             "QEDE PMD"
52 #define QEDE_PMD_VERSION_MAJOR          2
53 #define QEDE_PMD_VERSION_MINOR          4
54 #define QEDE_PMD_VERSION_REVISION       0
55 #define QEDE_PMD_VERSION_PATCH          1
56
57 #define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "."     \
58                          qede_stringify(QEDE_PMD_VERSION_MINOR) "."     \
59                          qede_stringify(QEDE_PMD_VERSION_REVISION) "."  \
60                          qede_stringify(QEDE_PMD_VERSION_PATCH)
61
62 #define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE
63 #define QEDE_PMD_VER_PREFIX "QEDE PMD"
64
65
66 #define QEDE_RSS_INDIR_INITED     (1 << 0)
67 #define QEDE_RSS_KEY_INITED       (1 << 1)
68 #define QEDE_RSS_CAPS_INITED      (1 << 2)
69
70 #define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
71 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
72                                         (edev)->dev_info.num_tc)
73
74 #define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
75 #define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
76 #define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
77                                         (qdev)->num_tc)
78
79 #define QEDE_FASTPATH_TX        (1 << 0)
80 #define QEDE_FASTPATH_RX        (1 << 1)
81
82 #define QEDE_DUPLEX_FULL        1
83 #define QEDE_DUPLEX_HALF        2
84 #define QEDE_DUPLEX_UNKNOWN     0xff
85
86 #define QEDE_SUPPORTED_AUTONEG (1 << 6)
87 #define QEDE_SUPPORTED_PAUSE   (1 << 13)
88
89 #define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
90
91 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
92
93 #define QEDE_INIT(eth_dev) {                                    \
94         struct qede_dev *qdev = eth_dev->data->dev_private;     \
95         struct ecore_dev *edev = &qdev->edev;                   \
96 }
97
98 /************* QLogic 10G/25G/40G/50G/100G vendor/devices ids *************/
99 #define PCI_VENDOR_ID_QLOGIC                   0x1077
100
101 #define CHIP_NUM_57980E                        0x1634
102 #define CHIP_NUM_57980S                        0x1629
103 #define CHIP_NUM_VF                            0x1630
104 #define CHIP_NUM_57980S_40                     0x1634
105 #define CHIP_NUM_57980S_25                     0x1656
106 #define CHIP_NUM_57980S_IOV                    0x1664
107 #define CHIP_NUM_57980S_100                    0x1644
108 #define CHIP_NUM_57980S_50                     0x1654
109 #define CHIP_NUM_AH_50G                        0x8070
110 #define CHIP_NUM_AH_10G                        0x8071
111 #define CHIP_NUM_AH_40G                        0x8072
112 #define CHIP_NUM_AH_25G                        0x8073
113 #define CHIP_NUM_AH_IOV                        0x8090
114
115 #define PCI_DEVICE_ID_QLOGIC_NX2_57980E        CHIP_NUM_57980E
116 #define PCI_DEVICE_ID_QLOGIC_NX2_57980S        CHIP_NUM_57980S
117 #define PCI_DEVICE_ID_QLOGIC_NX2_VF            CHIP_NUM_VF
118 #define PCI_DEVICE_ID_QLOGIC_57980S_40         CHIP_NUM_57980S_40
119 #define PCI_DEVICE_ID_QLOGIC_57980S_25         CHIP_NUM_57980S_25
120 #define PCI_DEVICE_ID_QLOGIC_57980S_IOV        CHIP_NUM_57980S_IOV
121 #define PCI_DEVICE_ID_QLOGIC_57980S_100        CHIP_NUM_57980S_100
122 #define PCI_DEVICE_ID_QLOGIC_57980S_50         CHIP_NUM_57980S_50
123 #define PCI_DEVICE_ID_QLOGIC_AH_50G            CHIP_NUM_AH_50G
124 #define PCI_DEVICE_ID_QLOGIC_AH_10G            CHIP_NUM_AH_10G
125 #define PCI_DEVICE_ID_QLOGIC_AH_40G            CHIP_NUM_AH_40G
126 #define PCI_DEVICE_ID_QLOGIC_AH_25G            CHIP_NUM_AH_25G
127 #define PCI_DEVICE_ID_QLOGIC_AH_IOV            CHIP_NUM_AH_IOV
128
129
130 #define QEDE_VXLAN_DEF_PORT             8472
131
132 extern char fw_file[];
133
134 /* Number of PF connections - 32 RX + 32 TX */
135 #define QEDE_PF_NUM_CONNS               (64)
136
137 /* Maximum number of flowdir filters */
138 #define QEDE_RFS_MAX_FLTR               (256)
139
140 /* Port/function states */
141 enum qede_dev_state {
142         QEDE_DEV_INIT, /* Init the chip and Slowpath */
143         QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
144         QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
145         QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
146 };
147
148 struct qede_vlan_entry {
149         SLIST_ENTRY(qede_vlan_entry) list;
150         uint16_t vid;
151 };
152
153 struct qede_mcast_entry {
154         struct ether_addr mac;
155         SLIST_ENTRY(qede_mcast_entry) list;
156 };
157
158 struct qede_ucast_entry {
159         struct ether_addr mac;
160         uint16_t vlan;
161         uint16_t vni;
162         SLIST_ENTRY(qede_ucast_entry) list;
163 };
164
165 struct qede_fdir_entry {
166         uint32_t soft_id; /* unused for now */
167         uint16_t pkt_len; /* actual packet length to match */
168         uint16_t rx_queue; /* queue to be steered to */
169         const struct rte_memzone *mz; /* mz used to hold L2 frame */
170         SLIST_ENTRY(qede_fdir_entry) list;
171 };
172
173 struct qede_fdir_info {
174         struct ecore_arfs_config_params arfs;
175         uint16_t filter_count;
176         SLIST_HEAD(fdir_list_head, qede_fdir_entry)fdir_list_head;
177 };
178
179
180 /*
181  *  Structure to store private data for each port.
182  */
183 struct qede_dev {
184         struct ecore_dev edev;
185         uint8_t protocol;
186         const struct qed_eth_ops *ops;
187         struct qed_dev_eth_info dev_info;
188         struct ecore_sb_info *sb_array;
189         struct qede_fastpath *fp_array;
190         uint8_t num_tc;
191         uint16_t mtu;
192         bool rss_enable;
193         struct rte_eth_rss_conf rss_conf;
194         uint16_t rss_ind_table[ECORE_RSS_IND_TABLE_SIZE];
195         uint64_t rss_hf;
196         uint8_t rss_key_len;
197         bool enable_lro;
198         uint16_t num_queues;
199         uint8_t fp_num_tx;
200         uint8_t fp_num_rx;
201         enum qede_dev_state state;
202         SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
203         uint16_t configured_vlans;
204         bool accept_any_vlan;
205         struct ether_addr primary_mac;
206         SLIST_HEAD(mc_list_head, qede_mcast_entry) mc_list_head;
207         uint16_t num_mc_addr;
208         SLIST_HEAD(uc_list_head, qede_ucast_entry) uc_list_head;
209         uint16_t num_uc_addr;
210         bool handle_hw_err;
211         uint16_t num_tunn_filters;
212         uint16_t vxlan_filter_type;
213         struct qede_fdir_info fdir_info;
214         bool vlan_strip_flg;
215         char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
216 };
217
218 /* Static functions */
219 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
220                                 uint16_t vlan_id, int on);
221
222 static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
223                                 struct rte_eth_rss_conf *rss_conf);
224
225 static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
226                                 struct rte_eth_rss_reta_entry64 *reta_conf,
227                                 uint16_t reta_size);
228
229 static void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf);
230
231 static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags);
232
233 static uint16_t qede_fdir_construct_pkt(struct rte_eth_dev *eth_dev,
234                                         struct rte_eth_fdir_filter *fdir,
235                                         void *buff,
236                                         struct ecore_arfs_config_params *param);
237
238 /* Non-static functions */
239 int qede_config_rss(struct rte_eth_dev *eth_dev);
240
241 int qed_fill_eth_dev_info(struct ecore_dev *edev,
242                                  struct qed_dev_eth_info *info);
243 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
244
245 int qede_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type type,
246                          enum rte_filter_op op, void *arg);
247
248 int qede_fdir_filter_conf(struct rte_eth_dev *eth_dev,
249                           enum rte_filter_op filter_op, void *arg);
250
251 int qede_ntuple_filter_conf(struct rte_eth_dev *eth_dev,
252                             enum rte_filter_op filter_op, void *arg);
253
254 int qede_check_fdir_support(struct rte_eth_dev *eth_dev);
255
256 void qede_fdir_dealloc_resc(struct rte_eth_dev *eth_dev);
257
258 #endif /* _QEDE_ETHDEV_H_ */