net/enic: fix freeing memory for descriptor ring
[dpdk.git] / drivers / net / qede / qede_ethdev.h
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9
10 #ifndef _QEDE_ETHDEV_H_
11 #define _QEDE_ETHDEV_H_
12
13 #include <rte_ether.h>
14 #include <rte_ethdev.h>
15 #include <rte_dev.h>
16
17 /* ecore includes */
18 #include "base/bcm_osal.h"
19 #include "base/ecore.h"
20 #include "base/ecore_dev_api.h"
21 #include "base/ecore_l2_api.h"
22 #include "base/ecore_vf_api.h"
23 #include "base/ecore_hsi_common.h"
24 #include "base/ecore_int_api.h"
25 #include "base/ecore_chain.h"
26 #include "base/ecore_status.h"
27 #include "base/ecore_hsi_eth.h"
28 #include "base/ecore_dev_api.h"
29 #include "base/ecore_iov_api.h"
30
31 #include "qede_logs.h"
32 #include "qede_if.h"
33 #include "qede_eth_if.h"
34
35 #include "qede_rxtx.h"
36
37 #define qede_stringify1(x...)           #x
38 #define qede_stringify(x...)            qede_stringify1(x)
39
40 /* Driver versions */
41 #define QEDE_PMD_VER_PREFIX             "QEDE PMD"
42 #define QEDE_PMD_VERSION_MAJOR          1
43 #define QEDE_PMD_VERSION_MINOR          1
44 #define QEDE_PMD_VERSION_REVISION       0
45 #define QEDE_PMD_VERSION_PATCH          1
46
47 #define QEDE_MAJOR_VERSION              8
48 #define QEDE_MINOR_VERSION              7
49 #define QEDE_REVISION_VERSION           9
50 #define QEDE_ENGINEERING_VERSION        0
51
52 #define QEDE_DRV_MODULE_VERSION qede_stringify(QEDE_MAJOR_VERSION) "."  \
53                 qede_stringify(QEDE_MINOR_VERSION) "."                  \
54                 qede_stringify(QEDE_REVISION_VERSION) "."               \
55                 qede_stringify(QEDE_ENGINEERING_VERSION)
56
57 #define QEDE_RSS_INDIR_INITED     (1 << 0)
58 #define QEDE_RSS_KEY_INITED       (1 << 1)
59 #define QEDE_RSS_CAPS_INITED      (1 << 2)
60
61 #define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
62 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
63                                         (edev)->dev_info.num_tc)
64
65 #define QEDE_RSS_CNT(edev)      ((edev)->num_rss)
66 #define QEDE_TSS_CNT(edev)      ((edev)->num_rss * (edev)->num_tc)
67
68 #define QEDE_DUPLEX_FULL        1
69 #define QEDE_DUPLEX_HALF        2
70 #define QEDE_DUPLEX_UNKNOWN     0xff
71
72 #define QEDE_SUPPORTED_AUTONEG (1 << 6)
73 #define QEDE_SUPPORTED_PAUSE   (1 << 13)
74
75 #define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
76
77 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
78
79 #define QEDE_INIT(eth_dev) {                                    \
80         struct qede_dev *qdev = eth_dev->data->dev_private;     \
81         struct ecore_dev *edev = &qdev->edev;                   \
82 }
83
84 /************* QLogic 25G/40G/100G vendor/devices ids *************/
85 #define PCI_VENDOR_ID_QLOGIC            0x1077
86
87 #define CHIP_NUM_57980E                 0x1634
88 #define CHIP_NUM_57980S                 0x1629
89 #define CHIP_NUM_VF                     0x1630
90 #define CHIP_NUM_57980S_40              0x1634
91 #define CHIP_NUM_57980S_25              0x1656
92 #define CHIP_NUM_57980S_IOV             0x1664
93 #define CHIP_NUM_57980S_100             0x1644
94
95 #define PCI_DEVICE_ID_NX2_57980E        CHIP_NUM_57980E
96 #define PCI_DEVICE_ID_NX2_57980S        CHIP_NUM_57980S
97 #define PCI_DEVICE_ID_NX2_VF            CHIP_NUM_VF
98 #define PCI_DEVICE_ID_57980S_40         CHIP_NUM_57980S_40
99 #define PCI_DEVICE_ID_57980S_25         CHIP_NUM_57980S_25
100 #define PCI_DEVICE_ID_57980S_IOV        CHIP_NUM_57980S_IOV
101 #define PCI_DEVICE_ID_57980S_100        CHIP_NUM_57980S_100
102
103 extern char fw_file[];
104
105 /* Port/function states */
106 enum dev_state {
107         QEDE_START,
108         QEDE_STOP,
109         QEDE_CLOSE
110 };
111
112 struct qed_int_param {
113         uint32_t int_mode;
114         uint8_t num_vectors;
115         uint8_t min_msix_cnt;
116 };
117
118 struct qed_int_params {
119         struct qed_int_param in;
120         struct qed_int_param out;
121         bool fp_initialized;
122 };
123
124 /*
125  *  Structure to store private data for each port.
126  */
127 struct qede_dev {
128         struct ecore_dev edev;
129         uint8_t protocol;
130         const struct qed_eth_ops *ops;
131         struct qed_dev_eth_info dev_info;
132         struct ecore_sb_info *sb_array;
133         struct qede_fastpath *fp_array;
134         uint16_t num_rss;
135         uint8_t num_tc;
136         uint16_t mtu;
137         bool rss_enabled;
138         struct qed_update_vport_rss_params rss_params;
139         uint32_t flags;
140         bool gro_disable;
141         struct qede_rx_queue **rx_queues;
142         struct qede_tx_queue **tx_queues;
143         enum dev_state state;
144
145         /* Vlans */
146         osal_list_t vlan_list;
147         uint16_t configured_vlans;
148         uint16_t non_configured_vlans;
149         bool accept_any_vlan;
150         uint16_t vxlan_dst_port;
151
152         struct ether_addr primary_mac;
153         bool handle_hw_err;
154         char drv_ver[QED_DRV_VER_STR_SIZE];
155 };
156
157 int qed_fill_eth_dev_info(struct ecore_dev *edev,
158                                  struct qed_dev_eth_info *info);
159 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
160 void qede_config_rx_mode(struct rte_eth_dev *eth_dev);
161
162 #endif /* _QEDE_ETHDEV_H_ */