2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
10 #ifndef _QEDE_ETHDEV_H_
11 #define _QEDE_ETHDEV_H_
13 #include <sys/queue.h>
15 #include <rte_ether.h>
16 #include <rte_ethdev.h>
17 #include <rte_ethdev_pci.h>
22 #include "base/bcm_osal.h"
23 #include "base/ecore.h"
24 #include "base/ecore_dev_api.h"
25 #include "base/ecore_l2_api.h"
26 #include "base/ecore_vf_api.h"
27 #include "base/ecore_hsi_common.h"
28 #include "base/ecore_int_api.h"
29 #include "base/ecore_chain.h"
30 #include "base/ecore_status.h"
31 #include "base/ecore_hsi_eth.h"
32 #include "base/ecore_dev_api.h"
33 #include "base/ecore_iov_api.h"
34 #include "base/ecore_cxt.h"
35 #include "base/nvm_cfg.h"
36 #include "base/ecore_iov_api.h"
37 #include "base/ecore_sp_commands.h"
38 #include "base/ecore_l2.h"
39 #include "base/ecore_dev_api.h"
40 #include "base/ecore_l2.h"
42 #include "qede_logs.h"
44 #include "qede_eth_if.h"
46 #include "qede_rxtx.h"
48 #define qede_stringify1(x...) #x
49 #define qede_stringify(x...) qede_stringify1(x)
52 #define QEDE_PMD_VER_PREFIX "QEDE PMD"
53 #define QEDE_PMD_VERSION_MAJOR 2
54 #define QEDE_PMD_VERSION_MINOR 4
55 #define QEDE_PMD_VERSION_REVISION 0
56 #define QEDE_PMD_VERSION_PATCH 1
58 #define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "." \
59 qede_stringify(QEDE_PMD_VERSION_MINOR) "." \
60 qede_stringify(QEDE_PMD_VERSION_REVISION) "." \
61 qede_stringify(QEDE_PMD_VERSION_PATCH)
63 #define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE
64 #define QEDE_PMD_VER_PREFIX "QEDE PMD"
67 #define QEDE_RSS_INDIR_INITED (1 << 0)
68 #define QEDE_RSS_KEY_INITED (1 << 1)
69 #define QEDE_RSS_CAPS_INITED (1 << 2)
71 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
72 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues * \
73 (edev)->dev_info.num_tc)
75 #define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
76 #define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
77 #define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
80 #define QEDE_FASTPATH_TX (1 << 0)
81 #define QEDE_FASTPATH_RX (1 << 1)
83 #define QEDE_DUPLEX_FULL 1
84 #define QEDE_DUPLEX_HALF 2
85 #define QEDE_DUPLEX_UNKNOWN 0xff
87 #define QEDE_SUPPORTED_AUTONEG (1 << 6)
88 #define QEDE_SUPPORTED_PAUSE (1 << 13)
90 #define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
92 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
94 #define QEDE_INIT(eth_dev) { \
95 struct qede_dev *qdev = eth_dev->data->dev_private; \
96 struct ecore_dev *edev = &qdev->edev; \
99 /************* QLogic 10G/25G/40G/50G/100G vendor/devices ids *************/
100 #define PCI_VENDOR_ID_QLOGIC 0x1077
102 #define CHIP_NUM_57980E 0x1634
103 #define CHIP_NUM_57980S 0x1629
104 #define CHIP_NUM_VF 0x1630
105 #define CHIP_NUM_57980S_40 0x1634
106 #define CHIP_NUM_57980S_25 0x1656
107 #define CHIP_NUM_57980S_IOV 0x1664
108 #define CHIP_NUM_57980S_100 0x1644
109 #define CHIP_NUM_57980S_50 0x1654
110 #define CHIP_NUM_AH_50G 0x8070
111 #define CHIP_NUM_AH_10G 0x8071
112 #define CHIP_NUM_AH_40G 0x8072
113 #define CHIP_NUM_AH_25G 0x8073
114 #define CHIP_NUM_AH_IOV 0x8090
116 #define PCI_DEVICE_ID_QLOGIC_NX2_57980E CHIP_NUM_57980E
117 #define PCI_DEVICE_ID_QLOGIC_NX2_57980S CHIP_NUM_57980S
118 #define PCI_DEVICE_ID_QLOGIC_NX2_VF CHIP_NUM_VF
119 #define PCI_DEVICE_ID_QLOGIC_57980S_40 CHIP_NUM_57980S_40
120 #define PCI_DEVICE_ID_QLOGIC_57980S_25 CHIP_NUM_57980S_25
121 #define PCI_DEVICE_ID_QLOGIC_57980S_IOV CHIP_NUM_57980S_IOV
122 #define PCI_DEVICE_ID_QLOGIC_57980S_100 CHIP_NUM_57980S_100
123 #define PCI_DEVICE_ID_QLOGIC_57980S_50 CHIP_NUM_57980S_50
124 #define PCI_DEVICE_ID_QLOGIC_AH_50G CHIP_NUM_AH_50G
125 #define PCI_DEVICE_ID_QLOGIC_AH_10G CHIP_NUM_AH_10G
126 #define PCI_DEVICE_ID_QLOGIC_AH_40G CHIP_NUM_AH_40G
127 #define PCI_DEVICE_ID_QLOGIC_AH_25G CHIP_NUM_AH_25G
128 #define PCI_DEVICE_ID_QLOGIC_AH_IOV CHIP_NUM_AH_IOV
131 #define QEDE_VXLAN_DEF_PORT 8472
133 extern char fw_file[];
135 /* Number of PF connections - 32 RX + 32 TX */
136 #define QEDE_PF_NUM_CONNS (64)
138 /* Maximum number of flowdir filters */
139 #define QEDE_RFS_MAX_FLTR (256)
141 /* Port/function states */
142 enum qede_dev_state {
143 QEDE_DEV_INIT, /* Init the chip and Slowpath */
144 QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
145 QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
146 QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
149 struct qede_vlan_entry {
150 SLIST_ENTRY(qede_vlan_entry) list;
154 struct qede_mcast_entry {
155 struct ether_addr mac;
156 SLIST_ENTRY(qede_mcast_entry) list;
159 struct qede_ucast_entry {
160 struct ether_addr mac;
163 SLIST_ENTRY(qede_ucast_entry) list;
166 struct qede_fdir_entry {
167 uint32_t soft_id; /* unused for now */
168 uint16_t pkt_len; /* actual packet length to match */
169 uint16_t rx_queue; /* queue to be steered to */
170 const struct rte_memzone *mz; /* mz used to hold L2 frame */
171 SLIST_ENTRY(qede_fdir_entry) list;
174 struct qede_fdir_info {
175 struct ecore_arfs_config_params arfs;
176 uint16_t filter_count;
177 SLIST_HEAD(fdir_list_head, qede_fdir_entry)fdir_list_head;
182 * Structure to store private data for each port.
185 struct ecore_dev edev;
187 const struct qed_eth_ops *ops;
188 struct qed_dev_eth_info dev_info;
189 struct ecore_sb_info *sb_array;
190 struct qede_fastpath *fp_array;
194 struct rte_eth_rss_conf rss_conf;
195 uint16_t rss_ind_table[ECORE_RSS_IND_TABLE_SIZE];
202 enum qede_dev_state state;
203 SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
204 uint16_t configured_vlans;
205 bool accept_any_vlan;
206 struct ether_addr primary_mac;
207 SLIST_HEAD(mc_list_head, qede_mcast_entry) mc_list_head;
208 uint16_t num_mc_addr;
209 SLIST_HEAD(uc_list_head, qede_ucast_entry) uc_list_head;
210 uint16_t num_uc_addr;
212 uint16_t num_tunn_filters;
213 uint16_t vxlan_filter_type;
214 struct qede_fdir_info fdir_info;
216 char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
219 /* Non-static functions */
220 int qede_config_rss(struct rte_eth_dev *eth_dev);
222 int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
223 struct rte_eth_rss_conf *rss_conf);
225 int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
226 struct rte_eth_rss_reta_entry64 *reta_conf,
229 int qed_fill_eth_dev_info(struct ecore_dev *edev,
230 struct qed_dev_eth_info *info);
231 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
233 int qede_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type type,
234 enum rte_filter_op op, void *arg);
236 int qede_fdir_filter_conf(struct rte_eth_dev *eth_dev,
237 enum rte_filter_op filter_op, void *arg);
239 int qede_ntuple_filter_conf(struct rte_eth_dev *eth_dev,
240 enum rte_filter_op filter_op, void *arg);
242 int qede_check_fdir_support(struct rte_eth_dev *eth_dev);
244 uint16_t qede_fdir_construct_pkt(struct rte_eth_dev *eth_dev,
245 struct rte_eth_fdir_filter *fdir,
247 struct ecore_arfs_config_params *params);
249 void qede_fdir_dealloc_resc(struct rte_eth_dev *eth_dev);
251 #endif /* _QEDE_ETHDEV_H_ */