2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
16 #define QEDE_ALARM_TIMEOUT_US 100000
18 /* Global variable to hold absolute path of fw file */
19 char fw_file[PATH_MAX];
21 const char *QEDE_DEFAULT_FIRMWARE =
22 "/lib/firmware/qed/qed_init_values-8.20.0.0.bin";
25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
29 for (i = 0; i < edev->num_hwfns; i++) {
30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
31 p_hwfn->pf_params = *params;
35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
37 edev->regview = pci_dev->mem_resource[0].addr;
38 edev->doorbells = pci_dev->mem_resource[2].addr;
42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
43 uint32_t dp_module, uint8_t dp_level, bool is_vf)
45 struct ecore_hw_prepare_params hw_prepare_params;
48 ecore_init_struct(edev);
49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
50 /* Protocol type is always fixed to PROTOCOL_ETH */
55 ecore_init_dp(edev, dp_module, dp_level, NULL);
56 qed_init_pci(edev, pci_dev);
58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
59 hw_prepare_params.personality = ECORE_PCI_ETH;
60 hw_prepare_params.drv_resc_alloc = false;
61 hw_prepare_params.chk_reg_fifo = false;
62 hw_prepare_params.initiate_pf_flr = true;
63 hw_prepare_params.allow_mdump = false;
64 hw_prepare_params.epoch = (u32)time(NULL);
65 rc = ecore_hw_prepare(edev, &hw_prepare_params);
67 DP_ERR(edev, "hw prepare failed\n");
74 static int qed_nic_setup(struct ecore_dev *edev)
78 rc = ecore_resc_alloc(edev);
82 DP_INFO(edev, "Allocated qed resources\n");
83 ecore_resc_setup(edev);
88 #ifdef CONFIG_ECORE_ZIPPED_FW
89 static int qed_alloc_stream_mem(struct ecore_dev *edev)
93 for_each_hwfn(edev, i) {
94 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
96 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
97 sizeof(*p_hwfn->stream));
105 static void qed_free_stream_mem(struct ecore_dev *edev)
109 for_each_hwfn(edev, i) {
110 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
115 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
120 #ifdef CONFIG_ECORE_BINARY_FW
121 static int qed_load_firmware_data(struct ecore_dev *edev)
125 const char *fw = RTE_LIBRTE_QEDE_FW;
127 if (strcmp(fw, "") == 0)
128 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
132 fd = open(fw_file, O_RDONLY);
134 DP_ERR(edev, "Can't open firmware file\n");
138 if (fstat(fd, &st) < 0) {
139 DP_ERR(edev, "Can't stat firmware file\n");
144 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
145 RTE_CACHE_LINE_SIZE);
146 if (!edev->firmware) {
147 DP_ERR(edev, "Can't allocate memory for firmware\n");
152 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
153 DP_ERR(edev, "Can't read firmware data\n");
158 edev->fw_len = st.st_size;
159 if (edev->fw_len < 104) {
160 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
171 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
173 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
175 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
177 if (is_mac_exist && is_mac_forced)
178 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
180 /* Always update link configuration according to bulletin */
181 qed_link_update(hwfn);
184 static void qede_vf_task(void *arg)
186 struct ecore_hwfn *p_hwfn = arg;
189 /* Read the bulletin board, and re-schedule the task */
190 ecore_vf_read_bulletin(p_hwfn, &change);
192 qed_handle_bulletin_change(p_hwfn);
194 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
197 static void qed_start_iov_task(struct ecore_dev *edev)
199 struct ecore_hwfn *p_hwfn;
202 for_each_hwfn(edev, i) {
203 p_hwfn = &edev->hwfns[i];
205 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
210 static void qed_stop_iov_task(struct ecore_dev *edev)
212 struct ecore_hwfn *p_hwfn;
215 for_each_hwfn(edev, i) {
216 p_hwfn = &edev->hwfns[i];
218 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
221 static int qed_slowpath_start(struct ecore_dev *edev,
222 struct qed_slowpath_params *params)
224 struct ecore_drv_load_params drv_load_params;
225 struct ecore_hw_init_params hw_init_params;
226 struct ecore_mcp_drv_version drv_version;
227 const uint8_t *data = NULL;
228 struct ecore_hwfn *hwfn;
229 struct ecore_ptt *p_ptt;
233 #ifdef CONFIG_ECORE_BINARY_FW
234 rc = qed_load_firmware_data(edev);
236 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
240 hwfn = ECORE_LEADING_HWFN(edev);
241 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
242 p_ptt = ecore_ptt_acquire(hwfn);
244 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
246 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
253 rc = qed_nic_setup(edev);
257 /* set int_coalescing_mode */
258 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
260 #ifdef CONFIG_ECORE_ZIPPED_FW
262 /* Allocate stream for unzipping */
263 rc = qed_alloc_stream_mem(edev);
265 DP_ERR(edev, "Failed to allocate stream memory\n");
271 qed_start_iov_task(edev);
273 #ifdef CONFIG_ECORE_BINARY_FW
275 data = (const uint8_t *)edev->firmware + sizeof(u32);
278 /* Start the slowpath */
279 memset(&hw_init_params, 0, sizeof(hw_init_params));
280 hw_init_params.b_hw_start = true;
281 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
282 hw_init_params.allow_npar_tx_switch = true;
283 hw_init_params.bin_fw_data = data;
285 memset(&drv_load_params, 0, sizeof(drv_load_params));
286 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
287 drv_load_params.avoid_eng_reset = false;
288 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
289 hw_init_params.p_drv_load_params = &drv_load_params;
291 rc = ecore_hw_init(edev, &hw_init_params);
293 DP_ERR(edev, "ecore_hw_init failed\n");
297 DP_INFO(edev, "HW inited and function started\n");
300 hwfn = ECORE_LEADING_HWFN(edev);
301 drv_version.version = (params->drv_major << 24) |
302 (params->drv_minor << 16) |
303 (params->drv_rev << 8) | (params->drv_eng);
305 strncpy((char *)drv_version.name, (const char *)params->name,
306 MCP_DRV_VER_STR_SIZE - 4);
307 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
310 DP_ERR(edev, "Failed sending drv version command\n");
315 ecore_reset_vport_stats(edev);
322 qed_stop_iov_task(edev);
323 #ifdef CONFIG_ECORE_ZIPPED_FW
324 qed_free_stream_mem(edev);
327 ecore_resc_free(edev);
329 #ifdef CONFIG_ECORE_BINARY_FW
332 rte_free(edev->firmware);
333 edev->firmware = NULL;
336 qed_stop_iov_task(edev);
342 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
344 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
345 struct ecore_ptt *ptt = NULL;
346 struct ecore_tunnel_info *tun = &edev->tunnel;
348 memset(dev_info, 0, sizeof(struct qed_dev_info));
350 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
351 tun->vxlan.b_mode_enabled)
352 dev_info->vxlan_enable = true;
354 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
355 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
356 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
357 dev_info->gre_enable = true;
359 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
360 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
361 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
362 dev_info->geneve_enable = true;
364 dev_info->num_hwfns = edev->num_hwfns;
365 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
366 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
367 dev_info->dev_type = edev->type;
369 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
372 dev_info->fw_major = FW_MAJOR_VERSION;
373 dev_info->fw_minor = FW_MINOR_VERSION;
374 dev_info->fw_rev = FW_REVISION_VERSION;
375 dev_info->fw_eng = FW_ENGINEERING_VERSION;
378 dev_info->mf_mode = edev->mf_mode;
379 dev_info->tx_switching = false;
381 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
383 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
385 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
386 &dev_info->mfw_rev, NULL);
388 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
389 &dev_info->flash_size);
391 /* Workaround to allow PHY-read commands for
394 if (ECORE_IS_BB_B0(edev))
395 dev_info->flash_size = 0xffffffff;
397 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
400 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
401 &dev_info->mfw_rev, NULL);
408 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
413 memset(info, 0, sizeof(*info));
415 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
418 int max_vf_vlan_filters = 0;
420 info->num_queues = 0;
421 for_each_hwfn(edev, i)
423 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
425 if (edev->p_iov_info)
426 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
427 ECORE_ETH_VF_NUM_VLAN_FILTERS;
428 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
431 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
434 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
436 if (edev->num_hwfns > 1) {
437 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
438 info->num_queues += queues;
441 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
442 (u8 *)&info->num_vlan_filters);
444 ecore_vf_get_port_mac(&edev->hwfns[0],
445 (uint8_t *)&info->port_mac);
447 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
450 qed_fill_dev_info(edev, &info->common);
453 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
458 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
462 rte_memcpy(edev->name, name, NAME_SIZE);
463 for_each_hwfn(edev, i) {
464 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
469 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
470 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
472 struct ecore_hwfn *p_hwfn;
475 uint8_t n_hwfns = edev->num_hwfns;
478 hwfn_index = sb_id % n_hwfns;
479 p_hwfn = &edev->hwfns[hwfn_index];
480 rel_sb_id = sb_id / n_hwfns;
482 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
483 hwfn_index, rel_sb_id, sb_id);
485 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
486 sb_virt_addr, sb_phy_addr, rel_sb_id);
491 static void qed_fill_link(struct ecore_hwfn *hwfn,
492 struct qed_link_output *if_link)
494 struct ecore_mcp_link_params params;
495 struct ecore_mcp_link_state link;
496 struct ecore_mcp_link_capabilities link_caps;
499 memset(if_link, 0, sizeof(*if_link));
501 /* Prepare source inputs */
502 if (IS_PF(hwfn->p_dev)) {
503 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
505 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
506 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
509 ecore_vf_read_bulletin(hwfn, &change);
510 ecore_vf_get_link_params(hwfn, ¶ms);
511 ecore_vf_get_link_state(hwfn, &link);
512 ecore_vf_get_link_caps(hwfn, &link_caps);
515 /* Set the link parameters to pass to protocol driver */
517 if_link->link_up = true;
520 if_link->speed = link.speed;
522 if_link->duplex = QEDE_DUPLEX_FULL;
524 /* Fill up the native advertised speed cap mask */
525 if_link->adv_speed = params.speed.advertised_speeds;
527 if (params.speed.autoneg)
528 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
530 if (params.pause.autoneg || params.pause.forced_rx ||
531 params.pause.forced_tx)
532 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
534 if (params.pause.autoneg)
535 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
537 if (params.pause.forced_rx)
538 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
540 if (params.pause.forced_tx)
541 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
543 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
544 if_link->eee_supported = false;
546 if_link->eee_supported = true;
547 if_link->eee_active = link.eee_active;
548 if_link->sup_caps = link_caps.eee_speed_caps;
549 /* MFW clears adv_caps on eee disable; use configured value */
550 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
552 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
553 if_link->eee.enable = params.eee.enable;
554 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
555 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
560 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
562 qed_fill_link(&edev->hwfns[0], if_link);
564 #ifdef CONFIG_QED_SRIOV
565 for_each_hwfn(cdev, i)
566 qed_inform_vf_link_state(&cdev->hwfns[i]);
570 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
572 struct ecore_hwfn *hwfn;
573 struct ecore_ptt *ptt;
574 struct ecore_mcp_link_params *link_params;
580 /* The link should be set only once per PF */
581 hwfn = &edev->hwfns[0];
583 ptt = ecore_ptt_acquire(hwfn);
587 link_params = ecore_mcp_get_link_params(hwfn);
588 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
589 link_params->speed.autoneg = params->autoneg;
591 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
592 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
593 link_params->pause.autoneg = true;
595 link_params->pause.autoneg = false;
596 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
597 link_params->pause.forced_rx = true;
599 link_params->pause.forced_rx = false;
600 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
601 link_params->pause.forced_tx = true;
603 link_params->pause.forced_tx = false;
606 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
607 memcpy(&link_params->eee, ¶ms->eee,
608 sizeof(link_params->eee));
610 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
612 ecore_ptt_release(hwfn, ptt);
617 void qed_link_update(struct ecore_hwfn *hwfn)
619 struct qed_link_output if_link;
621 qed_fill_link(hwfn, &if_link);
624 static int qed_drain(struct ecore_dev *edev)
626 struct ecore_hwfn *hwfn;
627 struct ecore_ptt *ptt;
633 for_each_hwfn(edev, i) {
634 hwfn = &edev->hwfns[i];
635 ptt = ecore_ptt_acquire(hwfn);
637 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
640 rc = ecore_mcp_drain(hwfn, ptt);
643 ecore_ptt_release(hwfn, ptt);
649 static int qed_nic_stop(struct ecore_dev *edev)
653 rc = ecore_hw_stop(edev);
654 for (i = 0; i < edev->num_hwfns; i++) {
655 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
657 if (p_hwfn->b_sp_dpc_enabled)
658 p_hwfn->b_sp_dpc_enabled = false;
663 static int qed_slowpath_stop(struct ecore_dev *edev)
665 #ifdef CONFIG_QED_SRIOV
673 #ifdef CONFIG_ECORE_ZIPPED_FW
674 qed_free_stream_mem(edev);
677 #ifdef CONFIG_QED_SRIOV
678 if (IS_QED_ETH_IF(edev))
679 qed_sriov_disable(edev, true);
685 ecore_resc_free(edev);
686 qed_stop_iov_task(edev);
691 static void qed_remove(struct ecore_dev *edev)
696 ecore_hw_remove(edev);
699 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
701 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
702 struct ecore_ptt *ptt;
705 ptt = ecore_ptt_acquire(hwfn);
709 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
710 ECORE_OV_DRIVER_STATE_ACTIVE :
711 ECORE_OV_DRIVER_STATE_DISABLED);
713 ecore_ptt_release(hwfn, ptt);
718 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
719 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
721 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
722 struct ecore_ptt *ptt;
728 ptt = ecore_ptt_acquire(hwfn);
730 DP_ERR(hwfn, "Can't acquire PTT\n");
734 memset(sb_dbg, 0, sizeof(*sb_dbg));
735 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
737 ecore_ptt_release(hwfn, ptt);
741 const struct qed_common_ops qed_common_ops_pass = {
742 INIT_STRUCT_FIELD(probe, &qed_probe),
743 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
744 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
745 INIT_STRUCT_FIELD(set_name, &qed_set_name),
746 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
747 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
748 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
749 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
750 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
751 INIT_STRUCT_FIELD(set_link, &qed_set_link),
752 INIT_STRUCT_FIELD(drain, &qed_drain),
753 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
754 INIT_STRUCT_FIELD(remove, &qed_remove),
755 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
758 const struct qed_eth_ops qed_eth_ops_pass = {
759 INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
760 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
763 const struct qed_eth_ops *qed_get_eth_ops(void)
765 return &qed_eth_ops_pass;