1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
9 #include <rte_string_fns.h>
11 #include "qede_ethdev.h"
14 #define QEDE_ALARM_TIMEOUT_US 100000
16 /* Global variable to hold absolute path of fw file */
17 char qede_fw_file[PATH_MAX];
19 static const char * const QEDE_DEFAULT_FIRMWARE =
20 "/lib/firmware/qed/qed_init_values-8.40.33.0.bin";
23 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
27 for (i = 0; i < edev->num_hwfns; i++) {
28 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
29 p_hwfn->pf_params = *params;
33 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
35 edev->regview = pci_dev->mem_resource[0].addr;
36 edev->doorbells = pci_dev->mem_resource[2].addr;
37 edev->db_size = pci_dev->mem_resource[2].len;
41 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
42 uint32_t dp_module, uint8_t dp_level, bool is_vf)
44 struct ecore_hw_prepare_params hw_prepare_params;
47 ecore_init_struct(edev);
48 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
49 /* Protocol type is always fixed to PROTOCOL_ETH */
54 ecore_init_dp(edev, dp_module, dp_level, NULL);
55 qed_init_pci(edev, pci_dev);
57 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
60 hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH;
62 hw_prepare_params.personality = ECORE_PCI_ETH;
63 hw_prepare_params.drv_resc_alloc = false;
64 hw_prepare_params.chk_reg_fifo = false;
65 hw_prepare_params.initiate_pf_flr = true;
66 hw_prepare_params.allow_mdump = false;
67 hw_prepare_params.b_en_pacing = false;
68 hw_prepare_params.epoch = OSAL_GET_EPOCH(ECORE_LEADING_HWFN(edev));
69 rc = ecore_hw_prepare(edev, &hw_prepare_params);
71 DP_ERR(edev, "hw prepare failed\n");
78 static int qed_nic_setup(struct ecore_dev *edev)
82 rc = ecore_resc_alloc(edev);
86 DP_INFO(edev, "Allocated qed resources\n");
87 ecore_resc_setup(edev);
92 #ifdef CONFIG_ECORE_ZIPPED_FW
93 static int qed_alloc_stream_mem(struct ecore_dev *edev)
97 for_each_hwfn(edev, i) {
98 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
100 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
101 sizeof(*p_hwfn->stream));
109 static void qed_free_stream_mem(struct ecore_dev *edev)
113 for_each_hwfn(edev, i) {
114 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
119 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
124 #ifdef CONFIG_ECORE_BINARY_FW
125 static int qed_load_firmware_data(struct ecore_dev *edev)
129 const char *fw = RTE_LIBRTE_QEDE_FW;
131 if (strcmp(fw, "") == 0)
132 strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE);
134 strcpy(qede_fw_file, fw);
136 fd = open(qede_fw_file, O_RDONLY);
138 DP_ERR(edev, "Can't open firmware file\n");
142 if (fstat(fd, &st) < 0) {
143 DP_ERR(edev, "Can't stat firmware file\n");
148 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
149 RTE_CACHE_LINE_SIZE);
150 if (!edev->firmware) {
151 DP_ERR(edev, "Can't allocate memory for firmware\n");
156 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
157 DP_ERR(edev, "Can't read firmware data\n");
162 edev->fw_len = st.st_size;
163 if (edev->fw_len < 104) {
164 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
175 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
177 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
179 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
181 if (is_mac_exist && is_mac_forced)
182 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
184 /* Always update link configuration according to bulletin */
185 qed_link_update(hwfn);
188 static void qede_vf_task(void *arg)
190 struct ecore_hwfn *p_hwfn = arg;
193 /* Read the bulletin board, and re-schedule the task */
194 ecore_vf_read_bulletin(p_hwfn, &change);
196 qed_handle_bulletin_change(p_hwfn);
198 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
201 static void qed_start_iov_task(struct ecore_dev *edev)
203 struct ecore_hwfn *p_hwfn;
206 for_each_hwfn(edev, i) {
207 p_hwfn = &edev->hwfns[i];
209 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
214 static void qed_stop_iov_task(struct ecore_dev *edev)
216 struct ecore_hwfn *p_hwfn;
219 for_each_hwfn(edev, i) {
220 p_hwfn = &edev->hwfns[i];
222 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
225 static int qed_slowpath_start(struct ecore_dev *edev,
226 struct qed_slowpath_params *params)
228 struct ecore_drv_load_params drv_load_params;
229 struct ecore_hw_init_params hw_init_params;
230 struct ecore_mcp_drv_version drv_version;
231 const uint8_t *data = NULL;
232 struct ecore_hwfn *hwfn;
233 struct ecore_ptt *p_ptt;
237 #ifdef CONFIG_ECORE_BINARY_FW
238 rc = qed_load_firmware_data(edev);
240 DP_ERR(edev, "Failed to find fw file %s\n",
245 hwfn = ECORE_LEADING_HWFN(edev);
246 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
247 p_ptt = ecore_ptt_acquire(hwfn);
249 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
251 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
258 rc = qed_nic_setup(edev);
262 /* set int_coalescing_mode */
263 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
265 #ifdef CONFIG_ECORE_ZIPPED_FW
267 /* Allocate stream for unzipping */
268 rc = qed_alloc_stream_mem(edev);
270 DP_ERR(edev, "Failed to allocate stream memory\n");
276 qed_start_iov_task(edev);
278 #ifdef CONFIG_ECORE_BINARY_FW
280 data = (const uint8_t *)edev->firmware + sizeof(u32);
283 /* Start the slowpath */
284 memset(&hw_init_params, 0, sizeof(hw_init_params));
285 hw_init_params.b_hw_start = true;
286 hw_init_params.int_mode = params->int_mode;
287 hw_init_params.allow_npar_tx_switch = true;
288 hw_init_params.bin_fw_data = data;
290 memset(&drv_load_params, 0, sizeof(drv_load_params));
291 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
292 drv_load_params.avoid_eng_reset = false;
293 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
294 hw_init_params.avoid_eng_affin = false;
295 hw_init_params.p_drv_load_params = &drv_load_params;
297 rc = ecore_hw_init(edev, &hw_init_params);
299 DP_ERR(edev, "ecore_hw_init failed\n");
303 DP_INFO(edev, "HW inited and function started\n");
306 hwfn = ECORE_LEADING_HWFN(edev);
307 drv_version.version = (params->drv_major << 24) |
308 (params->drv_minor << 16) |
309 (params->drv_rev << 8) | (params->drv_eng);
310 strlcpy((char *)drv_version.name, (const char *)params->name,
311 sizeof(drv_version.name));
312 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
315 DP_ERR(edev, "Failed sending drv version command\n");
320 ecore_reset_vport_stats(edev);
327 qed_stop_iov_task(edev);
328 #ifdef CONFIG_ECORE_ZIPPED_FW
329 qed_free_stream_mem(edev);
332 ecore_resc_free(edev);
334 #ifdef CONFIG_ECORE_BINARY_FW
337 rte_free(edev->firmware);
338 edev->firmware = NULL;
341 qed_stop_iov_task(edev);
347 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
349 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
350 struct ecore_ptt *ptt = NULL;
351 struct ecore_tunnel_info *tun = &edev->tunnel;
353 memset(dev_info, 0, sizeof(struct qed_dev_info));
355 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
356 tun->vxlan.b_mode_enabled)
357 dev_info->vxlan_enable = true;
359 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
360 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
361 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
362 dev_info->gre_enable = true;
364 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
365 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
366 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
367 dev_info->geneve_enable = true;
369 dev_info->num_hwfns = edev->num_hwfns;
370 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
371 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
372 dev_info->dev_type = edev->type;
374 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
377 dev_info->fw_major = FW_MAJOR_VERSION;
378 dev_info->fw_minor = FW_MINOR_VERSION;
379 dev_info->fw_rev = FW_REVISION_VERSION;
380 dev_info->fw_eng = FW_ENGINEERING_VERSION;
383 dev_info->b_inter_pf_switch =
384 OSAL_GET_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
385 if (!OSAL_GET_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
386 dev_info->b_arfs_capable = true;
387 dev_info->tx_switching = false;
389 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
391 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
393 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
394 &dev_info->mfw_rev, NULL);
396 ecore_mcp_get_mbi_ver(ECORE_LEADING_HWFN(edev), ptt,
397 &dev_info->mbi_version);
399 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
400 &dev_info->flash_size);
402 /* Workaround to allow PHY-read commands for
405 if (ECORE_IS_BB_B0(edev))
406 dev_info->flash_size = 0xffffffff;
408 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
411 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
412 &dev_info->mfw_rev, NULL);
419 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
424 memset(info, 0, sizeof(*info));
426 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
429 int max_vf_vlan_filters = 0;
431 info->num_queues = 0;
432 for_each_hwfn(edev, i)
434 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
436 if (IS_ECORE_SRIOV(edev))
437 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
438 ECORE_ETH_VF_NUM_VLAN_FILTERS;
439 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
442 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
445 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
447 if (ECORE_IS_CMT(edev)) {
448 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
449 info->num_queues += queues;
452 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
453 (u8 *)&info->num_vlan_filters);
455 ecore_vf_get_port_mac(&edev->hwfns[0],
456 (uint8_t *)&info->port_mac);
458 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
461 qed_fill_dev_info(edev, &info->common);
464 memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN);
469 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
473 rte_memcpy(edev->name, name, NAME_SIZE);
474 for_each_hwfn(edev, i) {
475 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
480 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
481 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
483 struct ecore_hwfn *p_hwfn;
486 uint8_t n_hwfns = edev->num_hwfns;
489 hwfn_index = sb_id % n_hwfns;
490 p_hwfn = &edev->hwfns[hwfn_index];
491 rel_sb_id = sb_id / n_hwfns;
493 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
494 hwfn_index, rel_sb_id, sb_id);
496 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
497 sb_virt_addr, sb_phy_addr, rel_sb_id);
502 static void qed_fill_link(struct ecore_hwfn *hwfn,
503 __rte_unused struct ecore_ptt *ptt,
504 struct qed_link_output *if_link)
506 struct ecore_mcp_link_params params;
507 struct ecore_mcp_link_state link;
508 struct ecore_mcp_link_capabilities link_caps;
511 memset(if_link, 0, sizeof(*if_link));
513 /* Prepare source inputs */
514 if (IS_PF(hwfn->p_dev)) {
515 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
517 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
518 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
521 ecore_vf_read_bulletin(hwfn, &change);
522 ecore_vf_get_link_params(hwfn, ¶ms);
523 ecore_vf_get_link_state(hwfn, &link);
524 ecore_vf_get_link_caps(hwfn, &link_caps);
527 /* Set the link parameters to pass to protocol driver */
529 if_link->link_up = true;
532 if_link->speed = link.speed;
534 if_link->duplex = QEDE_DUPLEX_FULL;
536 /* Fill up the native advertised speed cap mask */
537 if_link->adv_speed = params.speed.advertised_speeds;
539 if (params.speed.autoneg)
540 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
542 if (params.pause.autoneg || params.pause.forced_rx ||
543 params.pause.forced_tx)
544 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
546 if (params.pause.autoneg)
547 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
549 if (params.pause.forced_rx)
550 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
552 if (params.pause.forced_tx)
553 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
555 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
556 if_link->eee_supported = false;
558 if_link->eee_supported = true;
559 if_link->eee_active = link.eee_active;
560 if_link->sup_caps = link_caps.eee_speed_caps;
561 /* MFW clears adv_caps on eee disable; use configured value */
562 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
564 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
565 if_link->eee.enable = params.eee.enable;
566 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
567 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
572 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
574 struct ecore_hwfn *hwfn;
575 struct ecore_ptt *ptt;
577 hwfn = &edev->hwfns[0];
579 ptt = ecore_ptt_acquire(hwfn);
581 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
583 qed_fill_link(hwfn, ptt, if_link);
586 ecore_ptt_release(hwfn, ptt);
588 qed_fill_link(hwfn, NULL, if_link);
592 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
594 struct ecore_hwfn *hwfn;
595 struct ecore_ptt *ptt;
596 struct ecore_mcp_link_params *link_params;
602 /* The link should be set only once per PF */
603 hwfn = &edev->hwfns[0];
605 ptt = ecore_ptt_acquire(hwfn);
609 link_params = ecore_mcp_get_link_params(hwfn);
610 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
611 link_params->speed.autoneg = params->autoneg;
613 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
614 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
615 link_params->pause.autoneg = true;
617 link_params->pause.autoneg = false;
618 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
619 link_params->pause.forced_rx = true;
621 link_params->pause.forced_rx = false;
622 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
623 link_params->pause.forced_tx = true;
625 link_params->pause.forced_tx = false;
628 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
629 memcpy(&link_params->eee, ¶ms->eee,
630 sizeof(link_params->eee));
632 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
634 ecore_ptt_release(hwfn, ptt);
639 void qed_link_update(struct ecore_hwfn *hwfn)
641 struct ecore_dev *edev = hwfn->p_dev;
642 struct qede_dev *qdev = (struct qede_dev *)edev;
643 struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
645 if (!qede_link_update(dev, 0))
646 _rte_eth_dev_callback_process(dev,
647 RTE_ETH_EVENT_INTR_LSC, NULL);
650 static int qed_drain(struct ecore_dev *edev)
652 struct ecore_hwfn *hwfn;
653 struct ecore_ptt *ptt;
659 for_each_hwfn(edev, i) {
660 hwfn = &edev->hwfns[i];
661 ptt = ecore_ptt_acquire(hwfn);
663 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
666 rc = ecore_mcp_drain(hwfn, ptt);
669 ecore_ptt_release(hwfn, ptt);
675 static int qed_nic_stop(struct ecore_dev *edev)
679 rc = ecore_hw_stop(edev);
680 for (i = 0; i < edev->num_hwfns; i++) {
681 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
683 if (p_hwfn->b_sp_dpc_enabled)
684 p_hwfn->b_sp_dpc_enabled = false;
689 static int qed_slowpath_stop(struct ecore_dev *edev)
691 #ifdef CONFIG_QED_SRIOV
699 #ifdef CONFIG_ECORE_ZIPPED_FW
700 qed_free_stream_mem(edev);
703 #ifdef CONFIG_QED_SRIOV
704 if (IS_QED_ETH_IF(edev))
705 qed_sriov_disable(edev, true);
711 ecore_resc_free(edev);
712 qed_stop_iov_task(edev);
717 static void qed_remove(struct ecore_dev *edev)
722 ecore_hw_remove(edev);
725 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
727 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
728 struct ecore_ptt *ptt;
731 ptt = ecore_ptt_acquire(hwfn);
735 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
736 ECORE_OV_DRIVER_STATE_ACTIVE :
737 ECORE_OV_DRIVER_STATE_DISABLED);
739 ecore_ptt_release(hwfn, ptt);
744 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
745 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
747 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
748 struct ecore_ptt *ptt;
754 ptt = ecore_ptt_acquire(hwfn);
756 DP_ERR(hwfn, "Can't acquire PTT\n");
760 memset(sb_dbg, 0, sizeof(*sb_dbg));
761 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
763 ecore_ptt_release(hwfn, ptt);
767 const struct qed_common_ops qed_common_ops_pass = {
768 INIT_STRUCT_FIELD(probe, &qed_probe),
769 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
770 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
771 INIT_STRUCT_FIELD(set_name, &qed_set_name),
772 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
773 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
774 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
775 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
776 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
777 INIT_STRUCT_FIELD(set_link, &qed_set_link),
778 INIT_STRUCT_FIELD(drain, &qed_drain),
779 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
780 INIT_STRUCT_FIELD(remove, &qed_remove),
781 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
784 const struct qed_eth_ops qed_eth_ops_pass = {
785 INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
786 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
789 const struct qed_eth_ops *qed_get_eth_ops(void)
791 return &qed_eth_ops_pass;